Computer Architecture: Accumulators and Registers

Accumulator

• An 8-bit register that holds data for processing by the Arithmetic Logic Unit (ALU).
• Stores results of operations and is also referred to as the A register.
• Connected to an 8-bit internal data bus for data transfer.

Temporary Register

• Receives data from external memory or general-purpose registers for the ALU.
• Supplies one input to the ALU while the other input is from the accumulator.
• Used for storing operands in arithmetic and logic operations.

General Purpose Registers

• Six 8-bit general-purpose registers: B, C, D, E, H, and L.
• Registers can be used individually or combined as pairs (BC, DE, HL) for 16-bit operations.
• HL register pair typically serves as a 16-bit memory pointer.

Stack Pointer (SP)

• A 16-bit register that maintains the address of the last byte entered into the stack.
• Stack is a reserved area of RAM for temporary data storage.
• Decrements on data entry and increments on data retrieval.

Program Counter (PC)

• A 16-bit memory pointer that sequences instruction execution.
• Points to the address of the next instruction.
• Increments by one after executing an instruction to indicate the next location.

Incrementer-Decrementer

• Can add or subtract one from the contents of the stack pointer or program counter.

Arithmetic and Logic Unit (ALU)

• Executes arithmetic (addition, subtraction) and logic operations (AND, OR, XOR) on 8-bit data.
• Inputs to the ALU are from the accumulator and the temporary register.
• Stores results back in the accumulator.

Flags

• Composed of five individual flip-flops indicating statuses after arithmetic and logic operations.

Instruction Register and Decoder

• An 8-bit register that fetches and loads instructions from memory.
• Instruction decoder decodes contents to determine operation execution and directs the timing and control unit.

Timing and Control Unit

• Contains an oscillator generating two-phase clock signals (CLK and CLK bar) for synchronization of registers.
• The controller sequencer is micro-programmed and contains ROM for storing micro-routines needed for instruction execution.

Interrupt Control

• Manages temporary interruptions for input/output (I/O) device requests.
• The main program execution is halted to process interrupt signals for data input.

Serial I/O Control

• Manages serial data input and output for I/O devices.
• Data enters the 8085 microprocessor through SID (serial input data) and exits through SOD (serial output data).
• SIM and RIM instructions facilitate serial-parallel conversion for serial I/O operations.

Address Buffers

• Contents of the stack pointer or program counter can be loaded into address buffers.
• Outputs direct external address and address data buses, connecting memory and I/O chips to the CPU.
• Enables the CPU to send addresses for desired data to memory or I/O devices.