Binary Adders, Subtractors & the Arithmetic Logic Unit

Binary Adders and Subtractors

• Focuses on binary adders and subtractors in the context of computer systems.

Adders

• CD74HC283 is a type of adder.

SoC & CPU

• A system-on-a-chip (SoC) contains a CPU, GPU, memory, USB controller, power management circuits, and wireless radios.
• A CPU contains an ALU and a CU.

Arithmetic Logic Unit (ALU)

• The ALU is a digital circuit in the CPU that performs arithmetic and logical operations.
• ALU functions include:
  • Arithmetic operations: Addition, Subtraction, Multiplication, and Division
  • Logical Operations: AND, OR, NOT, and XOR
  • Bit-shifting operations: Shift left and shift right
  • Comparison: Equal, greater than, and less than

Binary Addition

• A fundamental arithmetic operation that adds two binary numbers bit by bit, starting from the least significant bit (LSB).
• The rules of binary addition include:
  • 0 + 0 = 0
  • 0 + 1 = 1
  • 1 + 0 = 1
  • 1 + 1 = 0 (with a carry of 1)
• Addition is performed column-wise, starting from the rightmost bit (LSB).
• A carry is generated if the sum of two bits is greater than 1.
• The carry is added to the next higher bit.

Binary Adder

• A binary adder is a digital circuit that performs the addition of two binary numbers.
• The Binary Adder is the main component of the Arithmetic Logic Unit (ALU).
• Adders are also used to calculate addresses, table indices, increment and decrement operators.
• Binary Adders consist of two types:
  • Half Adder: Adds two single-bit binary numbers and produces a sum and a carry
  • Full Adder: Adds three single-bit binary numbers (including a carry-in) and produces a sum and a carry-out

One-Bit Binary Adder

• The goal is to design a binary logic circuit, also known as a 1-bit Adder, to add two binary digits.
• The 1-bit Adder is graphically represented by the symbol HA (Half-Adder).

Graphical Symbol

• If a=1 and b=0, then S=1, C=0, the carry is 0, and the sum is 1.

Truth table for 1-bit Adder

• The truth table outlines different combinations of two inputs represented as a and b
• Each input leads to two outputs C (carry) and S (sum).
• Two inputs result in two outputs.
• With inputs a=0 and b=0 then C=0 and S=0
• With inputs a=0 and b=1 then C=0 and S=1
• With inputs a=1 and b=0 then C=0 and S=1
• With inputs a=1 and b=1 then C=1 and S=0

Carry & Logic Equation

• Formula is C = a b

Sum Logic Equation

• S = a'b + ab' = a ⊕ b

Logic Circuit

• The visual representation confirms its equations for outputs C and S.

Example

• 11 + 01 can be realized with the logic circuits.
• HA-2 require 3 inputs to add the carry '1' coming from HA-1 for the '1 + 1 + 0'.

Full-Adder

• Considered when the logic adders require three inputs.

Full-Adder

• Illustrates a use of Full-Adder (FA) and Half-Adder (HA) to add the binary numbers.

Result

• In the example in the slides, C2 = 1, S2 = 0, C1 = 1 and S1 = 0

Design a Full Adder

• Full adders have 3 inputs and 2 outputs.

Full-Adder Details

• A 1-bit Full Adder adds 3 binary digits
• It has three inputs and two outputs

Full-Adder: Truth Table

• Describes all possible input combinations A, B, and C₋in.
• Shows the corresponding outputs C₋out and S values for each combination.

Full-Adder's Logic Equations

• Defines Cout in terms of A, B, and C₋in using the following equation: Cout = A'BCin + AB'C + ABC' + ABC
• Defines S in terms of A, B, and Cin using the following equation: S = A'B'C + A'BC' + AB'C' + ABC

K-Maps

• K-Maps as a method to simplify the Cout to BCin+ ACin + AB.

K-Maps (Checkboard)

• Checkerboard Configuration utilizes K-Map patterns for simplification.
• This includes A ⊕ B ⊕ C₋in

Full Adder and Implementation using Logisim

• Provides both implementations with and without XOR

Full Adder and Circuit Implementation with XOR using Logisim

• S = A ⊕ B ⊕ C₋in

4-Bit Adder

• Has 9 inputs and 5 outputs.
• A 4-bit adder can be configured with binary inputs like,
• A = 0111
• B = 1010

4-bit Adder Example

• Implementation in a Full Adder configuration.

CRA

• The carry "ripples" through the full adders, an important characteristic.

The characteristics of a 4-bit CRA in a compact form

• The result is 5-bits while the input is 4-bits which can lead to

Overflow

• Can occur when the addition result has an extra bit (5-bits) than the inputs (4-bits).
• Is a hardware related "problem" and occurs in case where the carry-out is one (unsigned numbers addition).