Chapter 2a Transistors PDF

Transistors Chapter 2a EE 2 | Introduction to Electronics Engineering Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any...

Transistors Chapter 2a EE 2 | Introduction to Electronics Engineering Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Transistors BJT Bipolar Junction Transistors JFET Junction Field Effect Transistors MOSFET Metal-Oxide Semiconductor Field Effect Transistors NOTE: These are just the basic components. (i.e. IGBTs, Darlington, etc) Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. First Ever Transistor Created in 1947 by William Shockley, John Bardeen & Walter Brattain. Replaced vacuum tubes, which manipulate electrical signals by controlling electron movements Advantages: smaller, lightweight, doesn’t require warmup, lower operating voltage Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University.  Source: https://en.wikipedia.org/wiki/Hidden_Figures Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. I. BJT Current Controlled Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Schematic Symbol Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. BJT Construction 3-layer device: Either PNP or NPN type transistor The “sandwiched” material is always lesser in width (150:1 ratio) and less doped (10:1 ratio) compared to the outer layers to decrease conductivity. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Transistor Operation Transistor must be biased correctly for correct amplification process In either NPN or PNP transistor, BE junction is forward biased while BC junction is reverse biased. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. NPN Transistor with correct biasing Base-Emitter Junction Collector-Base Junction Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Base-Emitter Junction The correct bias makes the B-E junction forward biased. Electrons pass from emitter to base, resulting in current flow. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Collector-Base Junction On the other hand, the collector-base junction is reverse biased. Recall though that there is still a small reverse current flowing (by minority carriers). Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Net current The net effect is a current leaving the emitter terminal of the transistor. By KCL: I E = I C + I B. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Diodes to BJTs Exclusively for 1st Semester A.Y. 2024-2025 student use only. Adapted from: No part of this material may be reproduced and distributed in any https://www.electricaltech nology.org/2021/04/differ Form or by any means, electronically or mechanically, or by ence-bjt-fet-transistor.html Photocopying, recording or otherwise, without The prior permission of the University. Important Parameters Current Base Collector Emitter Voltages CE BE (0.7V) Gain Beta (hFE) 𝐼𝐶 = 𝛽𝐼𝐵 Alpha* Resistances* 𝐼𝐸 = 1 + 𝛽 𝐼𝐵 Vo , in this case, is the output voltage Adapted from: Exclusively for 1st Semester A.Y. 2024-2025 student use only. https://wiraelectrical.com/dc- No part of this material may be reproduced and distributed in any transistor-analysis/ Fundamentals of electric circuits Form or by any means, electronically or mechanically, or by by Charles K. Alexander and Photocopying, recording or otherwise, without Matthew N. O. Sadiku The prior permission of the University. Base current magnitude Base current is in μA range due to the sandwiched material’s low conductivity. Majority carriers (holes) of the forward biased PN junction appears as minority carriers of the reverse-biased NP junction. IC >> IB. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. P2N2222A beta Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Transistor Configurations Three configurations in consideration: Common-Base Common-Emitter Common-Collector Input and Output characteristics of CB and CE configurations are tackled to determine important quantities α and β. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Common-Base Configuration Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Common-Base Configuration Basic Transistor Amplifying Action Assuming α = 1, IC = IE. Current was transferred Then IL = Ii = 10mA from a low- to a high- And VL = ILR = (10mA) (5kΩ) = 50 Volts resistance circuit; combining transfer and resistor is the source of the label TRANSISTOR. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Common-Emitter Configuration Emitter terminal is common/reference to the input (base) terminal and the output (collector) terminal. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Common-Collector Configuration Primarily used for impedance matching High input impedance and low output impedance, unlike the CB and CE configurations. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Limits of Operation Note that the transistor power (for common-emitter, as this output graph shows) is given by Pc=VceIc. The transistor has a limit for both Vce and Ic, BUT the maximum power is not just the product of both maximum quantities, rather, it is a set of points along a curve. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. II. JFET Voltage Controlled Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Field Effect Transistor (FET) Voltage-Controlled Device Two types: N-channel and P-channel The output current is dependent on the applied voltage. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. JFET Schematic Symbols Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. JFET Construction Electron flow : Water flow (From source to drain) Gate control: similar to applied potential Source and drain: opposite ends of the channel For varying levels of VGS, the drain current varies accordingly. Adapted from: Exclusively for 1st Semester A.Y. 2024-2025 student use only. https://www.electricaltechnolo No part of this material may be reproduced and distributed in any gy.org/2021/04/difference-bjt- fet-transistor.html Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Case 1: VGS = 0, VDS = some (+) value Application of potential draws e- towards drain, causing a drain current. e- flow is limited by the “resistance” of n-channel b/w drain and source (represented by the depletion region thickness). Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Pinch-off condition Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Case 2: Applied VGS < 0 When applying VGS, it is always < 0 for N-channel JFET! VGS is applied to establish D.Rs at a lower level of VDS. This is similar to how a BJT’s IB can vary the levels of VCE & IC. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. For increasing (-) VGS values Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Summary of Operation 1. Maximum Drain Current = IDSS, occurs at VGS = 0 and VDS ≥ |VP|. 2. Maximum possible ID is reduced by application of VGS voltage, and ID = 0 for |VGS| > |VP| (VGS is more negative than VP). 3. For |VP| ≥ |VGS| ≥ 0 V, 0 mA ≤ ID ≤ IDSS. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Summary of Operations Recall that for a BJT, IC = βIB; i.e. IC = f(IB) In the same manner, a JFET’s ID and VGS are related as defined by SHOCKLEY’S EQUATION: Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. III. MOSFETS Low Power FETs Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Metal-Oxide Semiconductor FETs JFET and MOSFET are two different types of Field- Effect transistors (FET). They both use an electric field or voltage at the gate to control the output current flow or voltage. They both are unipolar transistors, unlike BJT which is bipolar and uses current at the base to control the output current. Adapted from: Exclusively for 1st Semester A.Y. 2024-2025 student use only. https://www.el No part of this material may be reproduced and distributed in any ectricaltechnolo gy.org/2021/04 Form or by any means, electronically or mechanically, or by /difference-jfet- Photocopying, recording or otherwise, without mosfet.html The prior permission of the University. MOSFET Construction It is a four-terminals device having Drain, Gate, Source and Body terminals. The body terminal is often shorted with the source terminal thus forming three terminals. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Types of MOSFETs Exclusively for 1st Semester A.Y. 2024-2025 student use only. Adapted from: No part of this material may be reproduced and distributed in any https://www.electronics- Form or by any means, electronically or mechanically, or by tutorials.ws/transistor/tran_6.html Photocopying, recording or otherwise, without The prior permission of the University. MOSFETs Just like the previous JFETs, MOSFETs can be used to make single stage class “A” amplifier circuits with the enhancement mode n-channel MOSFET common source amplifier being the most popular circuit. Depletion mode MOSFET amplifiers are very similar to the JFET amplifiers, except that the MOSFET has a much higher input impedance. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. MOSFETs MOSFETs has an extremely high input gate resistance with the current flowing through the channel between the source and drain being controlled by the gate voltage. Because of this high input impedance and gain, MOSFETs can be easily damaged by static electricity if not carefully protected or handled. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. MOSFETs This high input impedance is controlled by the gate biasing resistive network formed by R1 and R2. Also, the output signal for the enhancement mode common source MOSFET amplifier is inverted because When VG is low the transistor is switched “OFF” and VD (Vout) is high. When VG is high the transistor is switched “ON” and VD (Vout) is low as shown above. Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University. Summary of Operation normally “ON” Depletion type showing that current “can” flow through the channel with zero gate voltage. For p-channel types the symbols are exactly the same for both types except that the arrow points outwards. n-type enhancement type MOSFETs, a positive gate voltage turns “ON” the transistor and with zero gate voltage, the transistor will be “OFF”. For a p-channel E type MOSFET, a negative gate voltage will turn “ON” the transistor and with zero gate voltage, the transistor will be “OFF”. MOSFET type VGS = +ve VGS = 0 VGS = -ve N-Channel Depletion ON ON OFF N-Channel Enhancement ON OFF OFF P-Channel Depletion OFF ON ON P-Channel Enhancement OFF OFF ON Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Adapted from: https://www.electro Form or by any means, electronically or mechanically, or by nics- Photocopying, recording or otherwise, without tutorials.ws/transist or/tran_6.html The prior permission of the University. Chapter 2a Summary BJT Bipolar Junction Transistors FET Field Effect Transistors MOSFET Metal-Oxide Semiconductor Field Effect Transistors Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University.  Exclusively for 1st Semester A.Y. 2024-2025 student use only. No part of this material may be reproduced and distributed in any Form or by any means, electronically or mechanically, or by Photocopying, recording or otherwise, without The prior permission of the University.