Chapter 2: Memories PDF

BADJI MOKHTAR-ANNABA UNIVERSITY ‫جامعة باجي مختار – عنابـــــــــــــــة‬ FACULTY OF TECHNOLOGY ‫كلية التكنولوجيا‬ COMPUTER ENGINEERING DEPARTMENT ‫قسم مهندس في اإلعــــــــــــــالم اآللـــــــــ...

BADJI MOKHTAR-ANNABA UNIVERSITY ‫جامعة باجي مختار – عنابـــــــــــــــة‬ FACULTY OF TECHNOLOGY ‫كلية التكنولوجيا‬ COMPUTER ENGINEERING DEPARTMENT ‫قسم مهندس في اإلعــــــــــــــالم اآللــــــــــــــي‬ Chapter 2: Memories Part one Dr. MECHERI K. ARCHI2 S3 2024/2025  PLAN 1. Introduction (Semiconductor Memory Technology) 2. Definition 3. Memory Hierarchy 4. Memory Characteristics 5. Access Modes 6. Memory Types a) Random Access Memory (RAM) b) Read Only Memory (ROM) 7. Memory Expansion 2  1. Introduction  For decades, memory technology has continued to evolve. The goal is to: reduce: dimensions (size), costs and energy consumption, increase: capacity and speed. Miniaturization  From 1955 to 1975, RAM technology was based on magnetic cores (tores magnétiques). Cores are small rings of ferrite (ferromagnetic ceramic), with Read/Write wires running through them. 3  1. Introduction (semiconductor memory technology)  At the same time, there has been very rapid progress in transistor technology (MOS and CMOS: Complementary Metal Oxide Semiconductor), a technology for manufacturing electronic components (logic gates, logic circuits, etc.) based on semiconductors. 4  1. Introduction Transistors Tr. Bip. NPN : Tr. MOS-FET (Field Effect T) B : Base D : Drain C : Collecteur S : Source E : Emetteur G : Grille 5  1. Introduction Transistors 6  1. Introduction Semiconductor Semiconductor is a solid chemical compound that has electrical properties that allow it to be both a conductor (like metals) and an insulator (isolant). It becomes a conductor by heating it, lighting it, or subjecting it to an electrical voltage. This hybrid property is the basis of all modern computing. Examples of semiconductor materials: Silicon (SI) (without e) en français Silicium, Selenium (Se), Germanium (Ge), Gallium arsenide (GaAs) en français l'arséniure de gallium … 7  1. Introduction Semiconductor (example) Silicon Block. Extra-pure silicon ingots which will be cut into slices (wafers) 8  1. Introduction Semiconductor (Etched wafer) Wafer (Galette de silicium), 1000 chips and over 4000 billion circuit elements https://www.01net.com/actualites/tous-les-secrets-du-wafer-la-galette-magique-a-la-base-de-toutes-les-puces- electroniques.html 9  1. Introduction Semiconducteur (chip cutting) 10  1. Introduction Semiconducteur Chip fabrication https://www.assistancescolaire.com/enseignant/elementaire/ressources/base-documentaire-en-sciences/cea071 11  1. Introduction Semiconductor Chip fabrication https://www.renesas.com/en/blogs/semiconductor-device-manufacturing-process-challenges-and-opportunities 12  1. Introduction Semiconductor Chip fabrication Semiconductor processes are highly complex and involve a wide range of specialized equipment and materials. These processes are essential for the creation of modern electronic devices and are constantly evolving as new technologies are developed. In general, the process of producing a semiconductor microchip can take several weeks to several months. Integrated circuits (electronic chips) have made it possible to interconnect thousands of transistors, then millions, and now tens of billions on a component called a Chip (in 2008 Nvidia's GT200 chip reached 1.4 billion components: GPU). Integrated circuits make it possible to produce µPs, memories, etc. Intel 8742 chip IC IC format DIP (Dual Inline Package) ancient 13  2.Definition Memory is an electronic device capable of storing and retrieving binary information. This device has two basic operations, writing to memory to store information, and reading from memory to restore information. Several technologies are used to store information, we distinguish:  Semiconductor memories (RAM, ROM, PROM, etc.)  Magnetic memories (hard disk, floppy disks, etc.)  Optical memories (CD, DVD, etc.) 14  3. Memory Hierarchy The ideal is to have a memory with unlimited capacity and very fast. Unfortunately, the access time increases with the capacity. Thus, a memory hierarchy was used: - the most used data requires a smaller access time. 15  3. Memory Hierarchy Magnetic and optical memories form a family of memories called mass memories (or auxiliary/secondary/storage devices). Information is stored permanently in these memories. To reduce the access time to mass memories, the processor uses a backup memory (equivalent to cache memory). Semiconductor memories are divided into two families depending on whether or not the writing operation is possible: RAM and ROM. The latter two form the central memory of the computer. ROM, a Read-Only Memory, contains, among other things, the computer's startup program (recorded by the motherboard manufacturer). It is executed as soon as the machine is turned on. 16  3. Memory Hierarchy  RAM, working memory for reading and writing. In order for the processor to execute programs, they are loaded into RAM with the data.  The cache memory, faster, of low capacity and closer to the µP. contains copies of the data from RAM that are frequently used. It is used to reduce the number of accesses to RAM and therefore save time.  The processor registers are very fast and used to temporarily store operands and intermediate results, during the execution of an instruction. They are located at the microprocessor level. 17  4. Characteristics Capacity (Size): the information amount that the memory is able to store, expressed in bits, bytes, K-bytes,... Name abbreviation Value Byte B / o 8 bits 23 bits Kilo-byte KB 1024 B 210 B 103 B Mega-byte MB 1024 KB 220 B 106 B Giga-byte GB 1024 MB 230 B 109 B Tera-byte TB 1024 GB 240 B 1012 B Peta-byte PB 1024 TB 250 B 1015 B Exa-byte EB 1024 PB 260 B 1018 B Zetta-byte ZB 1024 EB 270 B 1021 B Yotta-byte YB 1024 ZB 280 B 1024 B 18  4. Characteristics Access time (At): Time required for a Read/Write operation. At = Instant when data is available - Instant when the @ is provided. Cycle time (if random access): minimum time interval between two successive read or write accesses. Ct = At + time needed before a 2nd access 19  4. Characteristics Throughput (transfer speed or bandwidth): quantity of information read/written per time unit. Throughput = n/Ct where n: number of bits transferred per cycle. Storage duration: length of time for which information is kept in memory, it can be:  Quasi-permanent (ROM, hard disk,...)  Temporary (DRAM)  Volatile (depending on the presence of electric current) 20  4. Characteristics Location: of the memory in the machine. Processor Cache Memories Registers Main Mass Memory memories Mobo 21  5. Access Modes Sequential access : is the slowest access, concerns magnetic tapes. To access information, you have to go through all the information that precedes it. The access time varies depending on the position of the information sought. 22  5. Mode d’accès Direct or random access: (Intel, 1970) This is a direct (fast) access to the data via an address decoder. Each memory word has its own address, which can be accessed directly (MM, registers). The access time is identical because each memory word is associated with a unique @. 23  5. Mode d’accès Semi-sequential access: appeared with the hard disk (IBM, 1956). Intermediate access between sequential and direct:  Direct access to the track (horizontal movement of the head)  Sequential access to the sector (disk rotation)  The access time is variable. 24  5. Mode d’accès Associative access : Content-addressable or associative access memories store pairs of values. The first value of a pair is sent to the memory and, if this value exists within a stored pair, the memory returns the second value of the pair. The search is performed in parallel on all memory words via a key and not via a numeric index. The access time is constant. 25  6. Internal memory types Semiconductor memories Random-Access Read-Only Memories Memories Satic Dynamic (Chache Memory) (RAM stick.) ROM SRAM Asynchronous Synchronous PROM (1st generation) (2nd generation) EPROM SDRAM EEPROM FPM DDR-SDRAM EDO Flash ROM RAMBUS RAM BEDO VCMRAM FCRAM 26  6.1. Random Access Memory : RAM Random access, volatile, fast, matrix-organized, readable and writable access. RAM therefore mainly serves as working memory – main memory – and cache memory. 27  6.1. Random Access Memory : RAM A RAM is equipped with : The R/W command determines the data transfer direction (read or write). The CS (Chip Select) command allows to enable or disable the memory. n input lines to send the information to be written in the memory word. n output lines to receive the information to be read from the memory word. k address lines to access memory words. A decoder k  2k which allows to select the memory word referenced by the @ entered. 28  6.1. Mémoire vive Random Access Memory : RAM 29  6.1. Random Access Memory : RAM Memory capacity (Size): capacity = words number x word size = 2nb @Lines x word size = 2A x D Application exercise 1 : Our memory is 8 words of 16 bits each. Express its capacity in bytes then in bits. Solution : Capacity = words number x word size = 8 x 2 bytes = 16 bytes = 8 x 16 bits = 128 bits. 30  6.1. Random Access Memory : RAM 6.1.1. Binary cell Each bit represents a binary cell (BC) with 3 inputs and one output. This BC is a sequential circuit A bit of information to write In Read/Write command Binary S Cell The decoder output line that allows the cell to be Out A bit of information read selected 31  6.1. Random Access Memory : RAM Application exercise 2 : Make a BC using a JK flip- flop (S; ; In ; Q ; Q+ ; Out ; J ; K) :  S= 0 the cell is not selected , Q+= Q, Out =0  S=1 and = 0 (Writing) , Q+=In, Out = 0  S=1 and =1 (Reading), Q=Q+ no change we did a reading, Out = Q we copied the state of the flip-flop. JK flip-flop excitation table 32  6.1. RAM Solution: Truth table S= 0 cell not selected , Q+= Q, Out =0 S R/ In Q Q+ Out J K S= 1 et R/ = 0 (Write) , Q+=In, 0 0 0 0 0 0 0 X Out = 0 0 0 0 1 1 0 X 0 0 0 1 0 0 0 0 X S=1 et R/ =1 (Read), Q=Q+ 0 0 1 1 1 0 X 0 Out = Q 0 1 0 0 0 0 0 X To fill the JK we use the 0 1 0 1 1 0 X 0 excitation table: 0 1 1 0 0 0 0 X 0 1 1 1 1 0 X 0 1 0 0 0 0 0 0 X 1 0 0 1 0 0 X 1 1 0 1 0 1 0 1 X 1 0 1 1 1 0 X 0 1 1 0 0 0 0 0 X 1 1 0 1 1 1 X 0 1 1 1 0 0 0 0 X 33 1 1 1 1 1 1 X 0  6.1. RAM Solution : Karnaugh tables are used to determine the variables Out, J et K : 34  6.1. Mémoire vive Exercice d’application 1 Solution : Karnaugh tables are used to determine the variables Out, J et K : 35  6.1. Mémoire vive Exercice d’application 1 Solution : Karnaugh tables are used to determine the variables Out, J et K : 36 Internal logic diagram of this binary cell 37  6.1. RAM Application exercise 3 Create a 4x3 RAM (4 rows and 3 columns/4 words each of 3 bits) Solution :  The number of decoder outputs = number of memory lines = number of memory words = 2K = 4  K = Ln(4)/Ln(2)=2 i.e. this decoder has 2 inputs (K). So, 4 outputs of the decoder, each output allows to select a memory line (a word). Plus a validation line CS.  RAM 4x3 = 2K x 3 = 22 x 3 38  6.1. RAM Application exercise 3 Detailed diagram of static RAM implemented using flip-flops In BC BC BC Decoder 2  4 @ BC BC BC BC BC BC CS BC BC BC 39 Out  6.1.2. RAM categories Characteristics Static RAM (SRAM) Dynamic RAM (DRAM) To store a bit Uses a flip-flop (1 bit = 4 Uses a capacitor (1:charged; transistors = 2 NOR gates) 0:discharged). (1 bit = 1 transistor + 1 capacitor) No degradation, does not With degradation, the Storage duration require refreshing capacitor discharges, requires refreshing (Reread every 15 ns: Mem. unavailable). Structure Complicated Simple Storage density Weak High Access speed Faster (6 to 15 ns) Slower (60 to 70 ns) Energy consumption High Weak Cost More expensive Less expensive Use Cache Memory Main Memory 40  DRAM (Sticks) - the time interval between two memory -Regular interval, accesses is not regular, -the processor can initiate consecutive - the processor can’t initiate a new access accesses even if the previous access is until the previous one is completed. not completed Asynchronous (1st generation) Synchronous (2nd generation) SDRAM FPM (Fast Page Mode) DDR-SDRAM EDO (Extended Data Out) RAMBUS RAM BEDO (Burst EDO) VCMRAM FCRAM 41  6.1.2. RAM categories DRAM synchronous (2nd generation) SDRAM (Synchronous DRAM) : SDRAM exchanges its data with the processor by synchronizing with it at 100, 133 or even 150 MHz (SDRAM PC100, SDRAM PC133 and SDRAM PC150). This synchronization allows to avoid waiting states (Wait State). Depending on the frequency and bus width, we can achieve a bandwidth (theoretical throughput) of 528 MB/s to 1,064 MB/s and capacities of 64 to 512 MB per strip. throughput = bus width X frequency Example: Given a PC133 SDRAM and a bus width of 64 bits, we can achieve a transfer rate of : 64x133. 106=8 512 106 bits/s 8 512 106 / 8 = 1 064 106 octets/s = 1 064 Mo/s 42  6.1.2. RAM categories DRAM synchronous (2nd generation) DDR-SDRAM (Double Data Rate SDRAM): DDRam or SDRAM II offers a 64-bit architecture operating with a system bus clocked from 133 MHz to 216 MHz. It is capable of reading data on both the rising and falling edges of the clock, which doubles its initial transfer rate (Double Data Rate) and allows it to achieve a theoretical bandwidth of 2.1 Go/s, (DDR, DDR2, DDR3, DDR4 and DDR5). 43  6.1.2. RAM categories DRAM synchronous (2nd generation) DDRs use the format DIMM (SO-DIMM) DIMM (Dual In-line Memory Module: module mémoire à double rangée) : group of RAM chips operating in 64 bits and generally mounted on a rectangular printed circuit board (sticks). DIMM replaces SIMM(32 bits). SO-DIMM (Small Outline DIMM) is a type of computer memory integrated circuit, more compact in size than DIMMs, because they are about half as long. ECC memory (Error Correction Code or Error Checking and Correction) exploits bits intended to manage error correction codes (very expensive, used on servers). 44  6.1.2. RAM categories DRAM synchronous (2nd generation) We are witnessing a very rapid evolution of graphic memories: - VRAM (Video RAM): DRAM reserved for display and generally found on graphics cards. - WRAM (Windows RAM), very similar to VRAM. - SGRAM (Synchronous Graphics RAM) - GDDR (Graphics Double Data Rate Memory). higher frequencies, throughput: 2.5 Gbit/s. Idea: To know the maximum RAM capacity that your PC can support: Go to the command prompt and type« wmic memphysical get MaxCapacity » Type ‘Enter’. You will have a number that you will divide by 1048576 (220). 45  6.1.3. RAM Pinout Let's take the memory chip with the pins: What is its capacity? A0 to A12 correspond to the address pins (address bus, K = 13); D0 to D7 correspond to the data (data bus, Word = 8 bits); R, W correspond to the command bus to trigger a read or write; Select (CS) allows the selection of a memory package (memory chip); Ready is an outgoing signal to the processor to synchronize the clock frequency of the memory with that of the processor. Capacity = 213 words of 8 bits = 213 Bytes = 8192 Bytes = 216 bits 46  6.3. ROM: Read Only Memory  Read-only,  Permanent,  Contains BIOS. Basic Input Output System (BIOS) to ignore the hardware layer. It has an essential role for the functioning of the motherboard. It starts the OS (bootstrap), ….. self- configuration on power-on (POST : Power-On Self-Test), … it allows the standardization of OS. UEFI (Unified Extensible Firmware Interface : Interface micrologicielle extensible unifiée). Replaces BIOS on some motherboards. It defines an interface between a computer's firmware and operating system. 47  6.3.1 Classic ROM The information is recorded in an irreversible (definitive) manner during manufacturing. The realization principle of these memories is the diode network. Application Exercise 4: Realize the 4x3 ROM according to the truth table below. a1 a0 b2 b1 b0 0 0 0 1 1 0 1 1 0 1 1 0 0 0 1 1 1 0 1 0 48  6.3.1 Classic ROM Application Exercise 4: Realize the 4x3 ROM according to the truth table below. capacity = number of words × word size = 2nb_@ Lines × word size = 2K × D number of memory words = number of memory lines (at the decoder output) = number of lines of the truth table. number of memory words = 4 = 2 nb_@lines = 2 2 Number of @ lines = K = Variables in inputs of the truth table = 2 (a0 and a1) Memory word size = 3 = Functions or outputs of the Truth Table (b0, b1 and b2) 0 0 0 a1 a0 b2 b1 b0 0 0 0 1 1 Decoder a0 24 0 1 1 0 1 a1 1 0 0 0 1 1 1 0 1 0 CS b2 b1 b0 49  6.3.2 PROM Programmable ROM: It is an irreversible recording ROM that can be programmed by a user using a device called a PROM programmer, the memory cells are equipped with fuses that are destroyed when the memory is programmed. 0 Writing: If the bit is 0, simply destroy the fuse with the ‘PROM programmer’ device https://en.wikipedia.org/wiki/Read- only_memory 50  6.3.2 PROM Application Exercise 5: Perform the writing operation on the 4x3 PROM below. The writing operation to the PROM is to destroy the fuses corresponding to the zeros. 0 0 0 a1 a0 b2 b1 b0 0 0 0 1 1 Decoder 0 1 1 0 1 a0 24 a1 1 0 0 0 1 1 1 0 1 0 CS b2 b1 b0 51  6.3.2 PROM Application Exercise 5: Perform the write operation on the 4x3 PROM below. The writing operation to the PROM is to destroy the fuses corresponding to the zeros. 0 0 0 a1 a0 b2 b1 b0 0 0 0 1 1 Decoder a0 24 0 1 1 0 1 a1 1 0 0 0 1 1 1 0 1 0 CS b2 b1 b0 52  Other types of read-only memories EPROM Erasable PROM : It has the advantage of being able to be erased and rewritten. To erase an EPROM, it must be subjected to ultraviolet radiation for 30 minutes. https://en.wikipedia.org/wiki/Read-only_memory EEPROM Electrically EPROM : It can be erased using an electrical process without the use of ultraviolet rays. 53  Other types of read-only memories Flash EPROM Flash memories benefit from EEPROM and SRAM technologies (speed, no refresh, erasable), reprogrammable in 64 KB blocks, its cost price is quite high, and its life cycle is limited (it can only be reprogrammed a limited number of times: around 100,000). Example: digital camera - MP3 player http://www.industrialautomation- products.com/sale-11136421-6es7952-1as00-0aa0- Remark : siemens-memory-cardram-s7-400-flash-memory- card.html A ROM can be used in the realization of combinational circuits. 54  6.3. ROM Application exercise 6: realize a comparator of two numbers on two bits each using a ROM. a1 a0 b1 b0 SG E LI 0 0 0 0 0 1 0 0 0 0 1 0 0 1 0 0 1 0 0 0 1 0 0 1 1 0 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 Comparator 0 1 1 1 0 0 1 1 0 0 0 1 0 0 1 0 0 1 1 0 0 1 0 1 0 0 1 0 G L 1 0 1 1 0 0 1 if a>b if a=b if a