Unit 3 .pptx

CSAM331/CSIOT331/CSDS331 DIGITAL SYSTEMS AND COMPUTER ARCHITECTURE MISSION VISION CORE VALUES CHRIST is a nurturing ground for an Excellence and Service Faith in God | Moral Uprightness individual’s ho...

CSAM331/CSIOT331/CSDS331 DIGITAL SYSTEMS AND COMPUTER ARCHITECTURE MISSION VISION CORE VALUES CHRIST is a nurturing ground for an Excellence and Service Faith in God | Moral Uprightness individual’s holistic development to make Love of Fellow Beings effective contribution to the society in a Social Responsibility | Pursuit of  CHRIST Deemed to be University Unit-3 FUNDAMENTALS OF COMPUTER ARCHITECTURE Functional Units – Basic Operational Concepts – Performance – Instructions: Language of the Computer – Operations, Operands – Instruction representation – Logical operations – decision making – MIPS Addressing. Excellence and Service  CHRIST Deemed to be University Computer Architecture and Computer Organization Excellence and Service  CHRIST Deemed to be University Hardware Organization of a Computer Excellence and Service  CHRIST Deemed to be University Running a hello.c Program Excellence and Service  CHRIST Deemed to be University Von Neumann Architecture Three key Data and instructions are stored in a single read–write memory The contents of this memory are addressable by location, without regard to the type of data contained there Execution occurs in a sequential fashion (unless explicitly modified) from one instruction to the next concepts Excellence and Service  CHRIST Deemed to be University Von Neumann Architecture Stored-program computers have the following characteristics: –Three hardware systems: A central processing unit (CPU) A main memory system An I/O system The capacity to carry out sequential instruction processing. A single path between the CPU and main memory. This single path is known as the von Neumann bottleneck. Side effect: reduced throughput (Data Rate) Excellence and Service  CHRIST Deemed to be University Harvard Architecture Uses 2 memory systems and 2 separate buses Memory Instruction Memory Data Memory Bus Data bus Instruction Bus Excellence and Service  CHRIST Deemed to be University Von Neumann Architecture vs Harvard Architecture Excellence and Service  CHRIST Deemed to be University Memory Hierarchy Excellence and Service  CHRIST Deemed to be University Introduction Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Basic Functional unit A computer consists of five functionally independent main parts: 1. Input Unit 2. Memory Unit 3. Arithmetic & Logic unit (ALU) 4. Output Unit 5. Control unit. Excellence and Service  CHRIST Deemed to be University Functional Units Computer System consists of 5 functional main parts: 1. Input Unit: Accepts coded information from I/O device or through other computer connected over digital communication line. 2. Memory Unit: Stores the received information either for later use or for immediate processing by ALU. 3. Arithmetic and Logical Unit (ALU): Performs arithmetic and logical operations 4. Output Unit: Results are sent back to the user through the output unit 5. Control Unit: All of these actions are coordinated by the control unit Excellence and Service  CHRIST Deemed to be University Input unit ▪ Computers accept coded information through input units. ▪ Whenever a key is pressed in the keyboard, the corresponding letter or digit is automatically translated into its corresponding binary code and transmitted to the processor. ▪ Touchpad, mouse, joystick, and trackball are often used as graphic input devices in conjunction with displays. ▪ Microphones can be used to capture audio. ▪ Cameras can be used to capture video input. ▪ Digital communication facilities, such as the Internet, can also provide input to a computer from other computers and database servers. Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Output unit ▪ Its function is to send processed results to the user. Ex: Printer ▪ Some units, such as graphic displays, provide both an output function, showing text and graphics, and an input function Types of Output : Hard copy: printed on paper or other permanent media Soft copy: displayed on screen or by other non-permanent means Excellence and Service  CHRIST Categories of Output Deemed to be University Multimedia Text documents including Combination of text, Reports ,letters, etc. Graphics, video, audio Graphics Charts ,graphs, pictures Excellence and Service  CHRIST Deemed to be University Arithmetic and logical unit ▪ Performs basic arithmetic such as addition, subtraction, division and multiplication operations. ▪ Also logical operations are performed here under the supervision of control unit. ▪ Most computer operations are executed in the arithmetic and logic unit (ALU) of the processor. Load the operands into memory Bring them to processor Perform operation in ALU Store the result back to memory or retain in the processor ▪ When operands are brought into the processor, they are stored in high-speed storage elements called registers ▪ Access times to registers are even shorter than access times to the cache unit on the processor chip. Excellence and Service  CHRIST Deemed to be University CONTROL UNIT ▪ All computer operations are controlled by control unit. Functions of control unit: Fetching data and instructions from the memory. Interpreting the instructions. Controlling the transfer of data and instructions to and from memory. Controlling the input and output devices. The overall supervision of a computer ▪ Much of the control circuitry is physically distributed throughout the computer. ▪ A large set of control lines (wires) carries the signals used for timing and synchronization of events in all units Excellence and Service  CHRIST Deemed to be University Memory unit ▪ It stores program and data ▪ Primary Memory ▪ Programs must be stored in this memory while they are being executed ▪ Large number of semiconductor storage cells, each of which stores 1 bit ▪ Instead of reading or writing cells individually, they are handled by a group of fixed size called words ▪ In order to access any word in memory, a distinct address is associated with each word location ▪ A memory in which any location can be accessed in a short and fixed amount of time after specifying its address is called a random-access memory (RAM). ▪ The time required to access one word is called the memory access time. Excellence and Service  CHRIST Deemed to be University ▪ Cache Memory ▪ Adjunct to the main memory, a smaller, faster RAM unit ▪ Hold sections of a program that are currently being executed ▪ The cache is tightly coupled with the processor and is usually contained on the same integrated-circuit chip ▪ As program is executed, instructions are placed in cache ▪ Secondary Memory ▪ Less expensive ▪ Permanent storage ▪ Large amounts of data and many programs can be stored ▪ Ex: magnetic disks, optical disks (DVD and CD), and flash memory devices Excellence and Service Stored program concept is used in memory CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Basic Operational Concepts ❖ To perform a given task an appropriate program consisting of a list of instructions is stored in the memory. ❖ Individual instructions are brought from the memory into the processor, which executes the specified operations. ❖ Data also stored in the memory. Examples: - Add LOCA, R0 This instruction requires the performance of several steps, 1. First the instruction is fetched from the memory into the processor. 2. The operand at LOCA is fetched and added to the contents of R0 3. Finally the resulting sum is stored in the register R0 Excellence and Service  CHRIST Deemed to be University Example 2: Load LOCA, R1 Add R1, R0 ❖ Transfers between the memory and the processor are started by sending the address of the memory location to be accessed to the memory unit and issuing the appropriate control signals. ❖ The data are then transferred to or from the memory. Excellence and Service  CHRIST Deemed to be University IR – Instruction Register; PC – Program Counter; MAR – Memory Address Register; MDR – Memory Data Register Excellence and Service  CHRIST Deemed to be University The instruction register (IR):- Holds the instructions that is currently being executed. The program counter PC:- It contains the memory address of the next instruction to be fetched and executed. Besides IR and PC, there are n-general purpose registers R0 through Rn-1. Two registers which facilitate communication with memory are: - MAR – (Memory Address Register):- It holds the address of the location to be accessed. MDR – (Memory Data Register):- It contains the data to be written into or read out of the address location. Excellence and Service  CHRIST Operating steps are: Deemed to be University ❖ Programs reside in the memory & usually get these through the I/P unit. ❖ Execution of the program starts when the PC is set to point at the first instruction of the program. ❖ Contents of PC are transferred to MAR and a Read Control Signal is sent to the memory. ❖ The first instruction of the program is read out of the memory and loaded into the MDR. ❖ Next, the contents of MDR are transferred to the IR & now the instruction is ready to be decoded and executed. ❖ If the instruction involves an operation by the ALU, it is necessary to obtain the required operands. Excellence and Service  CHRIST Deemed to be University Operation to be performed by the ALU ❖ An operand in the memory is fetched by sending its address to MAR & Initiating a read cycle. ❖ When the operand has been read from the memory to the MDR, it is transferred from MDR to the ALU. ❖ After one or more operands are fetched in this way, the ALU can perform the desired operation. ❖ If the result of this operation is to be stored in the memory, the result is sent to MDR and the address of location where the result is stored is sent to MAR & a write cycle is initiated. ❖ The contents of PC are incremented so that PC points to the next instruction that is to be executed. Excellence and Service  CHRIST Deemed to be University Bus structure A group of lines that serve as a connecting path for several devices is called a bus. ❖ The simplest and most common way of interconnecting various parts of the computer. ❖ To achieve a reasonable speed of operation, a computer must be organized so that all its units can handle one full word of data at a given time. ❖ In addition to the lines that carry the data, the bus must have lines for address and control purpose. Excellence and Service  Processo Input Output Memory r Fig: Single bus structure  CHRIST Deemed to be University Metrics for performance-Important Terms Execution time (Response time) : The total time required for the computer to complete a task, including disk accesses, memory accesses, I/O activities, operating system overhead, CPU execution Throughput or bandwidth :number of tasks completed per unit time. To maximize performance, we want to minimize response time or execution time for some task. Excellence and Service  CHRIST Measuring Performance Deemed to be University Time is the measure of computer performance: the computer that performs the same amount of work in the least time is the fastest. CPU execution time Also called CPU time. The actual time the CPU spends computing for a specific task. Almost all computers are constructed using a clock that determines when events take place in the hardware. These discrete time intervals are called clock cycles Clock cycle Also called tick, clock tick, clock period, clock, or cycle. The time for one clock period, usually of the processor clock, which runs at a constant rate. The rate of clock pulses is known as the clock rate or clock speed, which is the inverse of the clock period. Excellence and Service  CHRIST Deemed to be University CPU performance and its factors CPU execution time for a program: (CPU time) It is the time the CPU spends for computing a task & does not include time spent waiting for I/O or running other program. Excellence and Service  CHRIST Deemed to be University Instruction Performance Execution time of a program depend on the number of instructions in a program. ie it is equal to the number of instructions executed multiplied by the average time per instruction. CPI: Clock cycles Per Instruction It is the average number of clock cycles each instruction takes to execute. Instruction count The number of instructions executed by the program. Excellence and Service  CHRIST Deemed to be University CPU Performance Equation Excellence and Service  CHRIST Deemed to be University Components of Performance Excellence and Service  CHRIST Deemed to be University Understanding program performance Excellence and Service  CHRIST Instructions: Language of the Computer Deemed to be University Introduction To command a computer’s hardware, you must speak its language. The words of a computer’s language are called instructions, and its vocabulary is called an instruction set. Simple Instruction Format During instruction execution, an instruction is read into an instruction register (IR) in the processor. The processor must be able to extract the data from the various instruction fields to perform the required operation. Opcodes are represented by abbreviations, called mnemonics Example: ADD AX, BX 🡪 Add instruction Excellence and Service  CHRIST Deemed to be University Instructions and instruction sequencing Basic instruction types C = A + B ; high level notation ADD A, B, C ; i.e. C [A] + [B] Generally, operation source1, source2, destination One address instructions Two address instructions Three address instructions Excellence and Service  CHRIST Deemed to be University One address instructions LOAD A ADD B STORE C Two address instructions MOVE B, C ADD A, C ; C [A] + [C] Three address instructions ADD A, B, C etc Excellence and Service  CHRIST Deemed to be University Example Excellence and Service  CHRIST Deemed to be University Instruction set Design Decisions Data types Instruction formats ○ Length of op code field ○ Number of addresses Registers ○ Number of CPU registers available ○ Which operations can be performed on which registers? Addressing modes Excellence and Service  CHRIST Deemed to be University Operations of the computer hardware Excellence and Service  CHRIST Deemed to be University Instruction Types Data processing : Arithmetic and logic instructions Data storage (main memory) : Movement of data into or out of register and or memory locations Data movement (I/O) : I/O instructions Program flow control : Test and branch instructions Excellence and Service  CHRIST Deemed to be University Types of Operation Data Transfer Arithmetic Logical I/O Transfer of Control Excellence and Service  CHRIST Deemed to be University Data Transfer Specify ○ Source ○ Destination ○ Data Action: 1. Calculate the memory address, based on the address mode 2. If the address refers to virtual memory, translate from virtual to real memory address. 3. Determine whether the addressed item is in cache. 4. If not, issue a command to the memory module. Excellence and Service  CHRIST Deemed to be University Memory Reference Instruction – lw Copies data from memory to register Format : lw reg, address Example : lw $s1, 100($s2) $s1 🡨 memory[100 +$s2] Memory Reference Instruction – sw Store Instruction copies data from register to memory Format : sw reg, address Example : sw $s1, 100($s2) memory[100 +$s2] 🡨 $s1 Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Arithmetic Add, Subtract, Multiply, Divide May include ○ Absolute value (|a|) ○ Increment (a++) ○ Decrement (a) Signed Integer Floating point Excellence and Service  CHRIST Deemed to be University Arithmetic Instructions :add Addressing mode: register Example: add $s3, $s1, $s2 meaning : $s3 = $s1 + $s2 Arithmetic Instructions :sub sub des, src1, src2 Addressing mode: register Example: sub $s3, $s1, $s2 meaning : $s3 = $s1 - $s2 Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Logical Bitwise operations AND, OR, NOT Excellence and Service  CHRIST Deemed to be University Logical instructions :and and des, src1, src2 Addressing mode: register Example: and $s3, $s1, $s2 meaning : $s3 = $s1 & $s2 (bit by bit) Logical instructions :or or des, src1, src2 Addressing mode: register Example: or $s3, $s1, $s2 meaning : $s3 = $s1 | $s2 (bit by bit) Excellence and Service  CHRIST Deemed to be University Shift and Rotate Operations Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Transfer of Control Jump / Branch (Unconditional / Conditional) ○ e.g. jump to x if result is zero Skip (Unconditional / Conditional) ○ skip (unconditional) : Increment to skip next ○ instruction e.g. increment and skip if zero ISZ Register1 Branch xxxx ADD A Subroutine call interrupt call Excellence and Service  CHRIST Deemed to be University Branch Instructions: beq and j beq: branch if equal –format : beq$s1, $s2, label –If $s1 = $s2 then branch to address specified as Label j : jump unconditional –format : j label Excellence and Service  CHRIST Deemed to be University Conditional Excellence and Service  CHRIST Deemed to be University unconditional Excellence and Service  CHRIST Deemed to be University Branch / Jump Instruction Excellence and Service  CHRIST Deemed to be University Operands Excellence and Service  CHRIST Deemed to be University Types of Operand 1. Register operands 2. Memory operands 3. Constant or immediate operands Excellence and Service  CHRIST Deemed to be University 1. Register operands ▪ Unlike programs in high-level languages, the operands of arithmetic instructions are restricted; they must be from a limited number of special locations built directly in hardware called registers. 2. Memory operands ▪ The arithmetic operations occur only on registers in MIPS instructions; thus, MIPS must include instructions that transfer data between memory and registers. Such instructions are called data transfer instructions. ▪ To access a word in memory, the instruction must supply the memory address. Excellence and Service  CHRIST Deemed to be University 3. Constant or immediate operands Excellence and Service  CHRIST Deemed to be University Addressing Modes Addressing modes refers to the different ways in which the location of an operand is specified in an instruction. Effective address (EA) or actual address is the location containing operand. Types: ○ Immediate Addressing ○ Direct Addressing ○ Indirect Addressing ○ Register Addressing ○ Register Indirect Addressing ○ Displacement (Indexed) Addressing ○ Relative Addressing Excellence and Service  CHRIST Deemed to be University Immediate Addressing Simplest form of addressing. Operand value is specified in the instruction itself. We use the sign # in front of the value to indicate that this value is to be used as an immediate operand. e.g. Move #200, R0 Advantage No memory reference to fetch data Fast Disadvantage Limited range -Size of the number is restricted to the size of the address field. Excellence and Service  CHRIST Deemed to be University Direct Addressing The operand is in a memory location, and the address of this location is specified in the instruction. Effective address (EA) or actual address is the location containing operand. e.g. ADD A ○ Add contents of memory cell whose address is A to accumulator ○ Look in memory at address A for operand Single memory reference to access data No additional calculations to work out effective address Limited address space Excellence and Service  CHRIST Deemed to be University Indirect Addressing The effective address of the operand is the contents of memory location whose address appears in the instruction. We denote indirection by placing the name of the register or the memory address given in the instruction in parentheses. EA = (A)-Look in A, find address and look there for operand e.g. ADD (A) ○ Add contents of cell pointed to by contents of A to accumulator e.g. ADD (A), R0 Excellence and Service  CHRIST Deemed to be University Indirect Addressing (Cont…) Large address space May be nested, multilevel, cascaded ○ e.g. EA = (((A))) Multiple memory accesses to find operand Slower Excellence and Service  CHRIST Register Addressing Deemed to be University Operand is the content of a register, the name(address) of the register is given in the instruction. eg: Add R1,R2 Limited number of registers Advantages Very small address field needed ○ Shorter instructions ○ Faster instruction fetch No memory access hence very fast execution This addressing mode is similar to Disadvantages direct addressing mode. The only difference is address field very limited address space of the instruction refers to a CPU register instead of main memory. Excellence and Service  CHRIST Deemed to be University Register Indirect Addressing The effective address of the operand is the content of register location whose address appears in the instruction. EA = (R) eg : Add (R1), R0 Disadvantage The instruction execution requires two memory references to fetch the operand, This addressing mode is similar to indirect one to get its address and a second to get addressing mode. The only difference is address field of the its value. instruction refers to a CPU register. Excellence and Service  CHRIST Deemed to be University Displacement Addressing It combines the capabilities of direct addressing and register indirect addressing. The effective address is the sum of two values; one is given explicitly in the instruction, and the other is stored in a register. EA = A + (R) Address field hold two values ○ A = base value ○ R = register that holds displacement ○ or vice versa Excellence and Service  CHRIST Deemed to be University Relative Addressing Also known as PC relative addressing A version of displacement addressing R = Program counter, PC EA = A + (PC) Relative addressing exploits the concept of locality ○ If most memory references are relatively near to the instruction being executed, then the use of relative addressing saves address bits in the instruction. Excellence and Service  CHRIST Deemed to be University MIPS Architecture MIPS = Microprocessor without Interlocked Pipelined Stages. MIPS follows RISC principles and based on Harvard Architecture MIPS architecture is a register architecture MIPS ISA is Load/Store architecture R2000 is a 32 bit processor - developed by MIPS Computer Systems in 1986 Uses fixed length instruction format. Excellence and Service  CHRIST Deemed to be University MIPS Register Set Types of Registers 32 general purpose registers ($0 ––$31) Program Counter (PC) Two special Purpose register (HI and LO) ○ Used to hold the results of integer multiply and divide instruction. ○ integer multiply operation, HI and LO register hold the 64 bit result. ○ integer divide operation, the 32 bit quotient is stored in the LO and the remainder in the HI register. Excellence and Service  CHRIST Deemed to be University Instruction Format Fixed length instruction format 32 bits long Three different instruction formats: 1. Immediate (I-type) 2. Jump (J-type) 3. Register (R-type) Excellence and Service  CHRIST Deemed to be University Instruction Format R-Type: I-Type: J-Type: Excellence and Service  CHRIST Deemed to be University Meaning of various fields in the instruction format ○ op: Opcode, Basic operation of the instruction, traditionally called the opcode. ○ rs : The first register source operand ○ rt : The second register source operand ○ rd : The register destination operand. It gets the result of the operation. ○ shamt / sa : shift amount ○ funct : function code Excellence and Service  CHRIST Deemed to be University Representing instructions in the computer MIPS instruction encoding Excellence and Service  CHRIST Deemed to be University Translating MIPS assembly instruction add $t0,$s1,$s2 In MIPS assembly language, registers $s0 to $s7 map onto registers 16 to 23 and Registers $t0 to $t7 map onto registers 8 to 15. Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Example Op rs rt rd Address/ funct shamt In MIPS assembly language, registers $s0 to $s7 map onto registers 16 to 23 and Registers $t0 to $t7 map onto registers 8 to 15. Excellence and Service  CHRIST Deemed to be University Excellence and Service  CHRIST Deemed to be University Exercise What MIPS instruction does this represent? In MIPS assembly language, registers $s0 to $s7 map onto registers 16 to 23 and Registers $t0 to $t7 map onto registers 8 to 15. Excellence and Service  CHRIST Deemed to be University Logical operations Excellence and Service  CHRIST Deemed to be University Shift Operations ▪ shamt (shift amount) tells by how many positions to shift ▪ Shift left logical ▪ shift left and fill with 0 bits ▪ sll by i bits multiplies by 2i ▪ Shift right logical ▪ shift right and fill with 0 bits ▪ srl by i bits divides by 2i Excellence and Service  CHRIST Deemed to be University Shift Operations ▪ Example 1: 0000 1001two = 9ten and the instruction to shift left by 4 was executed, the new value would be: 1001 0000two = 144ten ▪ Example 2: 0001 1000two = 24ten and the instruction to shift right by 3 was executed, the new value would be: 0000 00011two = 3ten Excellence and Service  CHRIST Deemed to be University AND operations Excellence and Service  CHRIST Deemed to be University OR operations Excellence and Service  CHRIST Deemed to be University NOT operations ▪ Useful to invert bits in a word ▪ Change 0 to 1 and 1 to 0 Excellence and Service  CHRIST Deemed to be University Instructions for making decisions Excellence and Service  CHRIST Deemed to be University Instructions to making decisions (CONTD..) ❖ bne register1, register2, L1 ▪ It means go to the statement labeled L1 if the value in register1 does not equal the value in register2. Excellence and Service  CHRIST Deemed to be University Instructions to making decisions (CONTD..) Excellence and Service  CHRIST Deemed to be University If-then-else Excellence and Service  CHRIST Deemed to be University while Excellence and Service  CHRIST Deemed to be University Branch addressing ▪ Branch instruction specify ▪ opcode, two registers, target address Example: bne $s0,$s1,Exit # go to Exit if $s0 ≠ $s1 Excellence and Service  CHRIST Deemed to be University Jump addressing (J-Type instruction) ▪ Consists of 6 bits for the operation field and the rest of the bits for the address field ▪ Example: j 10000 # go to location 10000 Excellence and Service  CHRIST Deemed to be University TARGET addressing example Excellence and Service  CHRIST Deemed to be University MIPS addressing mode 1. Immediate addressing: where the operand is a constant within the instruction itself 2. Register addressing: where the operand is a register 3. Base or displacement addressing: where the operand is at the memory location whose address is the sum of a register and a constant in the instruction 4. PC-relative addressing: where the branch address is the sum of the PC and a constant in the instruction 5. Pseudodirect addressing: where the jump address is the 26 bits of the instruction concatenated with the upper bits of the PC Excellence and Service  CHRIST Deemed to be University Addressing modes Immediate Addressing Mode Register Addressing Mode Base or Displacement Addressing Mode Excellence and Service  CHRIST Deemed to be University Addressing modes PC Relative Addressing Mode Pseudo Direct Addressing Mode Excellence and Service  CHRIST Deemed to be University RISC and CISC Reduced Set Instruction Set Architecture (RISC) – The main idea behind is to make hardware simpler by using an instruction set composed of a few basic steps for loading, evaluating and storing operations just like a load command will load data, store command will store the data. Complex Instruction Set Architecture (CISC) – The main idea is that a single instruction will do all loading, evaluating and storing operations just like a multiplication command will do stuff like loading data, evaluating and storing it, hence it’s complex. Excellence and Service  CHRIST Deemed to be University Performance Both approaches try to increase the CPU performance RISC: Reduce the cycles per instruction at the cost of the number of instructions per program. CISC: The CISC approach attempts to minimize the number of instructions per program but at the cost of increase in number of cycles per instruction. Earlier when programming was done using assembly language, a need was felt to make instruction do more task because programming in assembly was tedious and error prone due to which CISC architecture evolved but with up rise of high-level language dependency on assembly reduced RISC architecture prevailed. Excellence and Service  CHRIST Deemed to be University Characteristic of RISC 1. Simpler instruction, hence simple instruction decoding. 2. Instruction come under size of one word. 3. Instruction take single clock cycle to get executed. 4. More number of general purpose register. 5. Simple Addressing Modes. 6. Less Data types. 7. Pipeline can be achieved. Excellence and Service  CHRIST Deemed to be University Characteristic of CISC 1. Complex instruction, hence complex instruction decoding. 2. Instruction are larger than one word size. 3. Instruction may take more than single clock cycle to get executed. 4. Less number of general purpose register as operation get performed in memory itself. 5. Complex Addressing Modes. 6. More Data types. Excellence and Service  CHRIST Deemed to be University Example Suppose we have to add two 8-bit number: ○ CISC approach: There will be a single command or instruction for this like ADD which will perform the task. ○ RISC approach: Here programmer will write first load command to load data in registers then it will use suitable operator and then it will store result in desired location. So, add operation is divided into parts i.e. load, operate, store due to which RISC programs are longer and require more memory to get stored but require less transistors due to less complex command. Excellence and Service  CHRIST Deemed to be University Problem The IT department of our University is evaluating a new system to be purchased and because of your registration in the course of COA, the manager has asked you to take up the responsibility of running an appropriate benchmark application. The processor clock speed in this new system that is getting evaluated is 150MHz. When you decided on a benchmark application and analyzed its instruction mix, you observed that the instruction mix was approximately around 40% load & store instructions, 35% was arithmetic instructions and the balance was miscellaneous instructions. On an average, the load and store instruction was taking 5 cycles, Arithmetic instruction was taking 10 cycles and the miscellaneous instruction was taking 3 cycles. For the purposes of this specific benchmark application, lets assume that the processor is executing one instruction at a time Excellence and Service  CHRIST Deemed to be University Calculate the CPI for this chosen benchmark application. When you decided on a benchmark application and analyzed its instruction mix, you observed that the instruction mix was approximately around 40% load & store instructions, 35% was arithmetic instructions and the balance was miscellaneous instructions. On an average, the load and store instruction was taking 5 cycles, Arithmetic instruction was taking 10 cycles and the miscellaneous instruction was taking 3 cycles. Sol: CPI = 40*5+35*10+25*3/100 = 6.25 Excellence and Service  CHRIST Deemed to be University Calculate the “MIPS” processor speed for the benchmark in millions of instructions per second? MIPS = Clock rate/(CPI * 10^6) = 150*10^6/6.25*10^6➔24 Excellence and Service  CHRIST Deemed to be University If for some reason, the cycle time has to be increased by 25%, what would the new clock speed be? Sol: Cycle time = 1/Clock time = 1 / (150*10^6). Cycle time is increased by 25%. New cycle time =1.25 * 1 / (150*10^6)➔ 0.0083*10^-6 New Clock Speed =1/0.0083*10^-6➔120MHz Excellence and Service