Digital Systems, FPGAs, and Design Flow (Module 1) PDF

REVIEWER (HDL) varies as it can receive control input from other sources such as a start button or a MODULE I code, an opco...

REVIEWER (HDL) varies as it can receive control input from other sources such as a start button or a MODULE I code, an opcode that is used in DIGITAL SYSTEMS, FPGAs AND THE microprocessors. DESIGN FLOW × Control unit can also generate two or Signal more output control signals to communicate with other systems. × Commonly referred in electrical × Controls the flow of data in the datapath, engineering, communications and signal controls the datapath. processing, a signal gives information × Control Signals are discrete signals that about phenomena from the physical flows from control unit to datapath, world. Much like giving information signals vary from mux, encoders, about the difference between the time and decoders, adder, ALU. These are space of physical systems. functional units. × In mathematical terms, a signal can be in × Accepts input from control inuts. the form of a continuous- or discrete-like flows or function the corresponds to Datapath analog or digital signals, respectively. × Performs the operation on the received Digital Systems command from the control unit or other sources where each operation is × Has a blockbox that holds both datapath performed in one or more steps and each and control unit. steps takes a clock cycle. As it completes × A system composed of interconnected its task, it will generate a status signal modules that collects or handle discrete that is then read by the control block to signals to analyze and describe a define the sequence of operations to be physical-phenomena. performed and to know if there are any × A digital system contains two basic problems arouses from the datapath. components: Datapath and Control Unit × Feedback is the status signal made by the Control Unit datapath. × It there are any slippage in the output, it × Generates the control signals that goes to is called as overflow, the overflowing the datapath unit, aka, operational block. output is then registered in the overflow × The control signals it generates block. commands the desired operation in the datapath and the functions that it can do  × Half adder holds 2 or more inputs and FPGA Internal Organization results its output and the carry. × An FPGA is a chip whose internal logic Example of datapath blocks: can be changed even after it has been manufactured, making it field × Interconnection network – wires, programmable. multiplexers, buses, and tri-state buffers. × An FGPA functions similar to a × Functional units – adders, subtractors, microprocessor because the FPGA 5’s shifters, multipliers, and Arithmetic, operation can be changed base on the comparators, and ALU. requirements of the application. × Logic Unit (ALU) × It also uses a language to be able to × Memory Elements – registers, RAM configure but it is a hardware as the × Interconnection circuit – multiplexers, source code that is being written by its demultiplexers, encoders, decoders. developer in a hardware description and Field Programmable Gate Array (FPGA) becomes the internal logic configuration Ways to solve: of FPGA. × An FGPA chip is writable, meaning, its × ASIC – Application-specific Integrated internal logic can be changed, writable Circuit. technologies such as SRAM or FLASH. × Microprocessor (software solution) – × An FGPA has 3 main components; logic uses code languages such as C, Python, block (blue), I/O block (yellow), and and more. routing elements (pink). × FGPA – An intermediary solution as it × The logic block performs logic can be used to show both hardware and operations, also known as the processing software approaches. Its chip can be elements of the FPGA. placed in a PCB, and all its input and × The I/O blocks is the pins, it can be output pins should be connected. An configured function as an input, output FGPA solution is a hardware solution but pin, or both. it is flexible much like a software × The routing element is the connection solution where if there are any bugs or between the blocks. It is interconnected problems in the circuit, it can be changed to the logic block and I/O blocks. by placing it in the FGPA without PCB × An FPGA is a volatile memory, it must modifications that can be written in have a flash memory to recover the saved VHDL code. memory. Electronic Design Automation and The FPGA FPGA Devices and Platforms Design Flow × The FPGA internal organization is complex. × It is also the most user-friendly low level EDA tool. × FPGA devices are used in a motherboard and are not limited to motherboards only, it can also be used in other things. Writing Software for Microprocessors and VHDL Code for FPGAs × Every logic block has a look up table (LUT). × A hardware compiler is used to generate × LUT has mux and will output base on the a netlist like circuit to an FGPA. operation. × Its code is written in HDL. (Verilog or × Design Entry – Describe the circuits’ VHDL), as well as components available functionality. in libraries. × Simulation – Verifies the initial designs. × Synthesis – Converts HDL code into gate level netlist. × Place & Route – Uses tools like Quartus to map, place, and route the synthesized design to the FPGA. × Timing Simulation – Using ModelSim, verifies that the design meets timing constraints and functions correctly at the target clock speed. × FPGA Prototyping – The design is loaded onto the FPGA hardware for testing using tools like logic analyzers or oscilloscopes. × Circuit OK – If all things are good, the circuit is then ready and it functioning correctly.