BJT Transistor PDF
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This document provides a detailed overview of Bipolar Junction Transistors (BJTs). It covers topics like n-type and p-type materials, majority carriers, and the operation of BJTs. It's a great resource for understanding the fundamentals of semiconductors.
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BIPOLAR JUNCTION TRANSISTOR (BJT) Three doped semiconductor regions; emitter, base, and collector. We only consider NPN transistors (there are also PNP transistors). n-type material - majority carriers are free electrons (negative charges). p-type material - majority carriers are holes (positive c...
BIPOLAR JUNCTION TRANSISTOR (BJT) Three doped semiconductor regions; emitter, base, and collector. We only consider NPN transistors (there are also PNP transistors). n-type material - majority carriers are free electrons (negative charges). p-type material - majority carriers are holes (positive charges). ‘Bipolar’ - electrons and holes are involved in BJT operation. Two junctions: emitter-base (emitter diode) and collector-base (collector diode). At the manufacturing stage free electrons in the n-type emitter and collector regions diffuse across the junctions and combine with holes in the p-type base. This results in depletion regions surrounding each p-n junction. Each junction has a barrier potential VK 0.7 V for Silicon devices. Heavily doped emitter. Provides many free electrons as majority charge carriers. Lightly doped, thin base. Heavily doped collector. Low resistivity except for a region of less heavily doped material (relatively high resistivity) near the base. This ensures that when a voltage is applied between the collector and emitter terminals, a large potential difference (voltage) is present in the collector material close to the base. Consider the biased transistor shown below. When the base-emitter junction voltage VBE is VK , a small base current I B will flow into the base. Holes injected into the p-type base, attract electrons across the forward biased base-emitter junction. 1 Highly doped emitter - many electrons enter the base but only a few combine with the low number of holes in the lightly doped p-type base. Hence, there will be a large concentration of electrons in the base most of which are swept through the thin base and into the base-collector depletion region. These electrons experience a strong electric force field (in the base-collector depletion region), which transports them across the depletion region into the collector material and onwards towards the collector terminal. The size of I B determines the rate of electrons injected into the base from the emitter. The hole flow associated with this electron flow is the emitter current I E. A small I B leads to a large collector current IC , hence current amplification occurs. This is the main reason why transistors are so useful. Brightspace: BJT physics & operation video. www.learnabout-electronics.org/Semiconductors/bjt_04.php Currents Kirchhoff’s current law at the base gives I E I C I B. IC Transistor (DC) current gain dc . dc is 1 when the transistor is turned on (significant collector IB current flow). Its value depends on the transistor operating conditions. Useful relations. I C dc I B and I B I C dc. When the transistor is turned on, it is usually assumed that I C I E and I B I C. (Note: the topic of transistor dc is no longer considered) Example 1. A transistor has base and collector currents of 40 μA and 5.5 mA respectively. dc I C I B 5.5 103 40 106 138. Three basic BJT circuit configurations. Common Emitter (CE), Common Collector (CC) and Common Base. We will only consider the CE but will encounter the CC in Lab. 4. 2 Common Emitter (CE) The emitter has a common connection with the base and collector power supplies. In the configuration shown there is no emitter resistor, hence the emitter voltage VE 0. Base-emitter (B-E) loop. Base power supply VBB forward biases the emitter diode. Base resistor RB is a current setting (limiting) resistor. I B and thereby I C can be changed by adjusting VBB or RB. Collector-emitter (C-E) loop. Collector power supply VCC reverse biases the collector diode. The voltage drop across the collector resistor RC is VRC RC I C. Emitter diode I-V curve and model We will only use the VK 0.7 V emitter diode model: 0.7 V battery if the voltage to which it is connected (via a resistor(s)) is 0.7 V ; otherwise, it acts as an open circuit. B-E loop of the previous circuit 3 VBB VBE Apply Kirchhoff’s Voltage Law (KVL) to get VBB RB I B VBE 0 , hence I B . RB VBB 0.7 Assuming VBB 0.7 V then I B . RB Apply KVL to the C-E loop to get VCE VCC I C RC. Transistor power dissipation is (approximately) PBJT VCE I C (Note. VCE I C VBE I B ). Transistor DC Model Assuming a particular value of dc the transistor DC model is, Example 2. Determine I B , I C , VCE , PBJT and the circuit power dissipation if the transistor dc 120. Answer. I B 43 μA , IC 5.2mA , VCE 4.8V , PBJT 25mW , Ptotal 52mW. 4 Transistor Collector Curves and Regions of Operation Collector curves are plots of I C vs. VCE for different values of I B. Cutoff. When I B 0 then I C 0 (typically in the 100 nA range). Saturation region. VCE is not large enough to enable the collector to collect all of the electrons emitted into the base. Transistor switch circuits use the saturation and cutoff regions. Active region. The collector collects most of the electrons injected by the emitter into the base. I C is almost independent of VCE. This region of operation (linear for small signals; doubling I B will double I C ) is used in amplifier circuits. The actual value of transistor dc in a given circuit depends on the transistor, I C and temperature. dc is the same as the DC h (hybrid) parameter hFE (Brightspace 2N3904 transistor data). A circuit design that depends on an assumed value of dc might not work in practice. Techniques are needed such that transistor circuit operation is effectively independent of dc (assumed 1). 5 Base bias Consider an example base bias circuit. It is convenient to use a single supply VCC. RB is sets the value of I B. 12 0.7 IB 31μA. 360 k If dc 75 , then the transistor Q-point is I C 75 31 μA 2.4 mA and VCE VCC RC I C 9.2 V (equal to the collector voltage VC because VE 0 V ). Load line analysis – used to get a more accurate estimation of the Q-point. Apply KVL to the C-E loop to get the load line ( I C vs. VCE ), VCC VCE IC Load line RC The load line is a relationship between the transistor output variables IC and VCE. The load line contains every possible operating point for the transistor in the circuit. The load line is plotted below for the previous circuit along with some typical collector curves (for the transistor used). 6 The Q-point is the intersection point between the load line and the transistor curve corresponding to I B 31μA. Use the curve with the closest I B value or an estimate between the two nearest curves. Here it is sufficiently accurate to use the I B 30 μA curve; hence the Q-point is VCE 5.2 V , I C 5.7 mA. The actual dc = 5.7 mA/30 A = 190. Saturation point Reducing RB increases I B , which in turn increases I C. The increased voltage drop across RC reduces VCE. VCE cannot be < 0 V. When VCE is 0 V , the transistor cannot supply any more I C. The transistor goes into saturation; I C has reached its maximum possible value, which cannot be exceeded even with further increases in I B. In the saturation region VCE is small - the saturation point almost touches the upper end of the load line. The saturation point is approximated as the upper end of the load line. To get the (collector) saturation current, set VCE 0 V in the load line equation to get, VCC I C ,sat (10 mA in the previous circuit) RC Cutoff point is the point at which the load line intersects the cutoff region. In this region I C is very small. The cutoff point is the lower end of the load line. From the load line equation when IC 0 , then VCE ,cutoff VCC ( 12 V in the previous circuit), which is the maximum possible value of VCE. To plot the load line, draw a line between the saturation and cutoff points. In base bias circuits, the Q-point is sensitive to changes in dc. How do we know if a transistor (assuming it is turned on) in a circuit is in its active or saturation region? Assume active region operation and carry out calculations for currents and voltages. If we get an impossible result for any of the calculations, then the transistor must be in saturation. Example 3. (a) Calculate the saturation and cutoff points. Draw the load line. (b) If the lowest value of the transistor active region dc is 50, determine if the transistor is saturated and I C and VCE. 7 Current gain in the saturation region - in the previous circuit, the actual dc 38. The value of dc in the saturation region is less than its active region value (assuming the same value of I B ). Transistor switch Base bias configuration designed to operate in saturation or cutoff. Consider the example circuit, Calculate I C , sat 10 1k 10 mA. Base switch closed. I B (10 0.7) 10k 0.93 mA The dc value shown is the assumed active region value. We expect IC dc I B 46.5 mA , which is I C ,sat , hence the transistor is saturated and so the actual I C I C ,sat 10 mA and VCE 0 V. VE 0 V , hence Vout VCE 0 V. The actual value of dc (for closed base switch) is = 10 mA/0.93 mA = 11. Base switch open. I B 0 A , hence IC 0 A (cutoff) and Vout 10 V. The switch has only two possible output voltage levels (high or low) and collector current levels. Voltage Divider Bias (VDB) The most common type of active region biasing circuit (used in amplifiers). The Q-point must be insensitive to variations in dc. If the transistor input resistance (looking into the base) Rin is R1 || R2 , then the base voltage (bias) R2 VB VCC. R1 R2 8 Exercise. Assuming VBE 0 V (emitter diode VK 0 V ), show that Rin dc RE. VB 0.7 If VB 0.7 V , then I E . RE Assuming dc 1 , then IC I E. Apply KVL to the C-E loop: VCE VCC IC ( RC RE ). VCC VCE VCC IC Load line (assuming 1 ). I C , sat Saturation current RE RC R E RC As long as dc 1 , then the Q point is insensitive to changes in dc. VDB bias circuits are often designed such that VCE 0.5VCC (Q-point at the centre of the load line), VE 0.1VCC and so VCC 0.4VCC at some specified I C. Such circuits need to ensure that R1 R2 0.01 Rin at the lowest active region value of the transistor dc at the specified I C. Example 4. For the following circuit, determine the transistor Q-point. Answer. VCE 4.9 V , I C 1.1 mA. Determine the approximate power dissipation of the circuit. Exercise. If the transistor 75 dc 250 , determine the minimum/maximum possible base currents. Answer. 4.4 A, 14.7 A. Tutorial Q1. Base Bias - State if each statement is true or false. Most of the electrons in the base of an NPN transistor flow. (a) Into the collector, (b) into the emitter, (c) into the base supply. In the active region, increasing the collector supply voltage will increase. (a) Base current, (b) collector current, (c), emitter current, (d) none of the above. Q2. (a) Design a base bias circuit using a transistor having dc 100 and a 12 V supply to meet the specifications: I C 10mA and VCE 6V. (b) Calculate the transistor power dissipation. (c) Draw the load line and mark the Q-point. 9 Q3. State if each statement is true or false. VDB normally acts in the. (a) Active region, (b) cutoff region, (c) saturation region, (d) breakdown region. The collector voltage of a VDB circuit is sensitive to changes in (a) Supply voltage, (b) emitter resistance, (c) current gain, (d) collector resistance. Q4. Voltage divider bias. Small-signal AC models The transistor is assumed to be biased in the active region. We only consider frequency independent transistor models. The small-signal AC current gain is defined as the ratio of the small-signal collector current ic to the base current ib. ic ib AC current gain ( I C dependent) BJT small-signal properties are often modelled using four small-signal h (hybrid) parameters. In data sheets h fe. 10 ic ib corresponds to a current controlled current source. The AC base resistance r vbe ib is the slope of the emitter-diode I B vs. VBE curve. In data sheets r hie. vbe r Assuming 1 then ie ic , hence the AC emitter resistance re . ie 25mV For all types of BJT, at 20 C , re AC emitter resistance. Know this fact! IE Also r re. re depends on the DC emitter current. For example, re 5 Ω when I E 5mA. Assuming 1 , then ic ie , hence ic gmvbe , i.e. a voltage controlled current source. 1 IE gm Transconductance gm Know this fact! re 25 mV For example, g m 200 mS , when I E 5mA. If vbe is small, ie will have the same shape as vbe , otherwise ie will be distorted (have a different shape compared to vbe ). The above relationships between currents and voltages leads to the transistor small-signal model. The following form of the model is the same as that above except that the CE type connection (B-E and C- E loops) is clearer. 11 There is also a transistor T model – this topic is no longer considered. CE amplifier Coupling and bypass capacitors act as AC short and DC open circuits. Bias (DC) conditions - determine using usual methods; capacitors act as open circuits. The transistor Q-point must be in the active (linear) region. If the input signal is too large, the output signal will be distorted when the transistor enters its saturation region or cutoff region. The amount of distortion tolerable depends on the application. www.falstad.com/circuit/e-ceamp.html. Brightspace - Video Lessons - BJT amplifier distortion. v Voltage gain is the ratio of the AC output to input voltages Av out. vin An AC voltages is usually specified in terms of its amplitude, peak-to-peak, or RMS value. DC analysis. Capacitors act as open circuits. I E is required to determine re and g m. AC analysis. Need a circuit model - replace capacitors by short circuits (usually), DC supplies by ground connections and represent the transistor by a small-signal model. 12 Within the amplifier operating frequency range: Input coupling capacitor reactance must be the AC input resistance rin R1 || R2 || r. Load coupling capacitor reactance must be RL. Emitter resistor bypass capacitor reactance must be RE and re. First, we will determine the amplifier Thévenin model omitting the load. The amplifier model is, Amplifier input AC resistance rin R1 || R2 || r. To get the amplifier output AC resistance, remove the current source and determine the resistance looking into the amplifier from the output terminals (Thévenin). It is easy to see that it is equal to RC. B - E loop vbe vin (dropped across R1 || R2 || r ). C - E loop vout ic RC Note the defined positive direction of vout. g m RC vbe g m RC vin vout Open circuit load voltage gain Ath vin g m RC (inverting amplifier) RC I E 25 mV Exercise. Derive Ath using the T model based amplifier circuit model. The amplifier model including the finite load is, 13 RL vout vth (voltage division) RL RC RC RL gm vin RL RC g m rc vin rc RC RL is the collector AC resistance (looking out from the collector). If RL is an open circuit, then rc RC. Voltage gain Av g m rc rc I E The gain in dB is 20log10 | Av |. 25 mV (can also be derived by placing RL in || with RC in model above) If RL is not RC then Av will be less than its maximum (and load independent) value Ath. RC is usually quite large; as such CE amplifiers are not suitable for directly driving low resistance loads. This disadvantage can be overcome by inserting a Common Collector (CC) amplifier between the CE amplifier and the load. A CC amplifier has very high input resistance and relatively low output resistance, thereby isolating the load from the CE stage. You will encounter such a circuit in Lab 4. Exercise. Calculate the Thévenin model values for the amplifier of page 12 for an open circuit load. Calculate the gain with RL included. Answer. 60 (35.6 dB). Tutorial. CE amplifier with feedback The amplifier includes a non-bypassed emitter resistor RE1 , which results in negative feedback thereby reducing the voltage gain sensitivity to variations in the Q-point. Suppose the AC collector current increases due to a temperature rise. This leads to an increase in the output voltage (and voltage gain). However, the voltage drop across RE1 also increases, which leads to a reduction in vbe , which then reduces the AC collector current and hence the voltage gain. Using the transistor model in its current controlled current source form to derive expressions for (1) voltage gain and (2) base input AC resistance. 14