Introduction to Embedded Systems.pdf

Introduction to Embedded Systems Ing. Jhon Ordoñez Definition Electronic device for specific applications. It has a computing element. It is resource-constrained device Some possible examples: - Calculator (make calculations, DSP, low power/small device) - Laptop (make a lot of things, Processor,...

Introduction to Embedded Systems Ing. Jhon Ordoñez Definition Electronic device for specific applications. It has a computing element. It is resource-constrained device Some possible examples: - Calculator (make calculations, DSP, low power/small device) - Laptop (make a lot of things, Processor, High power) - Iron (clothes, ?, high power in range) -Speaker: if it is analogic, it isn't an embedded system. If it has bluetooth connection, it is a embedded system. Features of embedded systems -Specific Application -Computing element (Processor, MCU, DSP, SoC, FPGA, ASIC) -Resource-constrained(size, power, area ICs) -Not programmable by user (just change settings , update firmware) -Efficiency (trade off performance vs power vs area) -Mass production -It has peripherals Examples -Air conditioning (decrease temperature, MCU+DSP, price as low as possible, user can only change settings,Low power / smart, 1000s of unit manufactured) -Gaming console (play games, SoC+GPU, low power, system updates,low power and fps, YES ) -Gaming control(play games, SoC, power,firmware it not update, low power, YES ) -Tester:(MCU at least) -Oximeter: it is Computing Technologies -General Purpose Processor: Widely used, easy to use, first experience on programming, High/Medium Performance, High/Medium power, limited efficiency. It has no peripherals(it needs a motherboard) E.g. Intel Core i7, Intel Celeron. -Multiple cores -has cache -High Frequency -Few Architectures Computing Technologies -General Purpose Processor Computing Technologies General Purpose Processor - ISA (Instruction Set Architecture): x86/64, PowerPC, - Microarchitecure/ computer organization: coffee lake, raptor lake, Sandy Bridge - Frequency(~2 to 5.x GHz) - Memory(Off chip) for RAM memory - Cache memory(L1,L2,L3) fast memory - Size: L3>L2>L1 - Speed:L1>L2>L3 - Power(100-200W) Computing Technologies Instruction based Processor Integrated Circuit Integrated circuit that integrates with a processor. For specific application -MCU: MicroController Unit : micro Processor + memory+ peripherals + buses - ISA (Instruction Set Architecture): plenty architecture, even one architecture per Manufacurer (ARMv7-M, TI-16-bit RISC, AVR Advanced RISC, MIPS, Microchip 16-bit PIC) - Microarchitecure/ computer organization: close related to architecture - Frequency(8 MHz to ~300MHz ) - Memory(On chip) for RAM memory - Cache memory: few MCUs have cache - Power(~10s uW to 2W) -DSP: Digital Signal processor -SoC: System on a Chip Computing Technologies Instruction based Processor Integrated Circuit -DSP: Digital Signal Processor : Processor + memory(optional)+ peripherals + buses - ISA (Instruction Set Architecture): limited number of Instruction, depends on application - Microarchitecure/ computer organization: simple - Frequency(8 MHz to ~1GHz ) - Memory(On chip/Off chip) - No Cache memory - Power(~10s mW to ~3W) - Usually a DPS is within MCU, SoC, FPGA, ASIC, among others - Usually comes with ADC, DAC - Apps(audio, filters, arithmetic, etc) -SoC: System on a Chip Computing Technologies Instruction based Processor Integrated Circuit -SoC: System on Chip: Processor + peripherals + buses - ISA (Instruction Set Architecture): few architecture (ARMv7-A, ARMv8-A,ARM9) - Microarchitecure / computer organization: close related to architecture - Frequency(1 to 2.xGHz ) - Memory(Off chip) for RAM memory - Cache memory: (L1,L2) - Power(5W to 15W) - Usually able to run an OS - Eg. Samsung Exynos, Mediatek Helio, Apple A11…A13, M2,M3, - cellphones , single board computer, desktop computers, smartwatch Computing Technologies Instruction based Processor Integrated Circuit -GPU: Graphics Processing Unit - ISA (Instruction Set Architecture): some architectures (Nvidia CUDA, ARM, Qualcom,) - Nvidia: lovelace, Ampere, Turing, Pascal, among others - AMD: Hotpink Bonefish - ARM: Mali - Qualcom: Adreno - Microarchitecure / computer organization: close related to architecture - Frequency(~1 to ~2GHz ) - Memory(Off chip) for RAM memory - Cache memory: (L1,L2) - Power(100W to 400W / NVIDIA) - Needs a Host(Processor) - Eg. ARM Mali, Nvidia, AMD, Adreno, Apple GPU, - cellphones , some single board computer, gamers computers, smartwatch Computing Technologies Reconfigurable Technologies -FPGA: Field-Programmable Gate Array - obsolete techs: CPLD, PAL,PLA - Connections are programmable - Implements any digital circuit(even GPU, processor) and/or evaluate them. It is used as EDA tool(Electronic Design Automation) - Developers codify HDL(Hardware Description Language): VHDL(Very-high speed integrated circuit Hardware Description Language), Verilog - Very Efficient: Low Frequency/ high performance - Very specific/special/secret applications - Manufacturers: AMD(Xilinx), Intel(Altera) Computing Technologies Reconfigurable Technologies -FPGA: Field-Programmable Gate Array Computing Technologies -ASIC: Application-Specific Integrated Circuit Highest performance, high efficiency(TOP) Engineers develops hardware(HDL, VLSI(Very-large-scale integration)) Few commercial ICs Mass production For certain applications like military, medical, scientific, etc Microcontroller -It is an integrated circuit that combines processor, memory, peripherals and buses, and it is able to control a system. Processor core: small, low power Memory: Data memory (SRAM), Program memory (Flash) Peripherals: ADC, DAC, GPIO, Timers, UART, I2C, CAN, etc Buses: high-speed (Processor) / peripheral speed Microcontroller Processor Core Most important part of MCU. It executes instructions. PC: Program Counter Control Unit Register File ALU: Arithmetic & Logic Unit SP: Stack Pointer Processor Core Most important part of MCU. It executes instructions. PC: Points the instructions from program memory. Move from one instruction to another(next one) IR: Instruction register, stores the current instruction Control Unit: takes instruction(which decoded) and send a lot of control signals to execute micro instructions Processor Core Most important part of MCU. It executes instructions. Register file: Set of fast registers that store temporary data to be processed. Normally 8,16,32 registers ALU: Processor Core ALU: Arithmetic logic unit Performs logic(AND, OR, XOR,etc ) and arithmetic(ADD, SUB, MULT, ACC, etc) operations Takes 2 operands(inputs), 1 outputs. An operation is specified Some flags: ○ Zero: result is zero ○ N(Negative): result is negative ○ O(Overflow): sign bit changed ○ C(Carry out): additional bit Processor Core ALU: Arithmetic logic unit ○ O(Overflow): sign bit changed ○ C(Carry out): additional bit 11010011(-45)+ 01110000(112) 101000011(67) todo OK carry out 1 Processor Core ALU: Arithmetic logic unit ○ O(Overflow): sign bit changed ○ C(Carry out): additional bit 01010011(83)+ 01110000(112) 11000011(-61) overflow is 1 Processor Core Register File General purpose Registers Special register ○ Status register Processor Core SP:Stack Pointer Points some data from data memory. Uses data memory as temporary memory Two operations: ○ Push: add data ○ Pop: remove data Processor core ARCHITECTURE Von Neumann Program and date comes together(same memory, same bus). It generates bottlenecks. Harvard Two different memories (data and program) Processor core ARCHITECTURE INSTRUCTION SET ISA: Instruction Set Architecture Instruction size Execution speed Available instructions Addressing modes Processor core ISA: Instruction Set Architecture Instruction size ○ CISC: Complex Instruction Set Computer(e.g. Intel, Motorola) ○ RISC: Reduced Instruction Set Computer(ARM) Execution speed Available instructions Addressing modes Processor core ISA: Instruction Set Architecture: CISC vs RISC Processor core ISA: Instruction Set Architecture: RISC Opcode: A binary number that represents an instruction Processor core Processor Cycle: Fetch: Takes the instruction from program memory Decode: Translate/understand/convert the instruction to send control signal Read data: read data from data memory Execute: performs operations Store: Send/write results to data memory Processor core Processor Cycle: Fetch: Takes the instruction from program memory Decode: Translate/understand/convert the instruction to send control signal Read data: read data from data memory Execute: performs operations Store: Send/write results to data memory 5 instructions> 8 cycles 6 instructions > 9 cycles 10 instruction > 13 cycles 10 000 instructions > 10 003 cycles Processor core Instructions Instruction size Processor core Instructions Addressing modes Processor core Instructions Addressing modes Microcontoller board https://www.st.com/en/evaluation-tools/nucleo-l4r5zi.html Alex Villanueva 78851558 [email protected] MEMORY Classification: Volatile Memory: It loses information is there is no power supply -faster SRAM (Static Random Access Memory) DRAM (Dynamic Random Access Memory) Non-volatile memory: It keeps information is there is no power supply -slower than volatile memory ROM PROM EPROM EEPROM Flash NVRAM MEMORY Volatile Memory SRAM (Static Random Access Memory) ○ Faster than DRAM ○ More expensive than DRAM ○ size/capacity is lower than DRAM ○ It based on latches (1 bit of information = 1 latch~= 8 transistors) ○ Data is stored in arrays ○ It is in MCUs as data memory (16,32,64,128,256 KB) DRAM (Dynamic Random Access Memory) MEMORY Volatile Memory SRAM (Static Random Access Memory) ○ Faster, more expensive, smaller than DRAM DRAM (Dynamic Random Access Memory) ○ 1 bit of information = 1 capacitor ○ Because of RC circuit, DRAM needs to be refreshed ○ Because of charging and discharging time, it is slower ○ Since size/capacity is larger, it is in our computers as SDRAM( RAM slots) MEMORY Non-volatile memory: ROM ○ Read-only memory ○ Its content is specified to the manufacturer PROM ○ Programmable ROM ○ It contents fuses, at the beginning all fuses stored 1’s, if a fuses is broke, a 0 is stored EPROM ○ Erasable PROM ○ It is based on FET transistor, voltage is stored in a floating gate ○ Floating gates states are changed by high voltage(avalanche injection) ○ There is a leakage current. To avoid/improve this, UV light is applied to reprogram the memory MEMORY Non-volatile memory: EEPROM ○ Electrically EPROM ○ Instead of a high voltage applied to the gates, change pumps are needed ○ The issue: limited number of read/write cycles(~100 000) FLASH ○ It is a EEPROM but cheaper ○ It is like a limited EEPROM, information is stored in blocks(flash erase) ○ The # of write/cycles is less than EEPROM(~10 000) MEMORY HIERARCHY REGISTER SIZE/CAPACITY SPEED CACHE MEMORY DATA PROCESSING(RAM) STORAGE MEMORY HIERARCHY STORAGE ○ Slowest, but high capacity(~GB,TB) ○ Non-volatile memory ○ HDD(Hard Disk Drive), SSD(Solid State Drive) ○ OS is store here Data memory(RAM) ○ Faster than Storage, capacity(8GB,16GB,32GB ,etc) ○ volatile memory ○ SDRAM(for desktop computer), SRAM(for MCU) ○ It processes the data to run/execute tasks ○ It is called Random Access Memory because access time is the same regardless the address. MEMORY HIERARCHY CACHE ○ Close to the processor. It is within of the processor(On-chip) ○ 1-3 levels(L1,L2,L3) L1: 512KB 1.2MB, 1.2MB (per core ) L2: 4MB, 11MB 11.5MB (shared by group) L3: 16MB, 24 MB 24 MB (Shared ) ○ Few MB of size ○ It looks for instruction and data from RAM. Two main terms: hint and miss Register ○ The fastest memory, closest to uP ○ As fast as the uP ○ Few Bytes (32 registers=32 x 64bits=32*8bytes=256bytes) ○ It the aforementioned register file/bank MEMORY SEGMENTS Every instruction(operation), data(variable), it is located somewhere in the memory. There are certain addresses range to refer them. Text segment: stores executable instructions/code Uninitialized data segment: all variable that are initialized to 0 before the main(). All global not initialized variables are here. Initialized data segment: global and static variables initialized Stack: Local variables Heap: memory used dynamically. Pointer, malloc(), calloc(), free() MCU Board Development board: Arduino Uno Development board: EK-TM4C1294XL MCU: atmega328p MCU: tm4c1294ncpdt uP: 8bit-AVR uP: ARM Cortex M4 Arch: Advanced RISC Arch: Armv7-M SRAM FLASH SRAM FLASH 2KB 32kb 256KB 1MB TEAMS Juan Manuel Linares, Victor Hugo Aviles (L4R5) picked up Pedro Bellot, Rodrigo Burgoa ordered Nicolas flores, Fernando Palacios picked up Alexis Cortes, Gerardo Michaga (Nucleo L476RG) Jonathan Reyes, Andres García ordered Enrique Rodriguez, Daviel Silvestre picked up Anderson Mayorga, Camilo Saldias MCU Board MCU Board Acronyms BSP: Board Support Package PLL: Phase-Locked Loop (It is a frequency multiplier) Acronyms LAB Prescaler:Frequency divider GPIO: General Purpose Input Output Coding flow Inside main() ○ Setup Clock (main/general clock, peripheral clock) ○ Setup peripherals ○ Use peripherals(most of them with while(1))