Computer Architecture Lecture Notes PDF

1 Computer Architecture Lecture 4: A Top-Level View of Computer Function Dr. Abdelrahman Morsi [email protected] School of Artificial Intelligence & Data Management Badr University in Assiut...

1 Computer Architecture Lecture 4: A Top-Level View of Computer Function Dr. Abdelrahman Morsi [email protected] School of Artificial Intelligence & Data Management Badr University in Assiut November 2nd, 2024  2 Contents 1. Review 2. Computer Components 3. Computer Function 4. Interconnection Structures 5. Important Remark  3 Contents 1. Review 2. Computer Components 3. Computer Function 4. Interconnection Structures 5. Important Remark Review 4 Review on the Previous Lecture 1. Designing for Performance 3. Performance Assessment 1st Factor: Microprocessor Speed Key Parameters to Evaluate Processors 2nd Factor: Performance Balance Clock Speed 3rd Factor: Improvements in Chip Organization Instructions per Second and Architecture Averaging Results and Speed Up Computation 2. The Evolution of the Intel Architecture Ancient History (4004, 8080) Very Old History (8086, 80286) Old History (80386, 80486) Recent History (Pentium, Pentium Pro, Pentium II, Pentium III, Pentium 4, Core 2) CISC vs. RISC  5 Contents 1. Review 2. Computer Components 3. Computer Function 4. Interconnection Structures 5. Important Remark Computer Components 6 What Is a Programming? Hardware programming: A small set of basic logic components can be combined in various ways to store binary data perform arithmetic and logical operations on that data For a particular computation, a specific configuration of logic components could be constructed This process of construction a desired configuration can be considered as a form of programming The resulting “program” is in the form of hardware and is termed a hardwired program In this case, the system accepts data and produce results Computer Components 7 What Is a Programming? (Cont.) Software programming: A general-purpose configuration of arithmetic and logic functions can be constructed This set of hardware will perform various functions on data depending on applied control signals In this case, the system accepts data and control signals and produce results Thus, instead of rewiring the hardware for each new program, the programmer needs to supply a new set of control signals How shall control signals be supplied? Computer Components 8 What Is a Programming? (Cont.) Software programming: The entire program is actually a sequence of steps At each step, some arithmetic or logical operation is performed on some data For each step, a new set of control signals is needed There is a unique code for each possible control signals Thus, a new segment (instruction interpreter) is added to the general-purpose hardware that can accept a code and generate control signals Therefore, for each new program, a new sequence of codes will be provided ⇒ software program Computer Components 9 What Is a Programming? (Cont.) Software programming: Two major components of the system are shown: Instruction interpreter Module of general-purpose arithmetic and logic functions These two segments constitute the CPU Other components are needed to yield a functioning computer, such as: Main memory I/O module System Bus Computer Components 10 Top-Level Components Main memory: It consists of a set of locations, defined by sequentially numbered addresses Each location contains a binary number that can be either an instruction or data I/O module: It transfers data from external devices to CPU and memory, and vice versa It contains internal buffers for temporarily holding these data Computer Components 11 Top-Level Components (Cont.) CPU: PC: Contains the address of the next instruction to be fetched from memory IR: Contains the 8-bit opcode instruction being executed MAR: Specifies address in memory for the next read or write MBR: Contains the data to be written into memory or read from memory I/O AR: specifies a particular I/O device I/O BR: is used for the data exchange between an I/O module and the CPU  12 Contents 1. Review 2. Computer Components 3. Computer Function 4. Interconnection Structures 5. Important Remark Computer Function 13 Basic Instruction Cycle The basic function performed by a computer is execution of a program, which consists of a set of instructions stored in memory Simply, instruction cycle consists of two steps: Fetch: reads instruction from the memory Execute: performs the specific operation of the fetched instruction Program execution consists of repeating these two steps Computer Function 14 Instruction Fetch and Execute Fetch cycle: Execute cycle: Program Counter (PC) holds address of Processor interprets instruction and next instruction to fetch performs required actions: Processor fetches instruction from Processor-memory: data transfer between memory location pointed to by PC CPU and main memory Processor I/O: Data transfer between CPU Increment PC and I/O module Unless told otherwise Data processing: Some arithmetic or logical Instruction loaded into Instruction operation on data Register (IR) Control: An instruction may specify that the sequence of execution be altered, e.g., jump Computer Function 15 Simple Example Using Hypothetical Machine Consider a simple example using a hypothetical machine that includes the following characteristics: 1. Instruction format (16 bits long): 4 bits for the opcode ⇒ 24 = 16 different opcodes 12 bits for the address ⇒ 212 = 4 KB maximum size of memory that can be addressed 2. Data format (16 bits long): 1 bit for the sign (0 ⇒ +, 1 ⇒ −) and 15 bits for the magnitude Computer Function 16 Simple Example Using Hypothetical Machine (Cont.) Consider a simple example using a hypothetical machine that includes the following characteristics: 3. Internal CPU registers: Program counter (PC) = Address of instruction Instruction register (IR) = Instruction being executed Accumulator (AC) = Temporary storage 4. Partial list of opcodes 00012 = 116 ⇒ Load AC from memory 00102 = 216 ⇒ Store AC to memory 01012 = 516 ⇒ Add to AC from memory Computer Function 17 Simple Example Using Hypothetical Machine (Cont.) The following steps illustrate a partial program execution: 1. PC contains 300, the address of the first instruction (1940 in hexadecimal) ⇒ 1940 is loaded into IR, and then PC will be 301 2. Opcode in IR (1940) indicates that AC is to be loaded from the address 940 ⇒ AC contains 0003 Computer Function 18 Simple Example Using Hypothetical Machine (Cont.) The following steps illustrate a partial program execution: 3. The next instruction (5941) is fetched from location 301 to IR, and then PC will be 302 4. Opcode in IR (5941) indicates that old contents of the AC and contents of location 941 are added ⇒ AC contains 0005 Computer Function 19 Simple Example Using Hypothetical Machine (Cont.) The following steps illustrate a partial program execution: 5. The next instruction (2941) is fetched from location 302 to IR, and then PC will be 303 6. Opcode in IR (2941) indicates that contents of the AC are stored in location 941 ⇒ location 941 contains 0005 Computer Function 20 Interrupts Interrupt is a mechanism by which other modules (e.g. I/O) may interrupt normal sequence of processing Examples: Program e.g. overflow, division by zero Timer Used in multi-tasking I/O from I/O controller Hardware failure e.g. memory parity error Computer Function 21 Interrupt Cycle Added to instruction cycle Processor checks for interrupt Indicated by an interrupt signal If no interrupt, fetch next instruction If interrupt pending: Suspend execution of current program Save context Set PC to start address of interrupt handler routine Process interrupt Restore context and continue interrupted program Computer Function 22 Multiple Interrupts So far, we focused only on the occurrence of a single interrupt, however, multiple interrupts can occur Two approaches can be taken to dealing with the multiple interrupts 1. Disable interrupts Processor will ignore further interrupts while processing one interrupt Interrupts remain pending and are checked after the first interrupt has been processed Interrupts handled in a sequence as they occur ⇒ sequential approach 2. Define priorities Low priority interrupts can be interrupted by higher priority interrupts When higher priority interrupt has been processed, processor returns to the previous interrupt It allows a nested interrupt processing ⇒ nested approach Computer Function 23 Multiple Interrupts: Sequential Approach Computer Function 24 Multiple Interrupts: Nested Approach Computer Function 25 Multiple Interrupts: Nested Approach (Cont.) Priorities: Printer: 2 Disk: 4 Communication: 5 Each interrupt takes 10 sec. Occurrence Time: Printer: at 𝑡 = 10 sec. It is hold till the others have been processed Communication: at 𝑡 = 15 sec. Disk: at 𝑡 = 20 sec. It is hold till the communication interrupt has been processed  26 Contents 1. Review 2. Computer Components 3. Computer Function 4. Interconnection Structures 5. Important Remark Interconnection Structures 27 Memory A memory module will consist of 𝑁 words of equal length Each word is assigned a unique numerical address (0, 1,... , 𝑁 – 1) A word of data can be read from or written into the memory The nature of the operation is indicated by read and write control signals The location for the operation is specified by an address Interconnection Structures 28 I/O Module I/O is functionally similar to memory as there are two operations, read and write The I/O module may control more than one external device The interface to an external device is referred to as a port Each port is given a unique address 0, 1, … , 𝑀 − 1 There are external data paths for the input and output of data with an external device The I/O module may be able to send interrupt signals to the processor Interconnection Structures 29 CPU The processor reads in instructions and data It also receives interrupt signals It writes out data after processing It outputs control signals to control the overall operation of the system It also generates the address of the memory location or I/O port Interconnection Structures 30 BUS Structure A bus is a communication pathway connecting two or more devices A key characteristic of a bus is that it is a shared transmission medium Multiple devices connect to the bus, and a signal transmitted by any one device is available for reception by all other devices attached to the bus However, only one device at a time can successfully transmit Typically, a bus consists of multiple communication pathways, or lines Each line is capable of transmitting signals representing binary 1 and binary 0 Several lines of a bus can be used to transmit binary digits simultaneously, e.g., an 8-bit unit of data can be transmitted over eight bus lines (8-bit data bus) A bus that connects major computer components (processor, memory, I/O) is called a system bus Interconnection Structures 31 BUS Structure (Cont.) 1. Data bus: It carries data (or instruction) Width is a key determinant of performance, e.g., 8, 16, 32, 64 bit 2. Address bus: It identifies the source or destination of data Bus width determines maximum memory capacity of system, e.g., 16 bit ⇒ 216 = 64 KB 3. Control bus: It provided control and timing information, such as: Memory (or I/O) read/write signal Interrupt request Clock signals Interconnection Structures 32 BUS Structure (Cont.)  33 Contents 1. Review 2. Computer Components 3. Computer Function 4. Interconnection Structures 5. Important Remark Important Remark 34 Notice of Quiz No. 3 There will be a Quiz on Lecture 4 at the beginning of the next Classes: Saturday, November 9th, 2024 ⇒ Group L2A Tuesday, November 10th, 2024 ⇒ Group L2B