EECE/ECIE 3316 Computer Architecture Assignment 2 2023-2024 PDF
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International Islamic University Malaysia
2024
INTERNATIONAL ISLAMIC UNIVERSITY MALAYSIA
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Summary
This document is an assignment for a computer architecture course. It contains questions related to cache configurations, multiplication algorithms, and execution sequences. Students need to specify how 28-bit addresses are partitioned in different cache configurations, and perform multiplication using Booth Algorithm and verify results using bit pairing recoding. It explores in-order-issue/in-order-completion execution sequences and possible fixes for stalled execution stages.
Full Transcript
INTERNATIONAL ISLAMIC UNIVERSITY MALAYSIA EECE/ECIE 3316 Computer Architecture and System Design Assignment No 2 Semester 1, 2023-2024, Submission date 10 Jan 2025 1. Suppose physical addresses are 28 bits wide. Suppose there is a cache containing 128K words of data (not including...
INTERNATIONAL ISLAMIC UNIVERSITY MALAYSIA EECE/ECIE 3316 Computer Architecture and System Design Assignment No 2 Semester 1, 2023-2024, Submission date 10 Jan 2025 1. Suppose physical addresses are 28 bits wide. Suppose there is a cache containing 128K words of data (not including tag bits), and each cache block contains 4 words. For each of the following cache configurations, a. direct mapped b. 2-way set associative c. 4-way set associative d. fully associative specify how the 28-bit address would be partitioned. For example, for a direct mapped cache, you would need to specify which bits are used to select the cache entry and which bits are used to compare against the tag stored in the cache entry. (10 marks) 2. Let multiplicand A = 110101 and multiplier B = 110111. Multiply the given signed 2’s complement number using single bit recoding Booth Algorithm (i.e radix-2). Verify your result using bit pairing recoding (i.e. radix-4). (10 marks) 3. Consider the “in-order-issue/in-order-completion” execution sequence shown in Fig. 3 Identify the most likely reason why I2 could not enter the execute stage until the fourth cycle. Will “in-order-issue/out-of-order-completion” or “out-of-order-issue/”out- of-order-completion” fix this? If so, which one? Fig. 3. An In-Order-Issue, In-Order-Completion Execution Sequence. (10 marks)
