Digital Logic Design PDF

A.F. Kana Digital Logic Design. Page 1 Digital Logic Design Introduction A digital computer stores data in terms of digits (numbers) and proceeds in discrete steps from one state to the next. The states of a digital computer typically involve binary digits which may take the form of the presence...

A.F. Kana Digital Logic Design. Page 1 Digital Logic Design Introduction A digital computer stores data in terms of digits (numbers) and proceeds in discrete steps from one state to the next. The states of a digital computer typically involve binary digits which may take the form of the presence or absence of magnetic markers in a storage medium , on-off switches or relays. In digital computers, even letters, words and whole texts are represented digitally. Digital Logic is the basis of electronic systems, such as computers and cell phones. Digital Logic is rooted in binary code, a series of zeroes and ones each having an opposite value. This system facilitates the design of electronic circuits that convey information, including logic gates. Digital Logic gate functions include and, or and not. The value system translates input signals into specific output. Digital Logic facilitates computing, robotics and other electronic applications. Digital Logic Design is foundational to the fields of electrical engineering and computer engineering. Digital Logic d esigners b uild c omplex e lectronic c omponents th at u se b oth e lectrical and c omputational characteristics. T hese ch aracteristics m ay i nvolve pow er, current, l ogical f unction, p rotocol a nd user i nput. Digital Logic D esign i s us ed t o de velop ha rdware, s uch as c ircuit boa rds a nd m icrochip pr ocessors. T his hardware processes user input, system protocol and other data in computers, navigational systems, cell phones or other high-tech systems. A.F. Kana Digital Logic Design. Page 2 Data Representation and Number system Numeric systems The numeric sy stem w e u se d aily i s the d ecimal sy stem, b ut t his system i s n ot co nvenient f or m achines si nce the information is handled codified in the shape of on or off bits; this way of codifying takes us to the necessity of knowing the positional calculation which will allow us to express a number in any base where we need it. Radix number systems The numeric sy stem w e u se d aily i s the decimal sy stem, b ut t his system i s n ot co nvenient f or m achines si nce the information is handled codified in the shape of on or off bits; this way of codifying takes us to the necessity of knowing the positional calculation which will allow us to express a number in any base where we need it. A base of a number system or radix defines the range of values that a digit may have. In the binary system or base 2, there can be only two values for each digit of a number, either a \"0\" or a \"1\". In the octal system or base 8, there can be eight choices for each digit of a number: \"0\", \"1\", \"2\", \"3\", \"4\", \"5\", \"6\", \"7\". In the decimal system or base 10, there are ten different values for each digit of a number: \"0\", \"1\", \"2\", \"3\", \"4\", \"5\", \"6\", \"7\", \"8\", \"9\". In the hexadecimal system, we allow 16 values for each digit of a number: \"0\", \"1\", \"2\", \"3\", \"4\", \"5\", \"6\", \"7\", \"8\", \"9\", \"A\", \"B\", \"C\", \"D\", \"E\", and \"F\". Where "A" stands for 10, "B" for 11 and so on. Conversion among radices \- Convert from Decimal to Any Base Let's think about what you do to obtain each digit. As an example, let\'s start with a decimal number 1234 and convert it to decimal notation. To extract the last digit, you move the decimal point left by one digit, which means that you divide the given number by its base 10. 1234/10 = 123 + 4/10 The remainder of 4 is the last digit. To extract the next last digit, you again move the decimal point left by one digit and see what drops out. 123/10 = 12 + 3/10 The remainder of 3 is the next last digit. You repeat this process until there is nothing left. Then you stop. In summary, you do the following: A.F. Kana Digital Logic Design. Page 3 Quotient Remainder \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-- 1234/10 = 123 4 \-\-\-\-\-\-\--+ 123/10 = 12 3 \-\-\-\-\--+ \| 12/10 = 1 2 \-\-\--+ \| \| 1/10 = 0 1 \--+ \| \| \|(Stop when the quotient is 0) \| \| \| \| 1 2 3 4 (Base 10) Now, let\'s try a nontrivial example. Let\'s express a decimal number 1341 in binary notation. Note that the desired base is 2, so we repeatedly divide the given decimal number by 2. Quotient Remainder \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-- 1341/2 = 670 1 \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\--+ 670/2 = 335 0 \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\--+ \| 335/2 = 167 1 \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\--+ \| \| 167/2 = 83 1 \-\-\-\-\-\-\-\-\-\-\-\-\-\-\--+ \| \| \| 83/2 = 41 1 \-\-\-\-\-\-\-\-\-\-\-\-\--+ \| \| \| \| 41/2 = 20 1 \-\-\-\-\-\-\-\-\-\-\--+ \| \| \| \| \| 20/2 = 10 0 \-\-\-\-\-\-\-\-\--+ \| \| \| \| \| \| 10/2 = 5 0 \-\-\-\-\-\-\--+ \| \| \| \| \| \| \| 5/2 = 2 1 \-\-\-\-\--+ \| \| \| \| \| \| \| \| 2/2 = 1 0 \-\-\--+ \| \| \| \| \| \| \| \| \| 1/2 = 0 1 \--+ \| \| \| \| \| \| \| \| \| \|(Stop when the \| \| \| \| \| \| \| \| \| \| \| quotient is 0) 1 0 1 0 0 1 1 1 1 0 1 (BIN; Base 2) Let\'s express the same decimal number 1341 in octal notation. Quotient Remainder \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-- 1341/8 = 167 5 \-\-\-\-\-\-\--+ 167/8 = 20 7 \-\-\-\-\--+ \| 20/8 = 2 4 \-\-\--+ \| \| 2/8 = 0 2 \--+ \| \| \| (Stop when the quotient is 0) \| \| \| \| 2 4 7 5 (OCT; Base 8) Let\'s express the same decimal number 1341 in hexadecimal notation. Quotient Remainder \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-- 1341/16 = 83 13 \-\-\-\-\--+ 83/16 = 5 3 \-\-\--+ \| 5/16 = 0 5 \--+ \| \| (Stop when the quotient is 0) \| \| \| 5 3 D (HEX; Base 16) In conclusion, the easiest way to convert fixed point numbers to any base is to convert each part separately. We begin by separating the number into its integer and fractional part. The integer part is converted using the remainder method, by using a successive division of the number by the base until a zero is obtained. At each division, the reminder is kept and then the new number in the base r is obtained by reading the remainder from the lat remainder upwards. The conversion of the fractional part can be obtained by successively multiplying the fraction with the base. If we iterate this process on the remaining fraction, then we will obtain successive significant digit. This methods form the basis of the multiplication methods of converting fractions between bases Example. Convert the decimal number 3315 t o hexadecimal notation. What about the hexadecimal equivalent of the decimal number 3315.3? A.F. Kana Digital Logic Design. Page 4 Solution: Quotient Remainder \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-- 3315/16 = 207 3 \-\-\-\-\--+ 207/16 = 12 15 \-\-\--+ \| 12/16 = 0 12 \--+ \| \| (Stop when the quotient is 0) \| \| \| C F 3 (HEX; Base 16) (HEX; Base 16) Product Integer Part 0.4 C C C \... \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-- \| \| \| \| 0.3\*16 = 4.8 4 \-\-\--+ \| \| \| \| \| 0.8\*16 = 12.8 12 \-\-\-\-\--+ \| \| \| \| 0.8\*16 = 12.8 12 \-\-\-\-\-\-\--+ \| \| \| 0.8\*16 = 12.8 12 \-\-\-\-\-\-\-\-\--+ \| \| : \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\--+ : Thus, 3315.3 (DEC) \--\> CF3.4CCC\... (HEX) \- Convert From Any Base to Decimal Let\'s think more carefully what a d ecimal number means. For example, 1234 means that there are four boxes (digits); and there are 4 one\'s in the right-most box (least significant digit), 3 ten\'s in the next box, 2 hu ndred\'s in the next box, and finally 1 thousand\'s in the left-most box (most significant digit). The total is 1234: Original Number: 1 2 3 4 \| \| \| \| How Many Tokens: 1 2 3 4 Digit/Token Value: 1000 100 10 1 Value: 1000 + 200 + 30 + 4 = 1234 or simply, 1\*1000 + 2\*100 + 3\*10 + 4\*1 = 1234 Thus, each digit has a value: 10\^0=1 for the least significant digit, increasing to 10\^1=10, 10\^2=100, 10\^3=1000, and so forth. Likewise, the least si gnificant d igit i n a h exadecimal n umber h as a v alue o f 16\^0=1 for th e le ast s ignificant digit, increasing to 16\^1=16 for the next digit, 16\^2=256 for the next, 16\^3=4096 for the next, and so forth. Thus, 1234 means that there are four boxes (digits); and there are 4 one \'s in the right-most box ( least significant digit), 3 sixteen\'s in the next box, 2 256\'s in the next, and 1 4096\'s in the left-most box (most significant digit). The total is: 1\*4096 + 2\*256 + 3\*16 + 4\*1 = 4660 In summary, the conversion from any base to base 10 can be obtained from the formulae ∑− −= = 1 1 0 n mi i ibdx Where b is the base, di the digit at position i, m the number of digit after the decimal point, n the number of digits of the integer part and X10 is the obtained number in decimal. This form the basic of the polynomial method of converting numbers from any base to decimal Example. Convert 234.14 expressed in an octal notation to decimal. 2\*82 + 3\*81 + 4\*80+1\*8-1 + 4\*8-2 = 2\*64 +3\*8 +4\*1 +1/8 +4/64 =156.1875 A.F. Kana Digital Logic Design. Page 5 Example. C onvert the he xadecimal num ber 4B 3 t o de cimal no tation. W hat about t he d ecimal e quivalent of t he hexadecimal number 4B3.3? Solution: Original Number: 4 B 3. 3 \| \| \| \| How Many Tokens: 4 11 3 3 Digit/Token Value: 256 16 1 0.0625 Value: 1024 +176 + 3 + 0.1875 = 1203.1875 Example. Convert 234.14 expressed in an octal notation to decimal. Solution: Original Number: 2 3 4. 1 4 \| \| \| \| \| How Many Tokens: 2 3 4 1 4 Digit/Token Value: 64 8 1 0.125 0.015625 Value: 128 + 24 + 4 + 0.125 + 0.0625 = 156.1875 \- Relationship between Binary - Octal and Binary-hexadecimal As demonstrated by the table bellow, there is a direct correspondence between the binary system and the octal system, with three b inary di gits c orresponding t o o ne octal d igit. L ikewise, f our b inary d igits t ranslate d irectly in to o ne hexadecimal digit. BIN OCT HEX DEC \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-- 0000 00 0 0 0001 01 1 1 0010 02 2 2 0011 03 3 3 0100 04 4 4 0101 05 5 5 0110 06 6 6 0111 07 7 7 \-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-- 1000 10 8 8 1001 11 9 9 1010 12 A 10 1011 13 B 11 1100 14 C 12 1101 15 D 13 1110 16 E 14 1111 17 F 15 With such relationship, In order to convert a binary number to octal, we partition the base 2 number into groups of three starting from the radix point, and pad the outermost groups with 0's as needed to form triples. Then, we convert each triple to the octal equivalent. For conversion from base 2 to base 16, we use groups of four. Consider converting 101102 to base 8: 101102 = 0102 1102 = 28 68 = 268 Notice that the leftmost two bits are padded with a 0 on the left in order to create a full triplet. A.F. Kana Digital Logic Design. Page 6 Now consider converting 101101102 to base 16: 101101102 = 10112 01102 = B16 616 = B616 (Note that 'B' is a base 16 digit corresponding to 1110. B is not a variable.) The c onversion methods c an be us ed to convert a n umber f rom a ny ba se to any ot her ba se, but i t may not b e v ery intuitive to convert something like 513.03 to base 7. As an aid in performing an unnatural conversion, we can convert to the more familiar base 10 form as an intermediate step, and then continue the conversion from base 10 to the target base. As a g eneral r ule, w e us e t he po lynomial m ethod when c onverting into base 10, and w e us e t he r emainder a nd multiplication methods when converting out of base 10. Numeric complements The radix complement of an n digit number y in radix b is, by definition, bn − y. Adding this to x results in the value x + bn − y or x − y + bn. Assuming y ≤ x, the result will always be greater than bn and dropping the initial \'1\' is the same as subtracting bn, making the result x − y + bn − bn or just x − y, the desired result. The radix complement is most easily obtained by adding 1 to the diminished radix complement, which is (bn − 1) − y. Since (bn − 1) is the digit b − 1 repeated n times (because bn − 1 = bn − 1n = (b − 1)(bn − 1 + bn − 2 + \... + b + 1) = (b − 1)bn − 1 + \... + (b − 1), see also binomial numbers), the diminished radix complement of a number is found by complementing each digit with respect to b − 1 (that is, subtracting each digit in y from b − 1). Adding 1 to obtain the radix complement can be done separately, but is most often combined with the addition of x and the complement of y. In t he de cimal num bering s ystem, t he r adix c omplement is called th e ten\'s complement and t he diminished r adix complement the nines\' complement. In bi nary, t he r adix c omplement i s c alled t he two\'s complement and t he d iminished r adix c omplement t he ones\' complement. The naming of complements in other bases is similar. \- Decimal example To subtract a decimal number y from another number x using the method of complements, the ten\'s complement of y (nines\' complement plus 1) is added to x. T ypically, the nines\' complement of y is first obtained by determining the complement of each digit. The complement of a decimal digit in the nines\' complement system is the number that must be a dded to i t to p roduce 9. The c omplement o f 3 i s 6, the c omplement o f 7 is 2 , a nd s o on. G iven a s ubtraction problem: 873 (x) \- 218 (y) The nines\' complement of y (218) is 781. In this case, because y is three digits long, this is the same as su btracting y from 999. (The number of 9\'s is equal to the number of digits of y.) Next, the sum of x, the nines\' complement of y, and 1 is taken: 873 (x) \+ 781 (complement of y) \+ 1 (to get the ten\'s complement of y) ===== 1655 The first \"1\" digit is then dropped, giving 655, the correct answer. If the subtrahend has fewer digits than the minuend, leading zeros must be added which will become leading nines when the nines\' complement is taken. For example: A.F. Kana Digital Logic Design. Page 7 48032 (x) \- 391 (y) becomes the sum: 48032 (x) \+ 99608 (nines\' complement of y) \+ 1 (to get the ten\'s complement) ======= 147641 Dropping the \"1\" gives the answer: 47641 \- Binary example The method of complements is especially useful in binary (radix 2) since the ones\' complement is very easily obtained by inverting each bit (changing \'0\' to \'1\' and vice versa). And adding 1 t o get the two\'s complement can be done by simulating a carry into the least significant bit. For example: 01100100 (x, equals decimal 100) \- 00010110 (y, equals decimal 22) becomes the sum: 01100100 (x) \+ 11101001 (ones\' complement of y) \+ 1 (to get the two\'s complement) ========== 101001110 Dropping the initial \"1\" gives the answer: 01001110 (equals decimal 78) Signed fixed point numbers Up t o t his point we have c onsidered only t he representation of unsigned fixed poi nt numbers. The situation is quite different in representing signed fixed point numbers. There are four different ways of representing signed numbers that are commonly used: sign-magnitude, one's complement, two's complement, and excess notation. We will cover each in turn, u sing i ntegers f or ou r e xamples. The T able b elow sh ows f or a 3 -bit num ber how t he v arious r epresentations appear. Decimal Unsigned Sign--Mag. 1's Comp. 2's Comp. Excess 4 7 111 -- -- -- -- 6 110 -- -- -- -- 5 101 -- -- -- -- 4 100 -- -- -- -- 3 011 011 011 011 111 2 010 010 010 010 110 1 001 001 001 001 101 +0 000 000 000 000 100 -0 -- 100 111 000 100 -1 -- 101 110 111 011 -2 -- 110 101 110 010 -3 -- 111 100 101 001 -4 -- -- -- 100 000 Table1. 3 bit number representation A.F. Kana Digital Logic Design. Page 8 \- Signed Magnitude Representation The signed m agnitude (also r eferred t o as sign and magnitude) r epresentation is m ost familiar to u s a s t he b ase 1 0 number system. A plus or minus sign to the left of a number indicates whether the number is positive or negative as in +1210 or −1210. In the binary signed magnitude representation, the leftmost bit is used for the sign, which takes on a value of 0 or 1 for '+' or '−', respectively. The remaining bits contain the absolute magnitude. Consider representing (+12)10 and (−12)10 in an eight-bit format: (+12)10 = (00001100)2 (−12)10 = (10001100)2 The negative number is formed by simply changing the sign bit in the positive number from 0 to 1. Notice that there are both positive and negative representations for zero: +0= 00000000 and -0= 10000000. \- One's Complement Representation The one's complement operation is trivial to perform: convert all of the 1's in the number to 0's, and all of the 0's to 1's. See the fourth column in Table1 for examples. We can observe from the table that in the one's complement representation the leftmost bit is 0 for positive numbers and 1 for negative numbers, as it is for the signed magnitude representation. This negation, c hanging 1' s to 0 's and c hanging 0' s to 1 's, is k nown a s complementing the bi ts. Consider a gain representing ( +12)10 and (−12)10 i n a n e ight-bit f ormat, now us ing t he one's c omplement representation: (+12)10 = (00001100)2 (−12)10 = (11110011)2 Note again that there are representations for both +0 and −0, which are 00000000 and 11111111, respectively. As a result, t here a re o nly 2 8 − 1 = 255 di fferent numbers t hat c an b e r epresented e ven t hough t here are 2 8 different b it patterns. The one 's complement r epresentation is n ot commonly us ed. This i s a t l east partly due to the difficulty i n m aking comparisons when there are two representations for 0. There is also additional complexity involved in adding numbers. \- Two's Complement Representation The two's complement is formed in a way similar to forming the one's complement: complement all of the bits in the number, but then add 1, and if that addition results in a carry-out from the most significant bit of the number, discard the carry-out. Examination of the fifth column of Table above shows that in the two's complement representation, the leftmost bit is again 0 for positive numbers and is 1 for negative numbers. However, this number format does not have the unfortunate characteristic of signed-magnitude and one's complement representations: it has only one representation for zero. To see that this is true, consider forming the negative of (+0)10, which has the bit pattern: (+0)10 = (00000000)2 Forming the one's complement of (00000000)2 produces (11111111)2 and adding 1 t o i t y ields ( 00000000)2, t hus (−0)10 = ( 00000000)2. T he c arry out of t he l eftmost pos ition i s d iscarded i n t wo's complement addition (except when detecting an overflow condition). Since there is only one representation for 0, and since all bit patterns are valid, there are 28 = 256 different numbers that can be represented. Consider ag ain r epresenting ( +12)10 and (−12)10 in a n e ight-bit f ormat, th is t ime u sing th e two's c omplement representation. Starting with (+12)10 =(00001100)2, complement, or negate the number, producing (11110011)2. A.F. Kana Digital Logic Design. Page 9 Now add 1, producing (11110100)2, and thus (−12)10 = (11110100)2: (+12)10 = (00001100)2 (−12)10 = (11110100)2 There is an equal number of positive and negative numbers provided zero is considered to be a positive number, which is reasonable because its sign bit is 0. The positive numbers start at 0, but the negative numbers start at −1, and so the magnitude of the most negative number is one greater than the magnitude of the most positive number. The positive number with the largest magnitude is +127, and the negative number with the largest magnitude is −128. There is thus no pos itive num ber t hat c an be represented t hat corresponds to the n egative of −128. I f w e t ry t o form the t wo's complement negative of −128, then we will arrive at a negative number, as shown below: (−128)10 = (10000000)2 (−128)10 = (01111111 (−128)10 + (+0000001)2 (−128)10 ------------------)2 (−128)10 = (10000000)2 The two's complement representation is the representation most commonly used in conventional computers. \- Excess Representation In the excess or biased representation, the number is treated as unsigned, but is "shifted" in value by subtracting the bias from it. The concept is to assign the smallest numerical bit pattern, all zeros, to the negative of the bias, and assign the remaining num bers in sequence a s t he b it pa tterns i ncrease i n m agnitude. A convenient w ay t o t hink of a n excess representation is that a n umber is represented as the sum of its two's complement form and another number, which is known as the "excess," or "bias." Once again, refer to Table 2.1, the rightmost column, for examples. Consider again representing (+12)10 and (−12)10 in an eight-bit format but now using an excess 128 representation. An excess 128 number is formed by adding 128 to the original number, and then creating the unsigned binary version. For (+12)10, we compute (128 + 12 = 140)10 and produce the bit pattern (10001100)2. For (−12)10, we compute (128 + −12 = 116)10 and produce the bit pattern (01110100)2 (+12)10 = (10001100)2 (−12)10 = (01110100)2 Note that there is no numerical significance to the excess value: it simply has the effect of shifting the representation of the two's complement numbers. There is only one excess representation for 0, since the excess representation is simply a sh ifted version of the two's complement representation. For the previous case, the excess value is chosen to have the same bit pattern as the largest negative number, which has the effect of making the numbers appear in numerically sorted order if the numbers are viewed in an unsigned binary representation. Thus, the most negative number is (−128)10 = (00000000)2 and the most positive number is (+127)10 = (11111111)2. This representation simplifies making comparisons between numbers, since the bit patterns for negative numbers have numerically smaller values than the bit patterns for positive numbers. This is important for representing the exponents of floating point numbers, in which exponents of two numbers are compared in order to make them equal for addition and subtraction. choosing a bias: The b ias ch osen i s m ost often b ased o n t he n umber o f b its ( n) available for r epresenting an i nteger. T o g et an approximate equal distribution of true values above and below 0, the bias should be 2(n-1) or 2(n-1) - 1 A.F. Kana Digital Logic Design. Page 10 Floating point representation Floating poi nt is a num erical r epresentation s ystem in w hich a s tring of di gits r epresent a r eal num ber. T he na me floating point refers to the fact that the radix point (decimal point or more commonly in computers, binary point) can be placed anywhere relative to the digits within the string. A fixed point is of the form a × bn where a is the fixed point part often referred to as the mantissa, or significand of the number b represents the base and n the exponent. Thus a floating point number can be characterized by a triple of numbers: sign, exponent, and significand. \- Normalization A potential problem with representing floating point numbers is that the same number can be represented in different ways, which makes comparisons and arithmetic operations difficult. For example, consider the numerically equivalent forms shown below: 3584.1 × 100 = 3.5841 × 103 =.35841 × 104. In order to avoid multiple representations for the same number, floating point numbers are maintained in normalized form. That is, the radix point is shifted to the left or to the right and the exponent is adjusted accordingly until the radix point is to the left of the leftmost nonzero digit. So the rightmost number above is the normalized one. Unfortunately, the number zero cannot be represented in this scheme, so to represent zero an exception is made. The exception to this rule is that zero is represented as all 0's in the mantissa. If the mantissa is represented as a binary, that is, base 2, num ber, and if the normalization condition is that there is a leading "1" in the normalized mantissa, then there is no need to store that "1" and in fact, most floating point formats do not store it. Rather, it is "chopped off " before packing up the number for storage, and it is restored when unpacking the number into exponent and mantissa. This results in having an additional bit of precision on the right of the number, due to removing the bit on the left. This missing bit is referred to as the hidden bit, also known as a hidden 1. For example, if the mantissa in a given format is 1.1010 after normalization, then the bit pattern that is stored is 1010--- the left-most bit is truncated, or hidden. Possible floating point format. In order to choose a possible floating point format for a given computer, the programmer must take into consideration the following: The number of words used (i.e. the total number of bits used.) The representation of the mantissa (2s complement etc.) The representation of the exponent (biased etc.) The total number of bits devoted for the mantissa and the exponent The location of the mantissa (exponent first or mantissa first) Because of the five points above, the number of ways in which a floating point number may be represented is legion. Many representation use the format of sign bit to represent a floating point where the leading bit represents the sign Sign Exponent Mantissa \- The IEEE standard for floating point The IEEE (Institute of Electrical and Electronics Engineers) has produced a standard for floating point format arithmetic in mini and micro computers.(i.e. ANSI/IEEE 754-1985). This standard specifies how single precision (32 bit) , double precision (64 bit) and Quadruple (128 bit) floating point numbers are to be represented, as well as how arithmetic should be carried out on them. A.F. Kana Digital Logic Design. Page 11 General layout The three fields in an IEEE 754 float Sign Exponent Fraction Binary floating-point numbers a re s tored i n a sign-magnitude form where the most significant bit is th e sign bit, exponent is the biased exponent, and \"fraction\" is the significand without the most significant bit. Exponent biasing The exponent is biased by (2e − 1) − 1, where e is the number of bits used for the exponent field (e.g. if e=8, then (28 − 1) − 1 = 128 − 1 = 127 ). Biasing is done because exponents have to be signed values in order to be able to represent both tiny and huge values, but two\'s complement, the usual representation for signed values, would make comparison harder. To s olve t his, t he e xponent i s b iased be fore be ing s tored by a djusting i ts v alue t o put it w ithin a n uns igned r ange suitable for comparison. For example, to represent a number which has exponent of 17 in an exponent field 8 bits wide: exponentfield = 17 + (28 − 1) − 1 = 17 + 128 − 1 = 144. Single Precision The IEEE single precision floating point standard representation requires a 32 b it word, which may be represented as numbered from 0 to 31, left to right. The first bit is the sign bit, S, the next eight bits are the exponent bits, \'E\', and the final 23 bits are the fraction \'F\': S EEEEEEEE FFFFFFFFFFFFFFFFFFFFFFF 0 1 8 9 31 To convert decimal 17.15 to IEEE Single format: Convert decimal 17 to binary 10001. Convert decimal 0.15 to the repeating binary fraction 0.001001 Combine integer and fraction to obtain binary 10001.001001 Normalize the binary number to obtain 1.0001001001x24 Thus, M = m-1 =0001001001 and E = e+127 = 131 = 10000011. The number is positive, so S=0. Align the values for M, E, and S in the correct fields. 0 10000011 00010010011001100110011 Note that if the exponent does not use all the field allocated to it, there will be leading 0's while for the mantissa, the zero's will be filled at the end. Double Precision The IEEE double precision floating point standard representation requires a 64 bit word, which may be represented as numbered from 0 to 63, left to right. The first bit is the sign bit, S, the next eleven bits are the exponent bits, \'E\', and the final 52 bits are the fraction \'F\': S EEEEEEEEEEE FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF 0 1 11 12 A.F. Kana Digital Logic Design. Page 12 Quad Precision The IEEE Quad precision floating point standard representation requires a 128 bit word, which may be represented as numbered from 0 to 127, left to right. The first bit is the sign bit, S, the next fifteen bits are the exponent bits, \'E\', and the final 128 bits are the fraction \'F\': S EEEEEEEEEEEEEEE FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF 0 1 15 16 Single Double Quadruple No. of sign bit 1 1 1 No. of exponent bit 8 11 15 No. of fraction 23 52 111 Total bits used 32 64 128 Bias 127 1023 16383 Table2 Basic IEEE floating point format Binary code Internally, digital computers operate on binary numbers. W hen interfacing t o humans, di gital processors, e.g. poc ket calculators, communication is decimal-based. Input is done in decimal then converted to binary for internal processing. For output, t he r esult h as to b e co nverted f rom i ts i nternal b inary r epresentation t o a decimal f orm. D igital system represents and manipulates not only binary number but also many other discrete elements of information. -Binary coded Decimal In computing and electronic systems, binary-coded decimal (BCD) is an encoding for decimal numbers in which each digit is represented by its own binary sequence. Its main virtue is that it allows easy conversion to decimal digits for printing o r d isplay an d faster d ecimal c alculations. Its drawbacks ar e the i ncreased co mplexity of circuits n eeded to implement mathematical o perations an d a r elatively i nefficient e ncoding. It o ccupies more sp ace than a p ure b inary representation.In BCD, a digit is usually represented by four bits which, in general, represent the values/digits/characters 0-9 To BCD-encode a decimal number using the common encoding, each decimal digit is stored in a four-bit nibble. Decimal: 0 1 2 3 4 5 6 7 8 9 BCD: 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 Thus, the BCD encoding for the number 127 would be: 0001 0010 0111 The position weights of the BCD code are 8, 4, 2, 1. Other codes (shown in the table) use position weights of 8, 4, -2, -1 and 2, 4, 2, 1. An example of a non-weighted code is the excess-3 code where digit codes is obtained from their binary equivalent after adding 3. Thus the code of a decimal 0 is 0011, that of 6 is 1001, etc A.F. Kana Digital Logic Design. Page 13 Decimal Digit 8 4 2 1 8 4 -2 -1 2 4 2 1 Excess-3 Code code code code 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 1 0 1 1 1 0 0 0 1 0 1 0 0 2 0 0 1 0 0 1 1 0 0 0 1 0 0 1 0 1 3 0 0 1 1 0 1 0 1 0 0 1 1 0 1 1 0 4 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 5 0 1 0 1 1 0 1 1 1 0 1 1 1 0 0 0 6 0 1 1 0 1 0 1 0 1 1 0 0 1 0 0 1 7 0 1 1 1 1 0 0 1 1 1 0 1 1 0 1 0 8 1 0 0 0 1 0 0 0 1 1 1 0 1 0 1 1 9 1 0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 it is very important to understand the difference between the conversion of a decimal number to binary and the binary coding o f a d ecimal n umber. In each case, t he final result is a series o f bits. The b its o btained from co nversion are binary digit. Bits obtained from coding are combinations of 1's and 0's arranged according to the rule of the code used. e.g. the binary conversion of 13 is 1101; the BCD coding of 13 is 00010011 \- Error-Detection Codes Binary information may be transmitted through some communication medium, e.g. using wires or wireless media. A corrupted bit will have its value changed from 0 to 1 or vice versa. To be able to detect errors at the receiver end, the sender sends an extra bit (parity bit) with the original binary message. A pa rity bit is a n extra bit i ncluded with the n -bit binary message t o make t he t otal number o f 1's in this message (including the parity bit) either odd or even. If the parity bit makes the total number of 1's an odd (even) number, it is called odd (even) parity. The table shows the required odd (even) parity for a 3-bit message Three-Bit Message Odd Parity Bit Even Parity Bit X Y Z P P 0 0 0 1 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 0 1 No error is detectable if the transmitted message has 2 bits in error since the total number of 1's will remain even (or odd) as in the original message. In general, a transmitted message with even number of errors cannot be detected by the parity bit. \- Gray code The Gray code consist of 16 4-bit code words to represent the decimal Numbers 0 t o 15. For Gray code, successive code words differ by only one bit from one to the next A.F. Kana Digital Logic Design. Page 14 Gray Code Decimal Equivalent 0 0 0 0 0 0 0 0 1 1 0 0 1 1 2 0 0 1 0 3 0 1 1 0 4 0 1 1 1 5 0 1 0 1 6 0 1 0 0 7 1 1 0 0 8 1 1 0 1 9 1 1 1 1 10 1 1 1 0 11 1 0 1 0 12 1 0 1 1 13 1 0 0 1 14 1 0 0 0 15 Character Representation Even though many people used to think of computers as \"number crunchers\", people figured out long ago that it\'s just as important to handle character data. Character data isn\'t just alphabetic characters, but also numeric characters, punctuation, spaces, etc. Most keys on t he central part of the keyboard (except shift, caps lock) are characters. Characters need to represented. In particular, they need to be represented in binary. After all, computers store and manipulate 0\'s and 1\'s (and even those 0\'s and 1\'s are just abstractions. The implementation is typically voltages). Unsigned binary and two\'s complement are used to represent unsigned and signed integer respectively, because they have nice mathematical properties, in particular, you can add and subtract as you\'d expect. However, there aren\'t such properties for character data, so assigning binary codes for characters is somewhat arbitrary. The m ost c ommon ch aracter representation i s A SCII, w hich st ands f or American Standard Code for Information Interchange. There a re two r easons to u se A SCII. F irst, w e n eed so me w ay t o r epresent ch aracters as binary n umbers ( or, equivalently, as bitstring patterns). There\'s not much choice about this since computers represent everything in binary. If you\'ve noticed a common theme, it\'s that we need representation schemes for everything. However, most importantly, we ne ed representations for num bers a nd c haracters. O nce you ha ve t hat ( and pe rhaps po inters), y ou c an bui ld up everything you need. The other reason we use ASCII is because of the letter \"S\" in ASCII, which stands for \"standard\". Standards are good because they allow for common formats that everyone can agree on. Unfortunately, there\'s also the letter \"A\", which stands for American. ASCII is clearly biased for the English language character set. Other languages may have their own character set, even though English dominates most of the computing world (at least, programming and software). Even though character sets don\'t have mathematical properties, there are some nice aspects about ASCII. In particular, the lowercase l etters a re contiguous ( \'a\' t hrough \'z\' m aps t o 9 710 through 12 210). T he u pper case l etters are al so contiguous (\'A\' through \'Z\' maps to 6510 through 9010). Finally, the digits are contiguous (\'0\' through \'9\' maps t o 4810 through 5710). A.F. Kana Digital Logic Design. Page 15 Since they are contiguous, it\'s usually easy to determine whether a character is lowercase or uppercase (by checking if the ASCII code lies in the range of lower or uppercase ASCII codes), or to determine if it\'s a digit, or to convert a digit in ASCII to an integer value. ASCII Code (Decimal) 0 nul 16 dle 32 sp 48 0 64 @ 80 P 96 \` 112 p 1 soh 17 dc1 33 ! 49 1 65 A 81 Q 97 a 113 q 2 stx 18 dc2 34 \" 50 2 66 B 82 R 98 b 114 r 3 etx 19 dc3 35 \# 51 3 67 C 83 S 99 c 115 s 4 eot 20 dc4 36 \$ 52 4 68 D 84 T 100 d 116 t 5 enq 21 nak 37 % 53 5 69 E 85 U 101 e 117 u 6 ack 22 syn 38 & 54 6 70 F 86 V 102 f 118 v 7 bel 23 etb 39 \' 55 7 71 G 87 W 103 g 119 w 8 bs 24 can 40 ( 56 8 72 H 88 X 104 h 120 x 9 ht 25 em 41 ) 57 9 73 I 89 Y 105 i 121 y 10 nl 26 sub 42 \* 58 : 74 J 90 Z 106 j 122 z 11 vt 27 esc 43 + 59 ; 75 K 91 \[ 107 k 123 { 12 np 28 fs 44 , 60 \< 76 L 92 \\ 108 l 124 \| 13 cr 29 gs 45 - 61 = 77 M 93 \] 109 m 125 } 14 so 30 rs 46. 62 \> 78 N 94 \^ 110 n 126 \~ 15 si 31 us 47 / 63 ? 79 O 95 \_ 111 o 127 del The characters between 0 and 31 are generally not printable (control characters, etc). 32 is the space character. Also note t hat there are o nly 1 28 ASCII ch aracters. This means o nly 7 bits are r equired to represent an ASCII ch aracter. However, since the smallest size representation on most computers is a byte, a byte is used to store an ASCII character. The Most Significant bit(MSB) of an ASCII character is 0. ASCII Code (Hex) 00 nul 10 dle 20 sp 30 0 40 @ 50 P 60 \` 70 p 01 soh 11 dc1 21 ! 31 1 41 A 51 Q 61 a 71 q 02 stx 12 dc2 22 \" 32 2 42 B 52 R 62 b 72 r 03 etx 13 dc3 23 \# 33 3 43 C 53 S 63 c 73 s 04 eot 14 dc4 24 \$ 34 4 44 D 54 T 64 d 74 t 05 enq 15 nak 25 % 35 5 45 E 55 U 65 e 75 u 06 ack 16 syn 26 & 36 6 46 F 56 V 66 f 76 v 07 bel 17 etb 27 \' 37 7 47 G 57 W 67 g 77 w 08 bs 18 can 28 ( 38 8 48 H 58 X 68 h 78 x 09 ht 19 em 29 ) 39 9 49 I 59 Y 69 i 79 y 0a nl 1a sub 2a \* 3a : 4a J 5a Z 6a j 7a z 0b vt 1b esc 2b + 3b ; 4b K 5b \[ 6b k 7b { 0c np 1c fs 2c , 3c \< 4c L 5c \\ 6c l 7c \| 0d cr 1d gs 2d - 3d = 4d M 5d \] 6d m 7d } 0e so 1e rs 2e. 3e \> 4e N 5e \^ 6e n 7e \~ 0f si 1f us 2f / 3f ? 4f O 5f \_ 6f o 7f del The difference in the ASCII code between an uppercase letter and its corresponding lowercase letter is 2016. This makes it easy to convert lower to uppercase (and back) in hex (or binary). Other Character Codes While ASCII is still popularly used, another character representation that was used (especially at IBM) was EBCDIC, which s tands f or Extended Binary Coded Decimal Interchange Code (yes, t he word \" code\" ap pears t wice). T his character se t h as m ostly d isappeared. E BCDIC d oes n ot st ore ch aracters co ntiguously, s o t his c an c reate pr oblems alphabetizing \"words\". A.F. Kana Digital Logic Design. Page 16 One problem with ASCII is that it\'s biased to the English language. This generally creates some problems. One common solution is for people in other countries to write programs in ASCII. Other countries have used different solutions, in particular, using 8 b its to represent their alphabets, giving up t o 256 letters, which is plenty for most alphabet based languages (recall you also need to represent digits, punctuation, etc). However, Asian languages, which are word-based, rather than character-based, often have more words than 8 bits can represent. In particular, 8 b its can only represent 256 words, which is far smaller than the number of words in natural languages. Thus, a new character set called Unicode is now becoming more prevalent. This is a 16 bit code, which allows for about 65,000 different r epresentations. T his is e nough t o e ncode t he popular Asian languages ( Chinese, K orean, J apanese, etc.). It also turns out that ASCII codes are preserved. What does this mean? To convert ASCII to Unicode, take all one byte ASCII codes, and zero-extend them to 16 bits. That should be the Unicode version of the ASCII characters. The biggest consequence of using Unicode from ASCII is that text files double in size. The second consequence is that endianness begins to matter again. Endianness is the ordering of individually addressable sub-units (words, bytes, or even bits) within a longer data word stored in external memory. The most typical cases are the ordering of bytes within a 16-, 32-, or 64-bit word, where endianness is often simply referred to as byte order. The usual contrast is between most versus least significant byte first, called big-endian and little-endian respectively. Big-endian places the most significant bit, digit, or byte in the first, or leftmost, position. Little-endian places the most significant bit, digit, or byte in the last, or rightmost, position. Motorola processors employ the big-endian approach, whereas Intel processors take the little-endian approach. Table bellow illustrates how the decimal value 47,572 would be expressed in hexadecimal and binary notation (two octets) and how it would be stored using these two methods. Table : Endianess Number Big-Endian Little-Endian Hexadecimal B9D4 B9D4 4D9B Binary 10111001 10111001 11010100 11010100 11010100 10111001 With s ingle by tes, t here\'s no ne ed t o w orry a bout e ndianness. H owever, y ou have t o c onsider t hat w ith t wo by te quantities. While C and C++ still primarily use ASCII, Java has already used Unicode. This means that Java must create a byte type, because char in Java is no longer a single byte. Instead, it\'s a 2 byte Unicode representation. Exercise 1\. The state of a 12-bit register is 010110010111. what is its content if it represents : i\. Decimal digits in BCD code ii. Decimal digits in excess-3 code iii\. Decimal digits in 8 4-2-1 code iv. Natural binary number 2\. The result of an experiment fall in the range -4 to +6. A scientist wishes to read the result into a computer and then process them. He decides to use a 4-bit binary code to represents each of the possible inputs. Devise a 4-bit binary code of representing numbers in the range of -4 to 6 3\. The (r-1)'s complement of a base-6 numbers is called the 5's complement. Explain the procedure for obtaining the 5's complement of base 6 numbers. Obtain the 5's complement of (3210)6 4\. Design a three bit code to represent each of the six digits of the base 6 number system. 5\. Represent the decimal number --234.125 using the IEEE 32- bit (single) format A.F. Kana Digital Logic Design. Page 17 Binary Logic Introduction Binary logic deals with variables that assume discrete values and with operators that assume logical meaning. While each logical element or condition must always have a logic value of either \"0\" or \"1\", we also need to have ways to combine different logical signals or conditions to provide a logical result. For example, consider the logical statement: \"If I move the switch on the wall up, the light will turn on.\" At first glance, this seems to be a correct statement. However, if we look at a few other factors, we realize that there\'s more to it than this. In this example, a more complete statement would be: \"If I move the switch on the wall up and the light bulb is good and the power is on, the light will turn on.\" If we l ook at t hese two st atements a s l ogical ex pressions an d u se logical t erminology, we can r educe t he f irst statement to: Light = Switch This m eans no thing m ore t han that the l ight w ill f ollow th e a ction o f th e switch, s o t hat w hen t he switch i s up/on/true/1 t he l ight will also be on/true/1. C onversely, i f t he s witch is down/off/false/0 the light will a lso be off/false/0. Looking at the second version of the statement, we have a slightly more complex expression: Light = Switch and Bulb and Power When we deal with logical circuits (as in computers), we not only need to deal with logical functions; we also need some sp ecial sy mbols t o denote these f unctions in a logical d iagram. T here ar e t hree f undamental logical operations, from which all other functions, no matter how complex, can be derived. These functions are named and, or, and not. Each of these has a specific symbol and a clearly-defined behaviour. AND. The AND operation is represented by a dot(.) or by the absence of an operator. E.g. x.y=z xy=z are all read as x AND y=z. the logical operation AND is interpreted to mean that z=1 if and only if x=1 and y=1 otherwise z=0 OR. The operation is represented by a + sign for example, x+y=z is interpreted as x OR y=z meaning that z=1 if x=1 or y=1 or if both x=1 and y=1. If both x and y are 0, then z=0 NOT. This operation is represented by a bar or a prime. For example x′= x =z is interpreted as NOT x =z meaning that z is what x is not It s hould b e n oted t hat a lthough t he A ND a nd the OR o peration h ave s ome s imilarity w ith the m ultiplication a nd addition respectively in binary arithmetic , however one should note that an arithmetic variable may consist of many digits. A binary logic variable is always 0 or 1. e.g. in binary arithmetic, 1+1=10 while in binary logic 1+1=1 Basic Gate The basic building blocks of a computer are called logical gates or just gates. Gates are basic circuits that have at least one (and usually more) input and exactly one output. Input and output values are the logical values true and false. In computer architecture it is common to use 0 for false and 1 for true. Gates have no memory. The value of the output depends only on the current value of the inputs. A useful way of describing the relationship between the inputs of gates A.F. Kana Digital Logic Design. Page 18 and their output is the truth table. In a truth table, the value of each output is tabulated for every possible combination of the input values. We usually consider three basic kinds of gates, and-gates, or-gates, and not-gates (or inverters). \- The AND Gate The AND gate implements the AND function. With the gate shown to the left, both inputs must have logic 1 signals applied to them in order for the output to be a logic 1. With either input at logic 0, the output will be held to logic 0. The truth table for an and-gate with two inputs looks like this: x y \| z \-\-\-\-\-\-- 0 0 \| 0 0 1 \| 0 1 0 \| 0 1 1 \| 1 There is no limit to the number of inputs that may be applied to an AND function, so there is no functional limit to the number o f i nputs an AND g ate m ay h ave. H owever, f or p ractical r easons, co mmercial A ND g ates ar e m ost commonly manufactured with 2, 3, or 4 inputs. A standard Integrated Circuit (IC) package contains 14 or 16 pins, for practical size and handling. A standard 14-pin package can contain four 2-input gates, three 3-input gates, or two 4- input gates, and still have room for two pins for power supply connections. \- The OR Gate The OR gate is sort of the reverse of the AND gate. The OR function, like its verbal counterpart, allows the output to be true (logic 1) if any one or more of its inputs are true. Verbally, we might say, \"If it is raining OR if I turn on the sprinkler, the lawn will be wet.\" Note that the lawn will still be wet if the sprinkler is on and it is also raining. This is correctly reflected by the basic OR function. In symbols, the OR function is designated with a plus sign (+). In logical diagrams, the symbol below designates the OR gate. The truth table for an or-gate with two inputs looks like this: x y \| z \-\-\-\-\-\-- 0 0 \| 0 0 1 \| 1 1 0 \| 1 1 1 \| 1 As with the AND function, the OR function can have any number of inputs. However, practical commercial OR gates are mostly limited to 2, 3, and 4 inputs, as with AND gates. A.F. Kana Digital Logic Design. Page 19 \- The NOT Gate, or Inverter The inverter is a little different from AND and OR gates in that it always has exactly one input as well as one output. Whatever logical state is applied to the input, the opposite state will appear at the output. The truth table for an inverter looks like this: x \| y \-\-\-\-- 0 \| 1 1 \| 0 The NOT function, as it is called, is necesasary in many applications and highly useful in others. A practical verbal application might be: The door is NOT locked = You may enter In the inverter symbol, the triangle actually denotes only an amplifier, which in digital terms means that it \"cleans up\" the signal but does not change its logical sense. It is the circle at the output which denotes the logical inversion. The circle could have been placed at the input instead, and the logical meaning would still be the same Combined gates Sometimes, it is practical to combine functions of the basic gates into more complex gates, for instance in order to save space in circuit diagrams. In this section, we show some such combined gates together with their truth tables. \- The nand-gate The nand-gate is an and-gate with an inverter on the output. So instead of drawing several gates like this: We draw a single and-gate with a little ring on the output like this: The nand-gate, like the and-gate can take an arbitrary number of inputs. The truth table for the nand-gate is like the one for the and-gate, except that all output values have been inverted: A.F. Kana Digital Logic Design. Page 20 x y \| z \-\-\-\-\-\-- 0 0 \| 1 0 1 \| 1 1 0 \| 1 1 1 \| 0 The truth table clearly shows that the NAND operation is the complement of the AND \- The nor-gate The nor-gate is an or-gate with an inverter on the output. So instead of drawing several gates like this: We draw a single or-gate with a little ring on the output like this: The nor-gate, like the or-gate can take an arbitrary number of inputs. The truth table for the nor-gate is like the one for the or-gate, except that all output values have been inverted: x y \| z \-\-\-\-\-\-- 0 0 \| 1 0 1 \| 0 1 0 \| 0 1 1 \| 0 \- The exclusive-or-gate The exclusive-or-gate is similar to an or-gate. It can have an arbitrary number of inputs, and its output value is 1 if and only if exactly one input is 1 (and thus the others 0). Otherwise, the output is 0. We draw an exclusive-or-gate like this: The truth table for an exclusive-or-gate with two inputs looks like this: A.F. Kana Digital Logic Design. Page 21 x y \| z \-\-\-\-\-\-- 0 0 \| 0 0 1 \| 1 1 0 \| 1 1 1 \| 0 \- The exclusive-Nor-gate The exclusive-Nor-gate is similar to an N or-gate. It can have an arbitrary number of inputs, and its output value is 1 if and only if the two input are of the same values (1 and 1 or 0 and 0). Otherwise, the output is 0. We draw an exclusive-Nor-gate like this: The truth table for an exclusive-nor-gate with two inputs looks like this: x y \| z \-\-\-\-\-\-- 0 0 \| 1 0 1 \| 0 1 0 \| 0 1 1 \| 1 Let us limit ourselves to gates with n inputs. The truth tables for such gates have 2n lines. Such a g ate is completely defined by the output column in the truth table. The output column can be viewed as a string of 2n binary digits. How many different strings of binary digits of length 2n are there? The answer is 22n, since there are 2k different strings of k binary digits, and if k=2n, then there are 22n such strings. In particular, if n=2, we can see that there are 16 different types of gates with 2 inputs. Families of logic gates There are several different families of logic gates. Each family has its capabilities and limitations, its advantages and disadvantages. The following list describes the main logic families and their characteristics. You can follow the links to see the circuit construction of gates of each family. \- Diode Logic (DL) Diode logic gates use diodes to perform AND and OR logic functions. Diodes have the property of easily passing an electrical current in one direction, but not the other. Thus, diodes can act as a logical switch.