cap6-lecture-notes-117-132-6-11.pdf
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6 Branch Prediction & Speculative Superscalar Processors Listing 6.7: RISC-V code generated code from Listing 6.6. Here, the C language’s variable aa is assigned to the RISC-V register x1, and bb to x2. 1 addi x3 , x1 , -2 2 bnez x3 , L1 // branch b...
6 Branch Prediction & Speculative Superscalar Processors Listing 6.7: RISC-V code generated code from Listing 6.6. Here, the C language’s variable aa is assigned to the RISC-V register x1, and bb to x2. 1 addi x3 , x1 , -2 2 bnez x3 , L1 // branch b1 ( aa !=2) 3 add x1 , x0 , x0 // aa
