Digital Electronics Notes PDF

Matoshri College of Engineering and Research Centre, Nashik Course Name: Basics of Electrical and Electronics Engineering Course Code: 24U0104 Class: FE (Engineering Sciences) (Common for all branches) Unit No. 2: Digital Electronics  Contents Logic...

Matoshri College of Engineering and Research Centre, Nashik Course Name: Basics of Electrical and Electronics Engineering Course Code: 24U0104 Class: FE (Engineering Sciences) (Common for all branches) Unit No. 2: Digital Electronics  Contents Logic gates Flip-Flops shift registers and synchronous counters Analog to Digital and Digital to Analog converters (ADC/DAC) Recording and playback concepts Digital audio and video formats Concepts of Microprocessor, Micro controller.  Prerequisite The signal can be of two types: Analog Signal Digital signal Analog Signals: An analog signal is defined as the signal having continuous values. They can have infinite number of different values. Digital SIgnal: A digital signal is defined as the signal which has only a finite number of distinct values. digital signals are not continuous signal. they are discrete signals. Logic Levels: High (1): Represents True state, often corresponding to a higher voltage level (e.g., 5V, 3.3V). Low (0): Represents the False state, corresponding to a lower voltage level (e.g., 0V).  LOGIC GATES Logic gates are the fundamental building blocks of digital circuits. They perform basic logical functions that are essential for digital computation. Each gate takes one or more binary inputs (0 or 1) and produces a single binary output based on a specific logical operation. Logic gates can be combined in various ways to create complex circuits, allowing for the implementation of various functions and operations in computers, calculators, and other digital devices. Different types of logic gates are as follows: Basic Gates:- AND, OR, NOT Universal Gates- NAND, NOR Exclusive Gates-XOR, XNOR.  AND Gate The AND gate has two or more inputs and one output signal. This is a gate which performs a logical operation multiplication, which is commonly known as AND function. This gate is called an AND gate because the gate gives output will be high when all input values are high the output is low or 0 when any of the inputs are low or 0. The symbol of AND Gate & Truth Table is shown below. AND Gate Pin Details IC7408  OR GATE The OR gate has two or more inputs and one output signal. A logical operation or addition, which is commonly known as OR function. This gate is called an OR gate because the gate gives output high only if any or all input values are high The output is low or 0 when both the inputs are low or 0. The symbol of OR Gate & Truth Table is shown below. OR Gate Pin Details IC 7432  NOT Gate Single input and a single output Known as an inverter, because it does the inversion of applied binary signal at the The symbol of NOT Gate & Truth Table is shown below. NOT Gate Pin Details IC 7404  Universal Gates NAND and NOR gates are called "universal gates" because they can be used to create any other type of logic gate (AND, OR, NOT, etc.) and, consequently, any digital circuit. This universality is due to their ability to perform any logical operation when combined in the right way.  NAND GATE It has two or more input terminals and one output terminals. Cascade combination of AND – NOT gates. The output of NAND gate is high or 1 when any one input is low or 0 and the output is low or 0 when all inputs are high or 1. The symbol of NAND Gate & Truth Table is shown below. NAND Gate Pin Details IC 7400  NOR GATE Has two or more input terminals and one output terminal. Cascade combination of OR – NOT gates. The output of NOR gate is high or 1 when all the inputs are low or 0 and the output is low or 0 when one or all inputs are high or 1. The symbol of NOR Gate & Truth Table is shown below. NOR Gate Pin Details IC 7402  Exclusive- OR (EX-OR) GATE This gate has two or more input terminals and one output terminal. The EX-OR Gate has the output only high when an odd number of inputs are high and the output is low when both the inputs are low and both the inputs are high. The symbol of EX-OR Gate & Truth Table is shown below. EX-OR Gate Pin Details IC 7486  Exclusive- NOR (EX-NOR) GATE The EX-NOR gate has terminals like OR gate i.e, two or more input terminals and one output terminal. The EX-NOR Gate has the output only high when both the inputs have the same values either high or low and the output is low when an odd number inputs are high. The symbol of EX-NOR Gate & Truth Table is shown below. EX-NOR GATE IC 74266  Summary AND Gate: Outputs 1 only if all its inputs are 1. OR Gate: Outputs 1 if at least one of its inputs is 1. NOT Gate: Outputs the opposite of its input (inverts the input). NAND Gate: Outputs 0 only if all its inputs are 1 (the inverse of AND). NOR Gate: Outputs 1 only if all its inputs are 0 (the inverse of OR). XOR Gate: Outputs 1 if an odd number of its inputs are available (like 01/10). XNOR Gate: outputs are Opposite to XOR gate. Gates Summary  Gates and IC Number Sr. No. GATE NAME IC Number 1 AND 7408 2 OR 7432 3 NOT 7404 4 NAND 7400 5 NOR 7402 6 EX-OR 7486 7 EX-NOR 74266 Categories of Logic Circuits: There are two general categories of circuits, 1. Combinational Circuits where the input values explicitly determine the output 2. Sequential Circuits where the output is a function of the input values as well as the previous stage of the circuit Thus, sequential circuits usually involve the storage of information. 1-bit Memory Cell: A 1-bit memory cell is a fundamental building block of digital memory, capable of storing a single binary digit (0 or 1). The most common types of 1-bit memory cells are based on various configurations of flip-flops. A 1-bit memory cell can be implemented using SR Latch.  SR Latch The SR (Set-Reset) latch is a basic type of memory circuit made from two cross-coupled NOR or NAND gates. It can store one bit of information and has two inputs: S (Set) and R (Reset). S R Q (Next State) Q’ 0 0 Race Race 0 1 0 (Reset) 1 1 0 1 (Set) 0 1 1 Previous Previous Operation: Set Condition (S = 1, R = 0): When S is set to 1 and R is 0, Q is set to 1. This is the "Set" state. Reset Condition (S = 0, R = 1): When S is set to 0 and R is 1, Q is reset to 0. This is the "Reset" state. Hold Condition (S = 0, R = 0): When both S and R are 0, the latch holds its current state. If Q was previously 1, it remains 1; if Q was previously 0, it remains 0. Invalid Condition (S = 1, R = 1): When both S and R are 1, the outputs become undefined. This state is typically avoided in practical applications, as it can lead to unpredictable behavior. Disadvantages: Race Condition: When both inputs (Set and Reset) are activated simultaneously, the output can enter an undefined state, leading to unpredictable behavior. No Clocking: SR latches are asynchronous, meaning they change state based on input changes without a clock signal, which can lead to timing issues in digital circuits. Glitches: Due to propagation delays, quick changes in input can cause momentary unstable outputs CLOCK In digital electronics, signals are used in rectangular waveform which are represented by logic 1 and logic 0. Logic 1 stands for presence of an electric pulse and 0 for absence of an electric pulse. For example, a signal (10101010) has 50% duty cycle. latches are level triggered while Flip flops are Edge triggered.  Flip Flop A flip-flop is an electronic logic circuit that has two inputs and one output. It is used to store a data value. We know that flip-flop can store either zero or one permanently until a change is made in the inputs. Flip-flops are the basic technology behind computer memory chips  S-R Flip-Flop The S and R inputs only affect the output states when the timing control is high. This controls when the flip-flop responds to its inputs. The timing control input, commonly called “gate”, or “clock”, or “latch enable”, is used to coordinate when new data can be written into the memory element, and conversely, when data cannot be written The flip-flop holds (stores) its value while the clock input is low, latches it! Any changes in the inputs during the time when clock is high will affect the output immediately: the circuit is said to be transparent. This circuit still has a major problem: the stored value is indeterminate if S = R = 1.  Inputs Outputs Remark CLK S R Q Q’ 0 X X NC NC No Change 1 0 0 NC NC No Change 1 0 1 0 1 Reset 1 1 0 1 0 Set 1 1 1 RACE RACE Avoid Operation: Drawback: When both the Set (S) and Reset (R) inputs are activated simultaneously (S = 1, R = 1) or (s=0,r=0)the outputs can enter an undefined state or No change or race around condition. This situation can lead to unpredictable behavior in digital circuits. Application: Memory Storage Data Synchronization Control Circuits Event Counters  D Flip-Flop The D flip-flop is also known as a delay or data flip-flop The problem with S = R = 1 can be avoided using a common input D as shown. It is a variant of the more basic S-R flip-flop (Set-Reset) The output of the flip flop now: – follows the D input while C = 1. – holds its value while C = 0 (Q = last Q when C went low) no matter what happens at the input. The most widely used flip-flops: simple to build and design with. A register comprises several D flip-flops, one for each bit to be stored.  Inputs Outputs Remark CLK D Q Q’ 0 X NC NC No Change 1 0 0 1 Reset 1 1 1 0 Set Operation: Applications: It is used in Delay element. It is used in digital registers and counters.  J-K Flip-Flop The name J-K flip-flop is termed from the inventor Jack Kilby from texas instruments. One of the most useful and versatile flip-flop No indeterminate condition, in the operation of JK flip-flop. If the J and K input are both at 1 and clock is applied then the output will change its previous condition.  Operation:  Inputs Outputs Remark CLK J K Qn+1 Qn+1’ 0 X X NC NC No Change 1 0 0 NC NC No Change 1 0 1 0 1 Reset 1 1 0 1 0 Set 1 1 1 Qn’ Qn Toggle Application: It is used in shift register. It is used in counters  Toggle (T) Flip-Flop The T flip-flop is a single input version of the J-K flip-flop. The T flip-flop is obtained from the J-K type if both inputs are tied together. The toggle, or T, flip-flop is a bistable device, where the output of the T flip-flop "toggles" with each clock pulse. Till CP=0, the output is in hold state (three input AND gate principle). When CP=1, for T=0, previous output is memorized by the circuit. When T=1 along with the clock pulse, the output toggles from the previous value Applications: For frequency division. In counters.  Applications of Flip-Flop Applications of Flip-flops are as specified below. It can be used as Memory element. It is basic block of sequential circuits such as Counters ,Shift Registers and Storage Registers. Frequency Dividers Bounce elimination switch Data storage Data transfer  Shift Registers  Introduction Shift registers are basically sequential circuit. Unlike combinational circuit, sequential circuit outputs are not only dependent of present inputs but also on the past inputs as well. Flip flops are used for storing binary information. Single flip flop can store 1-bit binary data either 0 or 1. To increase the storage capacity, we need to use group of flip flops. Register is a group of flip flops connected together to store multiple bits. The n-bit register consist of n number of flip flops and is capable of storing n-bit information. For example 8-bit register can store 8-bit data for a computer and requires 8 flip flops. Binary data can be entered serially  Shift Register A shift register is a type of digital memory circuit used in electronics for storing and shifting data. It consists of a series of flip-flops connected in a chain, allowing data to be shifted in and out on clock pulses. Features: Data Storage: Shift registers can store multiple bits of data. The number of flip-flops determines how many bits can be stored. Data Shifting: Data can be shifted left or right. When a new bit is entered, existing bits move to make space for it. Clock Controlled: The operation of a shift register is synchronized with clock signals. Data is shifted on the rising or falling edge of the clock. Classification of Shift Registers Serial In serial Out(SISO)  When the clock signal rises, the input data is sampled and stored in the first flip-flop. On subsequent clock pulses, the stored data propagates through the flip-flops, moving from one flip-flop to the next. Each D flip-flop in the circuit has a Data (D) input, a Clock (CLK) input, and an output (Q). The D input represents the data to be loaded into the flip-flop, while the CLK input is connected to the common clock signal. The output (Q) of each flip-flop is connected to the D input of the next flip-flop, forming a cascade.  Disadvantages n clock pulses are required to enter the n-bit data. n clock pulses are required to read the n-bit data. once the data is read, it will be lost. Serial in parallel out (SIPO) Serial Input: Serial input (SI) is the entry point for the data into the shift register. The data bits are fed into the first flip-flop in the register. On each clock pulse, the data bit at the serial input is transferred to the first flip-flop and the existing data in the register shifts by one position. Parallel Outputs: The parallel outputs (Q0, Q1, Q2, etc.) provide access to the stored data in the shift register. Each flip-flop’s output is connected to a separate output line, enabling simultaneous access to the stored data bits. Applications: Data Storage and Buffering Serial-to-Parallel Conversion Parallel in serial out(PISO)  There are four flip-flops labeled D0, D1, D2, and D3.Each flip-flop can store one bit of data. The parallel data is loaded into the flip-flops simultaneously through the parallel input lines. Once the data is loaded, it can be shifted out in a sequential manner through the serial output. To shift the data out, a clock signal is applied to the shift register. Each clock pulse triggers the movement of data from one flip-flop to the next in a cascading fashion. The most significant bit (MSB) is usually the first to be shifted out, followed by the remaining bits. The serial output provides the bits one at a time, in the order they were loaded.  Applications: Reading data into a microprocessor: Data storage Data shifting Data delay Parallel in parallel Out (PIPO)  It consists of four flip-flops, labelled D0, D1, D2, and D3. Each flip-flop can store one bit of data. The data can be loaded into the flip-flops simultaneously through the parallel input, known as the Data input. Once the data is loaded, it can be read out simultaneously from each flip-flop through the parallel outputs. Applications: Data transfer Time delay Temporary data storage  Counters Counters in digital electronics are sequential circuits that store and count the number of input pulses. They can be categorized into several types, including: Asynchronous Counters (Ripple Counters) Each flip-flop in the counter toggles based on the output of the preceding flip-flop, causing a ripple effect. Synchronous Counters All flip-flops are triggered simultaneously by a common clock signal.  Synchronous Counters A synchronous counter is a digital counter that uses a single clock signal to drive all of its flip-flops, which causes all of the flip-flops to change state simultaneously with each clock pulse. This eliminates propagation delays and ripple effects Characteristics: Clock input: Synchronous counters use a continuous clock input signal. Output: The output is generated by the flip-flops. To design counter JK,T, D flip-flops are used. Speed: Synchronous counters are relatively faster than Modulus: The modulus of a counter is the number of distinct count values it can hold before resetting to 0. It is calculated as 2 raised to the power of the number of flip-flops.  Modulus Calculations: Design for Mod-N counter : The steps for the design are – Step 1 : Decision for number of flip-flops – Example : If we are designing mod N counter and n number of flip-flops are required then n can be found out by this equation. N