Analog to Digital Converter PDF

(Analog to Digital Converter) Sampling – converts the continuous signal into a series of discrete analog signals at periodic intervals Quantization – each discrete analog is converted into one of a finite number of (previously defined) discrete amplitude levels Encoding – discrete amplitude l...

(Analog to Digital Converter) Sampling – converts the continuous signal into a series of discrete analog signals at periodic intervals Quantization – each discrete analog is converted into one of a finite number of (previously defined) discrete amplitude levels Encoding – discrete amplitude levels are converted into digital code An analog-to-digital converter, also known as ADC, is a digital circuit used to convert analog signals into digital format. The conversion of analog signals into digital format is crucial for their processing with the help of digital systems like microprocessors, microcontrollers, digital signal processors (DSPs), etc. Therefore, ADCs are important components in several digital systems like computers and other digital devices.. Working of Analog to Digital Converter The working of an analog to digital converter involves the processes explained below: Sampling At this stage, the analog to digital converter samples the input analog signal at regular intervals of time. These time intervals are defined in terms of sampling rate. The sample rate (or sampling rate) is the number of samples taken per second. The units for sample rate are samples per second (sps) or Hertz (Hz) In the sampling process, the analog signal that varies continuously over time is measured at discrete instants of time to collect discrete values of the signal. Sample and Hold Circuit What is the sand H circuit? A Sample and Hold Circuit, sometimes represented as S/H Circuit or S & H Circuit, is usually used with an Analog to Digital Converter to sample the input analog signal and hold the sampled signal. In the S/H Circuit, the analog signal is sampled for a short interval of time, usually in the range of 10µS to 1µS Why is sample and hold used? Sample and Hold is a circuit that is used to take a changing analog signal and literally hold it so that a following circuit or system such as an ADC, (Analog to Digital Converter) has the necessary time it needs to process it. What is holding in ADC? Overall, the purpose of a sample and hold circuit in an ADC is to provide a stable and accurate input signal for conversion to a digital value. By holding the input signal constant for a short period of time, the circuit ensures that the ADC is measuring the signal accurately and reliably. Sample rate and aliasing The more often a signal is sampled, the better the digital representation of the analog signal. If the input signal changes rapidly relative to the speed of the conversion process, then substantial portions of the input signal will be missed (i.e., will go undetected). As an absolute minimum, the input signal must be sampled twice during each cycle. That is, the sampling rate (frequency) must be at least twice the highest frequency component present in the input signal (Shannon’s theorem). While this may sound like a serious limitation, the use of a sample- and-hold circuit actually extends the highest usable frequency of an A/D converter by several thousand times. The figure shows a sine input signal and an ADC that is sampling slower than the signal is changing. In this case, the system would conclude that it was measuring a sinusoid exactly half the frequency of the real input. This is called aliasing. Aliasing can occur any time that the input frequency is a multiple of the sample frequency. Also shown in Figure another input waveform that is not a sinusoid. As you can see, the resulting pattern of data values does not match the input at all. A phenomenon known as aliasing occurs when the signal's higher and lower frequency components cannot be distinguished from one another. In essence, higher frequencies are "folded" back into lower frequencies or "aliased" into them, which distorts or presents the original signal incorrectly. This occurs as a result of the samples' inability to accurately record the high-frequency components' quick changes at low sampling rates, which makes those changes seem as slower fluctuations. filter removes or weakens the signal's high-frequency components that are above the Nyquist frequency. The Nyquist Rate: A signal must be sampled at a rate at least twice that of the highest frequency component that must be reproduced. Quantization Process Quantization is a process of assigning a digital or discrete value to each sampled value of the analog signal. In the process of quantization, the range of all possible analog values is divided into a finite number of discrete digital values. Quantization comes after sampling as a crucial step in converting continuous analog signals to digital signals. A continuous set of values (like voltage levels) is quantized into a discrete set of values. During the analog-to-digital conversion process, each sampled value is matched with the closest value among a limited number of discrete levels. Consider the sampled signal's amplitude as a continuous range. This range is split into quantized fixed intervals, each of which corresponds to a distinct digital code or level. The quantity of these intervals, or quantization levels, is determined by the quantization resolution, expressed in bits. For example, there are 2 3 = 8 different levels to which the sampled values may be translated with a 3-bit quantizer. Quantization Error Since quantization converts a continuous collection of values to a discrete set, it naturally involves an approximation inaccuracy. The discrepancy between the actual sampled value and the quantized value to which it is mapped is referred to as quantization error. Since the nature of quantization error is largely unpredictable, it may be thought of as noise added to the signal. It can, however, be examined and its consequences recognized. The error is often constrained to ±(1/2) of the quantization step size, which is the separation between neighboring quantization levels. What is quantization in ADC? An analog-to-digital converter (ADC) can be modeled as two processes: sampling and quantization. Sampling converts a time- varying voltage signal into a discrete-time signal, a sequence of real numbers. Quantization replaces each real number with an approximation from a finite set of discrete values Quantization Levels and Resolution As was already established, the resolution of the quantizer— typically measured in bits—determines the number of quantization levels. The number of quantization levels increases with resolution, while the quantization error decreases. There are 2^N quantization levels for an N-bit quantizer. An 8-bit quantizer, for instance, will have 2^8 = 256 levels. The signal range divided by the quantity of quantization levels yields the quantization step size. For instance, the step size would be 10/256 ≈ 0.039 volts for a signal that ranges from 0 to 10 volts and has 256 quantization levels. For high-fidelity applications, high-resolution quantization is preferred because it lowers quantization error. It also needs extra bits for representation, which might result in a trade-off in terms of bandwidth and storage. Any system must be designed so that it can keep up with whatever it is measuring. This includes the speed at which the ADC can collect samples and the speed at which the microprocessor can process them. If the input frequency will be greater than the measurement capability of the system, there are three ways to handle it: ▫1. Speed up the system to match the input. ▫2. Filter out high-frequency components with external hardware ahead of the ADC measuring the signal. ▫3. Use Digital Filter (FIR and IIR) to ignore high-frequency components. Resolution  Typical applications require resolutions of 8,12, or 20 bits Encoding Encoding is a process of converting the quantized digital values into their equivalent binary numbers. These encoded binary numbers represent the sampled analog values in the digital format. The resolution, accuracy, and precision of the analog to digital converter is determined by the number of bits used for encoding. Outputting Digital Signal At the end, the analog to digital converter produces a digital signal as output. This output digital signal can be processed, stored, or transmitted by digital systems. TYPES OF ANALOG TO DIGITAL CONVERSIONS If an ADC performs the analog to digital conversion by an indirect method, then it is called an Indirect type ADC. In general, first it converts the analog input into a linear function of time (or frequency) and then it will produce the digital (binary) output. The following are Direct type ADCs:  Counter type ADC (Digital Ramp ADC)  Flash type ADC  Successive Approximation ADC 1- Counter type ADC (Digital Ramp ADC) What is a digital ramp ADC? The Digital Ramp ADC is also known as a counter-type ADC. It uses a binary counter as the register and allows the clock to increment the counter one step at a time until Vo > V+. Circuit shown is a 4 bit Digital Ramp ADC The counter-ramp converter makes use of a D–A converter to perform A–D conversion. A block diagram of this converter is shown in the Figure. At the start of the conversion cycle the digital counter starts to count from zero. An analog output of the D–A converter corresponding to the digital count is compared with the analog input. When the two analog voltages are equal (within one step of the ramp) the output of the analog comparator changes its state. This stops the count and outputs a conversion complete signal indicating that the outputs of the counter now correspond to a digital code representing the analog input. The A–D conversion is thus completed and the counter is reset to start another ramp. Counter Type ADC Operation The N-bit counter produces an n-bit digital o/p which is given as an i/p to the digital to analog circuit (DAC). The analog output equivalent to the digital i/p from DAC is contrasted with the i/p analog voltage with the help of an op-amp comparator. This Integrated Circuit evaluates the two voltages and if the produced DAC voltage is low, it gives a high pulse to the N-bit counter as a CLK pulse to raise the counter. The similar procedure will be continued until the output of the DAC equals to the i/p analog voltage then it produces a low CLK pulse and also gives a clear signal to the counter as well as a load signal to the storage resistor. Here storage resistor is used to store the corresponding digital bits. These digital values are strongly matched with the analog input values with a small error. For each sampling interval, the output of DAC tracks a rampway so that it is named as a Digital ramp kind ADC. And this ramp seems like staircases for each sampling moment, so that it is also named as a staircase approximation kind ADC. Counter Type ADC Conversion Time The ADC conversion time is the time taken the process to change the input sampled analog price to a digital value. Here the most conversions of high i/p voltage for an N-bit ADC is the CLK pulses necessary to the counter to calculate its maximum count value. So The Counter type ADC conversion can be done by this formula, that is = (2N-1) T Where ‘T’ is the time period of the CLK pulse. If N=3 bits, then the T max = 7T. By viewing the above change time of Counter type ADC it is demonstrated that the sampling phase of Counter type ADC should be as shown below. Ts >=(2N-1) T Counter type ADC Advantages  simple to understand and also to operate.  less complex, so the cost is also less, (inexpensive),  high-resolution ADC,  slow conversion rates Counter type ADC Disadvantages  Speed is less, since each time the counter has to begin from ZERO.  There may be conflicts if the next i/p is sampled before completion of one process.  Nonlinearity, a limited input-voltage dynamic range,  Output offset. As the input voltage approaches zero, the output frequency is still offset from zero 2- Flash ADC Flash ADC, also known as Direct ADC, is the fastest ADC available. This type of ADC has sampling rates of the order of gigahertz. The flash ADCs offer such high speeds because they use a bank of comparators that can operate in parallel, each for a certain voltage range. However, the flash ADCs are relatively larger in size and costlier than other types of ADCs. Also, they consume relatively more power. In the case of a flash ADC, if "n bits" is resolution of the ADC, then it requires (2 n –1) comparators in its bank. For example, a flash ADC having 8-bit resolution requires (2 8 –1=255) comparators. It is called the parallel A/D converter, It is formed of a series of comparators, each one comparing the input signal to a unique reference voltage. The comparator outputs connect to the inputs of a priority encoder circuit, which then produces a binary output. The following illustration shows a 3-bit flash ADC circuit: The name "Flash" refers to these ADCs' ability to conduct conversions relatively instantly, similar to the flash of a camera. Flash ADCs are frequently used when speed is critical and latency must be kept to a minimum. The flash analog-to-digital converters are mainly used in digitization of video signals or fast signals in optical storage.  The basic idea behind a Flash ADC is simple: it compares the input analog value to numerous reference voltages and provides a digital output in a single step. Unlike other ADC architectures that utilize iterative or successive processes to arrive at a digital representation of an analog input, Flash ADCs do so in a single pass. An array of comparators, a resistor ladder, and an encoder are the basic components of a Flash ADC. Each comparator in the array is in charge of comparing the input voltage to a predetermined reference voltage. The reference voltages are generated by the resistor ladder, which separates the full-scale input voltage range into many smaller intervals. The comparator array generates a thermometer code, which is a unary representation of the value represented by the number of high bits. The encoder then converts this code into a normal binary form. Architecture of Flash ADCs Comparator Array The central component of the Flash ADC is its comparator array. This array is composed of a parallel arrangement of comparators, with each comparator tasked with comparing the input analog voltage to a designated reference voltage. The number of comparators needed in the array is calculated as 2 N - 1, where N represents the resolution in bits. For instance, in an 8-bit Flash ADC, you would require 2 8 - 1 = 255 comparators. Comparator (a) Comparator symbol (b) Comparator input/output transfer function Indeed, each comparator within the array generates a binary output, typically represented as either '1' or '0,' based on whether the input voltage is greater or lesser than its corresponding reference voltage. The collective outputs from all the comparators form what is referred to as a "thermometer code" due to its resemblance to the markings on a thermometer. In this code, the presence of more '1's indicates a higher level, akin to the rising mercury in a thermometer. n-bit flash ADC Resistor Ladder The resistor ladder, which is essentially a network of series- connected resistors, generates the reference voltages to which the input voltage is compared. The whole voltage reference is divided into equal increments by this ladder. The resistor ladder in an N-bit Flash ADC will have 2N resistors. The resistor ladder is critical because it establishes the incremental stages for comparing the input voltage. Each tap on the ladder is linked to one of the array's comparators. The voltage difference between the taps in the resistor ladder, which is the full- scale voltage range divided by 2 N, is the lowest change in voltage that the ADC can detect. Encoder The outputs of the comparator array, represented as thermometer code, are then given to the encoder. The encoder's job is to convert the thermometer code into a binary code that can be read by digital equipment. Because thermometer codes are unproductive (particularly at higher resolutions), the encoder compresses the data into a more compact binary format. There are various encoding algorithms, with priority encoding being the most frequent. For example, if there are eight comparators and the input voltage exceeds the first five reference voltages, the thermometer code is 11111000. The encoder will convert the thermometer code to binary, which in this case would be 101 for a 3-bit Flash ADC. Advantages of Flash ADCs o Speed o Simplicity Disadvantages of Flash ADCs o Scalability and Power Consumption o Complexity for Higher Resolutions Applications Suited for Flash ADCs Despite their limitations in terms of scalability and power consumption, Flash ADCs remain the ADC of choice in certain applications because of their outstanding speed and simplicity. Ultra-High-Speed Data Acquisition and Video Processing are two popular applications for Flash ADCs.  Ultra-High-Speed Data Acquisition  Video Processing  3- Successive Approximation Register ADC Successive Approximation type ADC is the most widely used and popular ADC method. The conversion time is maintained constant in successive approximation type ADC, and is proportional to the number of bits in the digital output, unlike the counter and continuous type A/D converters. The basic principle of this type of A/D converter is that the unknown analog input voltage is approximated against an n-bit digital value by trying one bit at a time, beginning with the MSB. The principle of successive approximation process for a 4-bit conversion is explained here. The SAR ADC starts working by initializing its internal approximation registers. Then, it takes a sample of the input analog signal and stores it steady until the conversion process completes. After that a binary search algorithm is utilized to perform approximation of the input signal. This process starts by setting the most significant bit (MSB) of the output digital signal to the highest value and compares this value with the sampled input analog signal. In the next step, the SAR ADC compares the sampled input analog signal with the output of an internal digital-to-analog converter that produces a signal proportional to the current approximation of the input signal. Depending on results of the comparison, the SAR ADC successively changes the value of each bit in the digital output until the desired output is obtained. Once all bits of the digital output have been determined, the SAR converter completes the conversion process. The digital output obtained represents the digital approximation of the sampled input analog signal. The SAR analog-to-digital converters are commonly used in various applications, such as consumer electronics, medical instruments, data acquisition systems, etc. This type of ADC operates by successively dividing the voltage range by half, as explained in the following steps: 1. The MSB is initially set to 1 with the remaining three bits set as 000. The digital equivalent voltage is compared with the unknown analog input voltage. 2. If the analog input voltage is higher than the digital equivalent voltage, the MSB is retained as 1 and the second MSB is set to 1. Otherwise, the MSB is set to 0 and the second MSB is set to 1. Comparison is made as given in step (1) to decide whether to retain or reset the second MSB. The above steps are more accurately illustrated with the help of an example. Let us assume that the 4-bit ADC is used and the analog input voltage is V A = 11 V. when the conversion starts, the MSB bit is set to 1. Now VA = 11V > VD = 8V = 2 Since the unknown analog input voltage VA is higher than the equivalent digital voltage V D, as discussed in step (2), the  MSB is retained as 1 and the next MSB bit is set to 1 as follows: VD = 12V = 2 Now VA = 11V < VD = 12V = 2 Here now, the unknown analog input voltage VA is lower than the equivalent digital voltage V D. As discussed in step (2), the second MSB is set to 0 and next MSB set to 1 as VD = 10V = 2 Now again VA = 11V > VD = 10V = 2 Again as discussed in step (2) VA>VD, hence the third MSB is retained to 1 and the last bit is set to 1. The new code word is VD = 11V = 2 Now finally VA = VD , and the conversion stops. Successive approximation consists of a successive approximation register (SAR), DAC and comparator. The output of SAR is given to n-bit DAC. The equivalent analog output voltage of DAC, VD is applied to the non-inverting input of the comparator. The second input to the comparator is the unknown analog input voltage VA. The output of the comparator is used to activate the successive approximation logic of SAR. When the start command is applied, the SAR sets the MSB to logic 1 and other bits are made logic 0, so that the trial code becomes 1000. Advantages of successive approximation 1. Conversion time is very small. 2. Conversion time is constant and independent of the amplitude of the analog input signal VA. Disadvantages of successive approximation 1 Circuit is complex. 2 The conversion time is more compared to flash type ADC.