Data Conversion (5.3) PDF - Aviation Australia

Here is the conversion of the provided document into a structured markdown format. # Data Conversion (5.3) ## Learning Objectives * 5.3.1.1 Identify analogue data (Level 1). * 5.3.1.2 Identify digital data (Level 1). * 5.3.2 Recall the basic operation and function of operational amplifiers (...

Here is the conversion of the provided document into a structured markdown format. # Data Conversion (5.3) ## Learning Objectives * 5.3.1.1 Identify analogue data (Level 1). * 5.3.1.2 Identify digital data (Level 1). * 5.3.2 Recall the basic operation and function of operational amplifiers (S). * 5.3.2.1 Recall the operation of analogue to digital converters (Level 1). * 5.3.2.2 Recall the basic operation of digital to analogue converters (Level 1). * 5.3.2.3 Recall the applications of analogue to digital converters (Level 1). * 5.3.2.4 Recall applications of digital to analogue converters (Level 1). * 5.3.2.5 Identify the analogue data inputs and digital data outputs of analogue to digital converters (Level 1). * 5.3.2.6 Identify digital data inputs and analogue data outputs of digital to analogue converters (Level 1). * 5.3.2.7 Recall the limitations of the various types of digital and analogue data (Level 1). ## Digital and Analogue Data ### Definitions At a practical level, the difference between analogue data and digital data is in how the data is measured. Analogue data is continuous and aims to identify every nuance of what is being measured, while digital data uses sampling to encode what is being measured. Analogue is the unfiltered raw data and digital is filtered data for practical use. ## Converting Between Analogue and Digital Analogue-to-Digital Converters (ADC) and Digital-to-Analogue Converters (DAC) are used to interface computers to the analogue world so that a computer can monitor and control a physical variable. A typical system may include: * Transducer * ADC * Computer * DAC * Actuator. An understanding of Op-amps used as comparators is required to understand the operation of ADCS and DACs and will be introduced in the following section. The image shows a block diagram of an analogue-to-digital and digital -to-analogue converter. The diagram shows five components or steps in the process: 1) Physical Variable -> Transducer -> 2) Electrical analogue output -> ADC -> 3) Digital System (e.g Computer) including digital inputs/outputs -> DAC -> 4) Analogue output -> 5) Actuator -> to control physical variable. ## Transducer The physical variable is normally a non-electric quantity. A transducer is a device that converts that physical variable into an electrical variable ## ADC The transducer's electrical analogue output serves as the analogue input to the ADC. The ADC converts this analogue input into a digital output. The output consists of a number of bits that represents the analogue value. For example, the transducer may output an analogue voltage range of 800 to 1500 mV, which the ADC might convert to 01010000 (80) to 10010110 (150). ## Computer The digital representation from the ADC is processed by the computer. It may perform calculations or other operations and then give a digital output to manipulate the physical variable. ## DAC The digital output from the computer is converted to a proportional analogue voltage or current. For example, the computer may output a digital range between 00000000 and 11111111, which the DAC converts to a voltage ranging from 0 to 10 V. ## Actuator The analogue signal from the DAC is often connected to some device used to physically control or adjust the physical variable. ## Operational Amplifiers ### The Op-Amp Operational amplifiers are often used to compare the amplitude of one voltage with another. In this application, the op-amp is used in the open-loop configuration, with the input voltage on one input and a reference voltage on the other. The image shows the pinout for a 741 op-amp in an 8-pin DIL package, including pin names and numbers. It also shows the schematic symbol with inputs labeled as inverting and non-inverting. Operational amplifier is an 8 pin chip labeled as: * pin 1 Offset null * pin 2 Inverting input * pin 3 Non-inverting input * pin 4 Vs- * pin 5 Offset null * pin 6 Output * pin 7 Vs+ * pin 8 Not connected Operational amplifier circuit symbol showing: * Negative input labeled as "-" * Positive input labeled as "+" * Output as Vout * Positive supply label as Vs+ * Negative supply label as Vs- The term operational amplifier, or op-amp, refers to a class of high-gain DC-coupled amplifiers with two inputs and a single output. The modern Integrated Circuit (IC) version is typified by the famous 741 op-amp. Some of the general characteristics of the IC version are: * High gain, on the order of a million * High-input impedance, low-output impedance * Used with split supply (usually +/- 15 V) * Used with feedback, with gain determined by the feedback network. ## Zero Level Detection One application of an op-amp used as a comparator is to determine when an input voltage exceeds a certain level. Note in the illustration that the inverting input is grounded to produce a zero level and that the input signal is applied to the non-inverting input. The image shows a standard op-amp configuration for zero level detection, with the inverting input grounded and the input signal connected to the non-inverting input. The illustration also shows input and output waveforms, where the output is at its maximum negative or positive value depending on whether the input is below or above zero. Because of the high open-loop voltage gain, a very small difference between the two inputs drives the op-amp into saturation, causing the output voltage to go to its limit. For example, consider an op-amp with a gain of 100 000. A voltage difference of only 0.25 mV between the inputs could produce an output voltage of 25 V if the op-amp were capable. However, since most op-amps have a maximum output voltage of +/- 15 V because of their DC supply voltages, the device would be driven into saturation. The wave shape illustration shows the result of a sine wave input voltage applied to the non-inverting input of the zero-level detector. When the sine wave is negative, the op-amp output is at its maximum negative level. When the sine wave input crosses zero (going positive), the amplifier is driven to its opposite state and the output goes to its maximum positive level. The zero-level detector can be used as a squaring circuit to produce a square wave from a sine wave. ## Non-Zero Level Detection The zero-level detector can be modified to detect voltages other than zero by connecting a fixed reference voltage to the inverting input as shown in diagram (a) using a battery. A more practical arrangement is shown in diagram (b) uses a voltage divider to set the reference voltage. A Zener diode can also be used to set the reference voltage. The image shows three related circuit diagrams and graphs: (a) a battery reference circuit, (b) a voltage divider reference circuit, and (c) an output waveform. (a) shows an op-amp with the positive input connected to the input voltage, and the negative input connected to the output of a voltage source labeled $V_{REF}$. (b) shows a similar circuit, except the reference voltage is generated by a voltage divider consisting of two resistors, $R_1$ and $R_2$, connected to a voltage source +V. $V_{REF}$ is the voltage at the midpoint of the voltage divider. (c) shows a graph of the output voltage vs time. When the input voltage ($V_{in}$) is less than the reference voltage ($V_{REF}$), the output voltage is at its minimum (-Vout(max)). When the input voltage exceeds the reference voltage, the output jumps to its maximum (+Vout(max)). As long as the input voltage ($V_{in}$) exceeds the reference voltage ($V_{REF}$), the output goes to its maximum positive voltage. ## Non-Inverting Amplifier An op-amp is connected in a closed-loop configuration as a non-inverting amplifier with a controlled amount of voltage gain. The image shows a basic non-inverting amplifier circuit. The op-amp has the non-inverting input labeled with a plus sign "+", and the inverting input labeled with a minus sign "-". The input voltage, $V_{in}$, is connected to the plus input. The output voltage $V_{OUT}$ is connected through a resistor $R_2$ to the minus input. The minus input is also connected through a resistor $R_1$ to ground. The input signal is applied to the non-inverting input ($V_{in} +$). The output is applied back to the inverting input (negative -) through the feedback circuit (closed loop) formed by Resistor input ($R_1$) and Resistor feedback ($R_2$). This creates negative feedback as follows. $R_1$ and $R_2$ form a voltage divider circuit which reduces Voltage out ($V_{out}$) and connects the reduced voltage to the inverting input. ## Inverting Amplifier The Inverting amplifier input signal is applied to the inverting input (2). The output is applied back to the inverting input (2) through the feedback circuit (closed loop) formed by Resistor input ($R_1$) and Resistor feedback ($R_f$). This creates negative feedback using $R_1$ and $R_f$ as a voltage divider circuit. The voltage divider reduces Voltage out ($V_{out}$) and connects the reduced feedback voltage to the inverting input. The image shows a schematic diagram of an inverting amplifier circuit using an op-amp. The inverting input to the op-amp (marked with a "-"), is connected to the input voltage ($V_{in}$) through a resistor labeled $R_1$. It is also connected to the output voltage ($V_{out}$) through a resistor labeled $R_f$. The non-inverting input to the op-amp (marked with a "+") is connected to ground. The power supply terminals $V+$ and $V-$ are also indicated on separate leads on the image. The output of the op-amp is labeled Vout. For equal resistors, the circuit has a gain of -1 and is used in digital circuits as an inverting buffer (also known an inverter). Therefore, an op-amp inverting amplifier with a gain of 1 serves as an inverting buffer. ## Digital to Analogue Conversion ### Digital-to-Analogue Converters One common requirement in electronics is to convert signals back and forth between analogue and digital forms. Most such conversions are ultimately based on a DAC or D/A converter circuit. Therefore, it is worth exploring just how we can convert a digital number that represents a voltage value into an actual analogue voltage. Digital input values on 1, 2, 4, and 8 are input to the op-amp via weighted resistors. The resultant voltage from the resistors is applied to the inverting input of the op-amp. The image shows a binary weighted resistor DAC circuit and has the following components: * 4 inputs labeled 1, 2, 4, 8. * The resistors are arranged sequentially. Closest to the 1 labeled 20k, then next to the 2 labeled 10k, then next to the 4 labeled 5k, then next to the 8 labeled 2.5k Resistor Rf is connected as resistance of 4k. * An op-amp with the non-inverting input grounded and the inverting input connected to the resistors. * The output of the op-amp is labeled $V_{out}$. ## Binary Weighted Resistor DAC The illustrated circuit is the binary weighted resistor DAC shown in the previous section. It assumes a 4-bit binary number. The circuit uses +5 volts as a logic 1 and 0 volts as a logic 0. The circuit will convert the applied binary number to a matching (inverted) output voltage. In the following circuit, the digits 1, 2, 4 and 8 refer to the relative weights assigned to each input. Thus, 1 is the Least Significant Bit (LSB) of the input binary number, and 8 is the Most Significant Bit (MSB). The image shows a binary weighted resistor DAC circuit implemented using an op-amp. The inputs are labelled as 1, 2, 4 and 8. The resistors are arranged sequentially. Closest to the 1 labelled 20k, then next to the 2 labelled 10k, then next to the 4 labelled 5k, then next to the 8 labelled 2.5k. Resistor Rf is connected as resistance of 4k. The Op Amp is marked as 741. If the input voltages are accurately 0 and +5 volts, then the 1 input will cause an output voltage of -5 × (4 k/20 k) = -5 × (1/5) = -1 V whenever it is a logic 1. Similarly, the 2, 4 and 8 inputs will control output voltages of -2, -4 and -8 V respectively. As a result, the output voltage will take on one of 10 specific voltages in accordance with the input BCD code. In the diagram below, the circuit is a binary weighted resistor DAC and truth table shows the conversion for a binary-weighted resistor DAC. The image shows a schematic of weighted resistor DAC with four inputs and then its expected output. Resistors for D, C, B, A are 1 kΩ, 2 kΩ, 4 kΩ and 8 kΩ respectively. The output has a resistor of 1 kΩ | D | C | B | A | Vout (Volts) | | --- | --- | --- | --- | ------------ | | 0 | 0 | 0 | 0 | 0 | | 0 | 0 | 0 | 1 | -0.625 | | 0 | 0 | 1 | 0 | -1.250 | | 0 | 0 | 1 | 1 | -1.875 | | 0 | 1 | 0 | 0 | -2.500 | | 0 | 1 | 0 | 1 | -3.125 | | 0 | 1 | 1 | 0 | -3.750 | | 0 | 1 | 1 | 1 | -4.375 | | 1 | 0 | 0 | 0 | -5.000 | | 1 | 0 | 0 | 1 | -5.625 | | 1 | 0 | 1 | 0 | -6.250 | | 1 | 0 | 1 | 1 | -6.875 | | 1 | 1 | 0 | 0 | -7.500 | | 1 | 1 | 0 | 1 | -8.125 | | 1 | 1 | 1 | 0 | -8.750 | | 1 | 1 | 1 | 1 | -9.375 | ## R/2R Ladder DAC Binary weighted resistor DACs have some practical limitations. This is because there is a large difference in resistor values between the LSB and MSB. For example, in a 12-bit binary weighted resistor DAC - if the MSB resistor is 1 kΩ, then the LSB resistor will be over 2 MΩ. The problem is that when temperature varies, the resistance values over such a large range cannot maintain the correct ratios. The R/2R ladder overcomes this issue through its different circuit construction. The R/2R ladder uses only two resistance values and they are not greatly different. This means temperature variations have very little effect on the accuracy or the resistor ratios and therefore also have little effect on the voltage levels applied to the op-amp. The image shows a schematic diagram of an R/2R ladder DAC circuit implemented around an op amp with a four-bit input. Resistors in the ladder are marked R or 2R. ## R/2R Ladder DAC Operation The following diagram, is an example of a 4-bit R/2R Ladder DAC circuit with the inputs labelled. O/P is the output. The image shows a schematic diagram of a 4-bit R/2R ladder DAC circuit with inputs and output labeled, built around an op-amp. Resistors are marked R or 2R. Input voltages of 0V and 5V are shown. Inputs are labeled S4 (LSB), S3, S2, and S1 (MSB). The fundamental operating principle of the R/2R ladder is that two parallel resistors of equal value have an overall circuit resistance of one half of the value of an individual resistor. So two 2xR resistors in parallel have an overall resistance of 1xR. Selecting inputs as either five volts or zero volts determines the configuration of the resistive circuit. In the R/2R ladder illustrated has a binary input of 0001 where the one equals five volts on S1. S1 is the most significant bit (MSB) and S4 is the least significant bit (LSB) so the input of 0001 illustrated represents a binary value of $1000_2$. ## Analogue to Digital Conversion ### Analogue to Digital Conversion Methods Analogue to Digital Conversion (ADC) is a common interfacing process often used when a linear analogue system must provide inputs to a digital system. Many methods for ADC are available. We will cover the basic operation of two ADC types: * Flash or simultaneous * Digital-ramp or counter-type. The ADC process is generally more complex and time-consuming than the DAC process and many different methods have been developed. It may never be necessary to design or construct an ADC (they are available as complete packaged units). However, the techniques that are used provide insight into what factors determine an ADC's performance. The image shows a block diagram where an analog signal (labeled IN) is converted to digital signal (labeled OUT) using an ADC block. ## Flash ADC To convert a digital code to an analogue voltage, we only had to find a way to effectively assign an appropriate voltage to each bit, and then combine them. Is there an equally easy way of finding the digital code that corresponds to a given analogue voltage? The image shows a schematic digram of a **Flash ADC**(Analog to Digital Converter). The flash ADC circuit includes a series of comparators that compare the input voltage ($V_{in}$) to a series of reference voltages derived from a resistor ladder ($V_{ref} = 3V$). Consider the very simple requirement to determine whether an analogue voltage was closest to 0, 1, 2 or 3 volts. The result is stored as a 2-bit binary number. The first step in making this determination might be a set of three comparators, connected as shown below. As the analogue voltage increases, the comparators will, one by one from the bottom up, change state from false to true. Of course, additional digital circuitry will be required to encode these signals into the corresponding digital number. But this circuit forms the sensing array that will determine directly which code will be closest to the actual analogue voltage. The image shows a schematic digram of a **Flash ADC with Encoder**(Analog to Digital Converter). The flash ADC circuit includes a series of comparators that compare the input voltage ($V_{in}$) to a series of reference voltages derived from a resistor ladder ($V_{ref} = 3V$). The output is connected to a logic encoding gate with outputs 1 and 0. This approach will work and can be expanded to any number of steps for finer resolution of the analogue voltage. However, as you have probably already perceived, there is a problem with this approach in that the number of comparators required increases exponentially with the number of binary bits used to store the code. Using this approach to convert a 0 to 9-V range to a binary number will require nine comparators. A 4-bit binary number, counting from 0 to 15, requires 15 comparators. And a typical 8-bit circuit requires 255 comparators. This approach rapidly becomes too expensive for ordinary use, although it is practical if very high speed is required. The image shows a schematic of a flash ADC with a number of comparators increasing exponentially with increasing binary bits ## Flash ADC Encoder Due to the nature of the sequential comparator output states (each comparator saturating 'high' in sequence from lowest to highest), the same highest-order-input selection effect may be realised through a set of Exclusive-OR (XOR) gates. This allows the use of a simpler, non-priority encoder. The encoder circuit itself can be made from a matrix of diodes, demonstrating just how simply this converter design may be constructed. Not only is the flash converter the simplest in terms of operational theory, but it is the most efficient of the ADC technologies in terms of speed, being limited only in comparator and gate propagation delays. Unfortunately, it is the most component-intensive for any given number of output bits. The image shows a "Flash ADC encoder" circuit. An additional advantage of the flash converter, often overlooked, is the ability for it to produce a scaled output. For example, the diagram shows a float sensor in a fuel tank. Near the half-full point, the float moves almost vertically, giving a realistic readout of the contents. But at the extremities of close to full and empty, the float has more horizontal movement, giving a larger change in angle. This would result in a large change in the output voltage for little change in fuel level. The image shows a diagram of an analogue fuel sender. By adjusting the value of the resistors, each change of Binary 1 at the output would represent the same change in fuel quantity, no matter the fuel level. With equal-value resistors in the reference voltage divider network, each successive binary count represents the same amount of analogue signal increase, providing a proportional response. For special applications, however, the resistor values in the divider network may be made unequal. This gives the ADC a custom, nonlinear response to the analogue input signal. No other ADC design is able to grant this signal-conditioning behaviour with just a few component value changes. ## 3-Bit Flash ADC Example Calculate the encoder inputs and digital outputs for the following analogue input voltage levels: Ex 1: $V_A$ = 2 volts Ex 2: $V_A$ = 4 volts Ex 3: $V_A$ = 5 volts The image shows a 3-bit flash ADC circuit diagram and truth table. The ADC circuit includes 7 comparators (C1-C7) connected to a series of reference voltages created by 1kΩ resistors. The output of the comparators is fed into a priority encoder, resulting in a 3-bit digital output represented by bits A, B and C (MSB). The resolution is 1V. The image then shows a truth table relating the Analog in voltage $V_A$ to the comparator outputs C1 through C7, and the digital output A, B, and C: | Analog in | Comparator outputs | Digital output | | :----------------- | :--------------------------------------------------- | :------------- | | $V_A$ | C7 C6 C5 C4 C3 C2 C1 | C B A | | 0-1 V | 0 0 0 0 0 0 0 1 | 0 0 0 | | 1-2 V | 0 0 0 0 0 0 1 1 | 0 0 1 | | 2-3 V| 0 0 0 0 0 1 1 | 0 1 0 | | 3-4 V | 0 0 0 0 1 1 1 | 0 1 1 | | 4-5 V | 0 0 0 1 1 1 1 | 1 0 0 | | 5-6 V | 0 0 1 1 1 1 1 | 1 0 1 | | 6-7 V | 0 1 1 1 1 1 1 | 1 1 0 | | >7V | 1 1 1 1 1 1 1 | 1 1 1 |