Chapter 3a: Memory Organization PDF

Summary

This document provides an overview of memory organization in computer systems. It discusses different types of memory, including internal and external memory, and their characteristics like capacity, unit of transfer, access methods, and performance parameters (access time, memory cycle time, and transfer rate).

Full Transcript

Chapter 3a: Memory Organization Memory System Key Characterist ics Memory Types Internal Memory  Often equated with main memory.  The processor requires its own local memory, in the form of registers.  Further, as we shall see, the control unit portion of the pr...

Chapter 3a: Memory Organization Memory System Key Characterist ics Memory Types Internal Memory  Often equated with main memory.  The processor requires its own local memory, in the form of registers.  Further, as we shall see, the control unit portion of the processor may also require its own internal memory.  Cache is another form of internal memory External (Secondary) Memory  External memory consists of peripheral storage devices, such as disk and tape, that are accessible to the processor via I/O controllers Memory Capacity Internal Memory Typically expressed in terms of bytes (1 byte 8 bits) or words. Common word lengths are 8, 16, and 32 bits. Common word size is multiple of 8 bits e.g., 8-bit word, 16-bit word, 32-bit word, 64-bit word etc. External Memory External memory capacity is typically expressed in terms of bytes. Name Description Size* Range* char Character or small signed: -128 to 127 1byte integer. unsigned: 0 to 255 signed: -32768 to 32767 short int(short) Short Integer. 2bytes unsigned: 0 to Memory 65535 Capacity signed: - 2147483648 to int Integer. 4bytes 2147483647 unsigned: 0 to 4294967295 signed: - 2147483648 to long int (long) Long integer. 4bytes 2147483647 unsigned: 0 to 4294967295 Unit of Transfer The number of bits read out of memory or written into memory at a time. For internal memory  The value for unit of transfer may be equal to word length, but often larger.  Usually governed by data bus width (e.g., 64-bit data bus means 64 bits are transferred into memory or retrieved from memory at one time) For external memory  Usually transfer a block of data, which is much larger than a word  Addressable unit  Smallest location which can be uniquely addressed  For external memory, normally addressed using cluster on a number of disks Unit of Transfer Example: USB flash drive By 2003, most USB flash drives had USB 2.0 connectivity, which has 480 Mbit/s as the transfer rate. Newer USB 3.0 interface specifies transfer rates up to 5 Gbit/s. Access Methods Sequential Random Direct Associative Sequential Access E.g., tape drives Memory is organized into units of data, called records Start at the beginning and read through in order The access time depends on the location of data. A linked list Random Access Random (e.g., RAM, ROM) Individual address identify an exact location. Any location can be selected at random and directly addressed and accessed like accessing an Array. Direct Access E.g., disk drives. Individual blocks have unique address. A combination between random access and sequential access. The access time depends on both the memory organization and characteristics of storage technology. Associative Access E.g., cache Data is retrieved based on the portion of its contents rather than its address. Enables one to make a comparison of desired bit locations within a word for a specified match. Performance Parameters Access time Memory cycle time Transfer rate Access Time The time an address is presented to the memory that data have been stored or made available for use. For random-access memory, this is the time it takes to perform a read or write operation. For non-random-access memory, access time is the time it takes to position the read–write mechanism at the desired location. LOWER ACCESS TIME, thus higher performance. Memory Cycle Time Access time PLUS any additional time required before a second access can start. Additional time is to generate data if they a read destructively -When data is read from memory, the stored data is extracted (removed) from memory and in the process the data is erased in the source. Note that memory cycle time is concerned with the system bus, not the processor. LOWER MEMORY CYCLE, thus higher performance. Transfer Rate Rate at which data can be moved into or out of memory. HIGHER TRANSFER RATE, thus higher performance. Physical/Materials Types Semiconductor: e.g., Random Access Memory (RAM) Magnetic: e.g., Disk, Tape Optical: e.g., CD, DVD *NOTE: A disk uses magnetic technology, whereas disc uses laser technology. Physical Characteristics Decay: information is lost when electrical power is switched off. Volatility (volatile vs. non-volatile) Volatile - A memory in which a constant electrical power source is required to maintain the contents of memory. Non-volatile - Memory whose contents are stable and do not require a constant power source. Erasable (erasable e.g., RAM; non-erasable memory cannot be altered e.g., Read-Only Memory (ROM) Power consumption Organization By organization is meant the physical arrangement of bits to form words. The basic element of a semiconductor memory. Memory Hierarchy As one goes down the hierarchy, the following occur: Decreasing cost per bit Increasing capacity Increasing access time Decreasing frequency of access of the memory by the processor Design Constraints How much? Capacity or size of memory. Bigger SIZE of memory, SLOWER access time. How fast? Must be able to keep up with processor. FASTER access time, GREATER cost per bit. How expensive? The cost must be reasonable in relationship to other components. GREATER capacity, SMALLER cost per bit. Design Constraints To achieve greatest performance, the memory must be able to keep up with the processor. Need to use expensive, relatively low-capacity memory with short-access time. Balance between cost and capacity. A Practical Solution Apply the memory hierarchy. Smaller, more expensive and fast memory are supplemented by larger, cheaper and slow memory. The key idea is to decrease the frequency of access from the processor to the larger but slower memory.

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