Untitled Quiz

Chapter 2: Memories - Part 2 - Cache Memories

• Cache memory is a faster SRAM memory with a lower capacity than main memory (DRAM), located closer to the processor.
• It stores frequently used information from main memory.
• This reduces the number of RAM accesses, saving time.
• The significant performance gap between processor speeds (e.g., 9 GHz) and memory speeds (e.g., 1 GHz) is a problem.
• Processor speed increases faster than memory speed, causing bottleneck issues.
• The frequent exchanges between the processor and main memory cause a bottleneck and impact processor performance.
• Bus transfer time is a contributing factor to the performance slowdown.
• SRAM memories have low integration density and are expensive, limiting large capacity main memories.

Introduction - Performance Gap Problem

• A substantial gap exists between processor and main memory speeds in computer systems.
• Processor performance increases significantly faster than memory performance (e.g., over 50% per year for processors vs. only 7% per year for memory).
• This creates a performance bottleneck that limits overall system speed.

Locality Principles

• Spatial locality: If a program accesses a particular memory location, it's likely to access nearby locations in the near future (e.g., array access).
• Temporal locality: Data or instructions that are accessed frequently are likely to be accessed again soon (e.g., loop variables).

Functioning Principle of Caches

• Caches bring fast low-capacity memory closer to the processor to work with the slower, high-capacity main memory.
• The processor first checks the cache for a requested word.
• If the word is found in the cache (cache hit), it's retrieved quickly.
• If it's not found (cache miss), the word is retrieved from main memory and added to the cache, potentially replacing existing cache data.
• The algorithm for reading a word involves checking if the word is in the cache.
• If not, the cache is checked for space; if full, existing data is replaced, and the new word is loaded into the cache and the processor.

Cache Memory Types - Direct Cache

• The simplest cache type.
• The main memory address is split into index, label, and offset.
• Index determines which cache entry to check.
• Offset locates the required word within a data line.
• Label determines if the information is in the cache.

Cache Memory Types - Associate Cache

• More complex and expensive compared to direct cache.
• Each cache location can store different data.
• The cache controller checks if the label is present in any of the cache lines.

Mixed Cache

• The cache is divided into blocks managed like direct caches.
• One comparator per block is used.
• Addresses are checked simultaneously.
• Data is loaded into the chosen block in the case of failure.

Number and Location of Caches

• Caches aim to increase the amount of information transferred to the processor per unit time (increase bandwidth).
• The goal is to bring memory as close as possible to the processor to minimize transfer times.
• Due to limited integration, multiple levels of memory (e.g., L1, L2, L3 caches) are used.
• The processor first checks L1, then L2, and finally the main memory (if needed).