Paging Segmentation and Two-Level Page Table
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Questions and Answers

What is the primary function of the Memory Management Unit (MMU)?

  • Demand paging and dynamic partitioning
  • Cache management and write buffering
  • Access control and translation of virtual addresses (correct)
  • Memory allocation and deallocation

    • What is the maximum number of entries in a page directory in a two-level page table lookup?

  • 2048
  • 1024 (correct)
  • 8192
  • 4096

    • What is the size of each page in a two-level page table lookup?

  • 4 MB
  • 16 MB
  • 1 MB
  • 4 KB (correct)

    • What is the purpose of the Translation Lookaside Buffer (TLB)?

    <p>To cache virtual-to-physical address translations</p> Signup and view all the answers

    What is the maximum size of a supersection in the ARM memory system?

    <p>16 MB</p> Signup and view all the answers

    What is the purpose of the access permission bits in the ARM memory system?

    <p>To control access to memory regions</p> Signup and view all the answers

    What is the primary purpose of the access control bits in an ARM memory management system?

    <p>To control access to a region of memory by a given process</p> Signup and view all the answers

    What is the term for a collection of sections and/or pages with particular access permissions in the ARM architecture?

    <p>Domain</p> Signup and view all the answers

    What is the primary purpose of a translation lookaside buffer (TLB) in a memory management system?

    <p>To perform virtual-to-physical address translation</p> Signup and view all the answers

    What is the term for a memory management technique that allocates fixed-size blocks of memory to a process?

    <p>Fixed partitioning</p> Signup and view all the answers

    What is the primary purpose of swapping in a memory management system?

    <p>To transfer a process from main memory to secondary storage</p> Signup and view all the answers

    What is the term for a table that stores the mapping of virtual addresses to physical addresses in a memory management system?

    <p>Page table</p> Signup and view all the answers

    What occurs when the CPU activates the I/O hardware in a page fault handling routine?

    <p>The page is transferred from disk to main memory</p> Signup and view all the answers

    What is the primary advantage of segmentation in memory management?

    <p>It simplifies the handling of growing data structures</p> Signup and view all the answers

    What is the purpose of the Translation Lookaside Buffer (TLB)?

    <p>To translate virtual addresses to physical addresses</p> Signup and view all the answers

    What is the maximum size of the physical address space in the Intel x86 architecture?

    <p>4 Gbytes</p> Signup and view all the answers

    What is the purpose of the privilege mechanism in segmentation?

    <p>To restrict access to data segments based on clearance level</p> Signup and view all the answers

    What is the result of a TLB miss in the TLB operation?

    <p>The OS instructs the CPU to read the page from disk</p> Signup and view all the answers

    What is the purpose of demand paging in memory management?

    <p>To transfer pages from disk to main memory only when needed</p> Signup and view all the answers

    What is the role of the page table in memory management?

    <p>To translate virtual addresses to physical addresses</p> Signup and view all the answers

    What is the benefit of segmented paged memory in the Intel x86 architecture?

    <p>It provides predictable access times and allows for the efficient allocation of memory within partitions</p> Signup and view all the answers

    What is the purpose of the page fault handling routine in memory management?

    <p>To transfer pages from disk to main memory</p> Signup and view all the answers

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