MSP430G2553 Microcontroller Timers and Clocks

Timers

• A simple way to delay an instruction is using a loop that does nothing, but this method is imprecise and can vary due to interruptions.
• Timers are more precise and flexible for managing time.
• Timers act as chronometers/counters.

MSP430G2553 Clocks

• Before discussing the Timers, the clock system needs describing.
• A clock is a square signal with a fixed frequency.
• Edges of this signal synchronize the operations of the UCT and microcontroller peripherals.
• The duration between two "clicks" (Tclk) is the clock cycle, equal to the inverse of the clock frequency.

References

• A microcontroller requires a reference to produce a regular signal.
• For the MSP430G2553, the reference options include:
• An external quartz crystal oscillating at 32768 Hz, connected via XIN and XOUT pins
• An internal slow electronic oscillator (VLO), oscillating at ~12 kHz with low power consumption
• An internal fast electronic oscillator (DCO), digitally controlled with adjustable oscillation frequency up to ~20 MHz
• DCO frequency adjusts using the BCSCTL1 and DCOCTL registers.
• Calibrated values declared in msp430g2553.h can be used: 1 MHz, 8 MHz, 12 MHz, and 16 MHz.
• To set the DCO to 8 MHz, add the following code lines:

BCSCTL1 = CALBC1_8MHZ ;
DCOCTL = CALDCO_8MHZ ;

• The DCO defaults to ~1 MHz without adjustments.
• The DCO is less precise than an external quartz crystal because its frequency is temperature-sensitive.
• For high-precision applications like serial communication, a quartz crystal is required.

Clocks

• Based on the references, the MSP430 clock system produces square signals and provides three distinct clock signals:
• MCLK (Master Clock) is generally high frequency and clocks the UCT, based on the DCO by default.
• SMCLK (Sub-Main Clock) is generally high frequency and clocks selected MSP430 peripherals, also based on the DCO by default.
• ACLK (Auxiliary Clock) is low frequency, economic, and clocks selected MSP430 peripherals.
• Each clock can be based on the three references except ACLK, which cannot be based on the DCO.
• Dividers can reduce clock frequency.
• MSP430 clocks are easily configured, started, and stopped.
• SMCLK and ACLK signals are accessible on pins P1.4 and P1.0 via P1SEL and P1SEL2 configurations.

MSP430 Timer Operation

• Microcontroller timers are useful for:
• Generating periodic events
• Managing precise timekeeping
• Counting input events
• Generating delays
• Waking up the microcontroller from a low-power state periodically
• The MSP430G2553 has 3 Timers:
• A Watchdog Timer prevents infinite loops and program blocking (systematically deactivated).
• Two identical Type A Timers, TA0 and TA1.
• Subsequent sections describe a Timer Type A.
• All registers will be named TAxxx (TAR, or TACCRO).
• Replace TAxxx with TA0xxx to use TA0, use TA1xxx to use TA1.

TAR Register

• The TAR register is the heart of the timer, a 16-bit register increasing by 1 with each clock cycle.
• The clock signal can be SMCLK, ACLK, or an external TA0CLK signal applied to P1.0 (if configured for use).
• Clock signals can have dividers (/2, /4, /8), reducing the increment frequency of the TAR register.
• Incrementing TAR is done autonomously once the Timer starts.

Increment Modes

• The TAR register can increment in 3 modes:
• Continuous Mode
• The TAR register increments from 0 to its maximum value, FFFFh (65535), and restarts.
• If the SMCLK frequency is 1 MHz (1 µs/cycle) then, without a divider, TA0 will reach max in 65535 µs/cycle
• Using a /8 divider (8 µs/increment), the cycle lasts 8 * 65536 = 524288 µs (~0.5 s).
• ∆t of a cycle, in general: ∆t = 65536 * Tclk/divider
• Up Mode
• The TAR register increments from 0 to the value defined in TACCR0, then resets and restarts
• Δt = (TACCR0 + 1) * Tclk/divider
• Up/Down Mode
• The TAR register increments from 0 to TACCR0, then decrements to 0, and restarts.
• Δt = 2 * TACCR0 * Tclk/divider

Timer Interrupts

• The Timer sends an interrupt request when passing by 0:
• In continuous mode, when it goes from FFFFh to 0.
• In up mode, when it goes from TACCRO to 0.
• In up/down mode, when it passes from 1 to 0.
• TAIFG (in the TACTL register) represents the flag, and TAIE represents the interrupt activation bit ( in TACTL).
• The interrupt vector associated is TIMER_A1_VECTOR, linked to several other flags.
• The TAIFG flag must be reset to 0 at the end of the routine of interruption.

Timer Configuration

• TACTL and TACCR0 registers configure the Timer operation
• TACCR0 determines the Timer's max value in up/down modes.
• Family guide gives following for TACTL:
• TASSELx: defines the clock used by Timer
• 00: TACLK (TASSEL_0)
• 01: ACLK (TASSEL_1)
• 10: SMCLK (TASSEL_2)
• 11: INCLK, inverse of TACLK (TASSEL_3)
• IDx: defines the divider for the clock frequency
• 00: No divider (ID_0)
• 01: /2 (ID_1)
• 10: /4 (ID_2)
• 11: /8 (ID_3)
• MCx: defines the Timer counting mode
• 00: Timer stopped (MC_0)
• 01: Up mode (MC_1)
• 10: Continuous mode (MC_2)
• 11: Up/down mode (MC_3)
• TACLR: setting this bit to 1 resets the Timer (TAR register) to 0 (without generating an interrupt)
• TAIE: interrupt enable bit for the TAIFG flag.
• TAIFG: interrupt flag.

Example program

• Following program turns on a DEL connected in P1.0, off 0.5s afterwards, then on again 0.5s afterwards, => inverse the state of pin P1.0 every 0.5 seconds.
• A timer can perform an operation at precise time intervals.
• The Timer will be configured to request an interrupt every 0.5s. Then, in an interruption routine, it will inverse P1.0. This inversion happens every 0.5s.
• A Timer needing interruption at the end of its cycle must last 0.5s. In up-mode, we can set the duration of the duration using TACCR0.
• It's suggested SMCLK is used, based on DCO set to 1Mhz, without divider
• ⇨ A clock cycle lasts Tclk = 1 µs : Timer increases by 1 every µs.
• A cycle length is (TACCR0 + 1) * Tclk = 0.5s = 500 000 με
• D'où TACCR0 = 500000μς/1μς-1 = 499999
• TACCRO, like TAR, is a 16 bit register, and its max value is at 65535
• There are 2 solutions:
• Make make the Timer loop multiple times ⇨ delay incrementation using a divider
• Here, the second solution is used. Using a /8 divider, the Timer increments every 8µs. - We then have (TACCRO + 1) * 8μs = 500 000 µs d'où TACCR0 = 62499 - The value is accessible for a 16 bits register.
• Program to follow. Will use Timer O, which should be indicated in the register names (TACCR0 → TAOCCR0, TACTL → TA0CTL

#include <msp430g2553.h>
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; //on désactive le watchdog timer
BCSCTL1 = CALBC1_1MHZ ;
DCOCTL = CALDCO_1MHZ ;
P1DIR |= BIT0 ;
// P1.0
TA0CTL = 0x02D2 ;
//voir ci-après
TA0CCR0 = 62499 ;
//interruption toutes les 0.5s
BIS_SR(GIE | LPM1_bits);
interruptions activées + mode LPM1
}
#pragma vector = TIMER0_A1_VECTOR
// routine associée au Timer 0
interrupt void clignotementDEL1(void)
{
P1OUT ^= BIT0 ;
// on inverse l'état de la DEL
TA0CTL &= ~TAIFG ;
//remise à 0 du flag TAIFG
}

• Instrucion TA0CTL = 0x02D2 is clearer whe written in binary 02D2h: 02D2h = 0000 0010 1101 0010.
• The contents of TA0CTL are then:

• Unused	TASSELX	IDx	MCx	Unused	TACLR	ΤΑΙΕ	TAIFG
  0000 00	10	11	01	0	0	1	0

• that configure the Timer on SMCLK (itself by default on DCO, at 1 MHz), fixes the divider to /8, puts the Timer in up-mode, activates interruptions and puts the flag to 0..
• In the file msp430g2553.h permits a simpler scripture of the instruction:
• TA0CTL = TASSEL_2 | ID_3 | MC_1 | TAIE ;
• The constants TASSEL_2, ID_3, MC_1 and TAIE are defined in msp430g2553.h.

MSP430G2553 Timer Connections

• table showing pins, device input signals, module input names, module block, module output signal, broche de sortie for Timer 0 and Timer 1 (see image)
• table is taken from MSP430G2553 information. Is taken from ce tableau, issu de la notice du MSP430G2553. In this table, the pin's name is followed by the number (IV section, I, 2) going between 1 and 20.
  • Ex: P1.0-2

Capture/Compare

• Each timer of the MSP430 (TA0 and TA1) has 3 capture/compare channels (channel 0: CCR0, channel 1: CCR1, channel 2 : CCR2).
  • These 3 capture/compare channels are centralized around one register (TACCR0, TACCR1 et TACCR2 repectively), and are configured thanks to a configuration register (TACCTL0, TACCTL1 et TACCTL2).
• Each of these channels can:
  • capture Timer value during an event: capture mode
  • trigger a trigger for a specified timer value : compare mode
  • directly control the state of certain pins (generation of pwm, ....) the channel 0's behavior is lightly different to the others.

Capture mode

• we're focusing on the channel x (x= 0,1 or 2). To put the channel into capture mode, we must place the bit CAP of TACCTLx to 1. Consider a timer in continues mode (simpler to use in capture mode).
• This mode's function in simple: upon occurrence of an a given event, the Timer value (value in register TAR) is written in the TACCRx register. - This permits (after a few calculations) to determine the moment at which the event occurred at is reached.
• The aim of the mode: "capture" the moments at which the events take palce".

Where are these detected ?

• A capture channel can react to events on a large amount of peripherals, internal (clocks) as external (pins, comparator,...). - However, the six capture channels (3 channels on 2 Timers) cannot capture events on all of these peripherals: each channel can only be used for 2 peripherals. These peripherals can be seen in the III table, in the column DEVICE INPUT SIGNAL. - For instance, the 1 Timer O channel can deteect TA0., which corresponds to the P1.2 pin) or on CAOUT (comparator).
• To capture events on one or the other of the of these two peripherals, one should select it.
• For each channel x, these two peripherals are labeled CCIXA et CCIxB. - Bits CCISx permits indicating on which channel events aew researched for. 00: CCIXA 01: CCIxB 10: GND 11: Vcc
• For instance:
• For the Timer 0 (so the first table), channel 0 (CCRO tables, in the module block column), the Input CCI0À corresponds to TA.0 input, located at the pin P1.1.
  • Hence, the channel 0, configures on CCIOA, will react on events at the pin P1. 1
    • If however, , one regulates on the channel CCIOB, one will then deect the events on ACLK, in other words, at the auxiliary clock.
• for the Timer 1, channel 2 (x=2), l'entrée CCI2A corresponds à l'entrée TA1.2, located at the pin P2.4
• Attention, pins used in the input of capture must be configured as this, with the aid of reegisters P1SEL et P1SEL2 (for port 1) and P2SEL1 et P2SEL2 for port 2.

what type of vent can you capture?

• This can come from decending, ascending fronts, or both,
• This can be regulated to bits CMx : 00: no capture 01: rising edge 10: decending front 11: rising and decending front

Evets in the program

• It can also be useful to detect an event in the program ( the moment whe one the value of a variable increments, reaches the end of the cycle,...).
  • To do this, one can simulate fronts thanks to CCISx, by alternating the value 10 (GND) and 11 (Vcc).
    • For example, passing CCISx from 10 aà 11 crates an rising fron for the respected channel, which will reate the events.

How can we know if an event has en captured?

• At the moment of the capture of TAR value during an event, the channel that has caoptured emits an interruption (the flag goes to 1).
  • Remark : there is the potential capability of doing manual capyres" : one con launch the Timer, detect an event in the program (via poling d'intérruption), d, and writing the value TAR at that moment . -However capture channels permit capture automatically automatically, automatically, without slowing the program , and in a manner (environ 20 ns entre l'événement et sa capture).

Compare mode

• The compare mode(bit CAP à 0) permit a channel X to launch an interrupt ask, hen the Timer reaches a certain alu in the TACCX register. - it Can be said the tiimer i comparable to the TACCRx value

Is mode useful is we should efectuate tacks at precise timings:

• these tasks ill simply bee efecttuated in the interruption routines
• In this mode canal 0 lays out a different role than canals let 2.
• The channel TACCRO imposes, it is also the max value Timer itself in up-mode and up-down-mode.
• example in continues
• Le principe est le même en up mode, mais cette fois-ci le registre de comparaison ne peut plus être TACCR0, qui fixe la valeur maximale du Timer:
• Il faut donc utiliser le canal 1 (ou le 2). Le flag TAIFG est mis à 1 lorsque le Timer passe à 0, en même temps (quasiment) que le flag CCIFG du canal 0 (donc de TACCTL0) puisque TACCRO est atteint.
• Le flag CCIFG du canal 1 (donc de TACCTL1) est mis à 1 lorsque TACCR1 est atteint.

Output flags

• Chaque canal de capture/comparaison peut produire un signal de sortie:
• ce signal de sortie est une tension (carrée) périodique, de période et de rapport cyclique configurables.
• Pour le canal i du Timer j, ce signal est noté TAj.i (par exemple, le canal 0 du Timer 1 produit TA1.0)
• Ces signaux peuvent être envoyés directement sur les broches du microcontrôleur.
• il est ainsi possible de produire facilement des tensions périodiques carrées de forme configurable (ex : PWM). - Pour être utilisées ainsi, les broches doivent être configurées (cf annexe). Caque canal peut piloter deux (ou 3) broches.
• Le tableau du III précise ces broches : par exemple, le canal 0 (CCR0) du Timer 0 peut envoyer son signal de sortie sur les broches P1.1 et P1.5.
• Ces signaux de sortie peuvent aussi piloter d'autres périphériques (ADC10,...).

Register TACCTL

• Les registres TACCTL0, TACCTL1 et TACCTL2 permettent de configurer les canaux 0,1 et 2. Ces 3 registres sont identiques :

CMx : these bits permit to define the events to detect in capture mode

• 00: pas de capture (CM_0)
• 01: front montant (CM_1 -" 10_ front demending (CM_2) 11: fronts montant and descendant (CM_3) CIsx : allow you to define which peripheral is used are detected, in the capture
• 00: CCIxA (CCIS_0)
• 01: CCIxB (CCIS_1)
• 10 : GND (CCIS_2)
• 11: Vcc (CCIS_3)"" SCS: one should put it at I in capture mode CAP
• 1- capture mode capture
• 0: comparison mode

OUTMODx : configure the output signal for capture/compression

• 000: pas de signal de sortie (OUTMOD_0)
• 001: mode set (OUTMOD_1)A
• 010: mode toggle/reset (OUTMOD_2)
• 011: mode set/reset (OUTMOD_3)b
• 100 : mode toggle (OUTMOD_4)
• 101: mode reset (OUTMOD_5)
• 110: mode toggle/set (OUTMOD_6)
• 111 : mode reset/set (OUTMOD_7)
• ccté ; activate the interrupt
  • 0 interruotions inactive
  • 1: interruptions activated CCifA : nterruption flags
• 0: no interruption asked ""
• 1" une n-interruptions asked one interruption is being asked

MSP430 Timer Interruptions

Flags

• InterruptionLes timers du MSP430 disposent d'un certain nombre de flags, donc peuvent émettre un certain nombre d'interruptions différentes. Les deux Timers (TA0 et TA1) disposent en effet d'un flag propre (bit TAIFG du registre TACTL).
• De plus, les deux Timers disposent de 3 canaux de comparaison/capture, chacun pouvant émettre une interruption grâce à son propre flag (bits CCIFG de TACCTL0,, TACCTL1 et TACCTL2). Iy a donc 8 sources possibles d'interruption (8 flags différents) : 4 par Timer.
• Pour chaque Timer. Le canal 0 joue un rôle particulier.
• Son flag est associé à un vecteur d'interruption qui lui est propre
• : TIMER 40 VECTOR.
• Il est de plus prioritaire sur es autres flags (y conpris TAIFG) : si 2 interruptions sont émises en même temps (ce qui peut arriver avec des Timers), la routine dlinterruption associée au canal 0 est exécutée en priorité.
• Ayant son vecteur d'interruption propre, le flag CCIFG du canal 0 est automatiquement remis à 0 à l'exécution de la routine d'interruption.
• Les 3 autres flags (TAIFG, CCIFG(1) et CCIFG(2)) se partagent le même vecteur d'interruption .- TIMER AL VECTOR: Une premlèrn conséquence est qu'ils ne sont pas remis à 0 automatiquement à l'exécution de In routine d'intorruption .
• fl faut le faire rnannellenient. ' Lino deuxlórnn conséquence est gu'à l'appel do In routine d'interruption, fl faut souwoir ù'où Wient l'interruption.
• Pour cula fl fnut tester les flags et regarder leguel (ou lesguels) sort pasnds à t.

Going further: the register TAIV

• Si plusieurs sources il'inlerruptloni associées au vecteur TIMER-At-VECTOR sont activées, fl faut, 1 l'appel de la routine d'interruption associés, savoir guel flag est passé ii 1 , Le test successif de chaque flng il'interruplions peut dire assez lent .
• line soluilion plus efficace os! proposén par le MSP430 le registre TAIV Er fonction clu !lag mis n 1, ceiui-ci prend une valeur différente

If the following interruption happens in this order and flag values:

• Aucun/ Flag: None/ TAIV value: 0000h: Priority: highest

• Canal 1 / Flag: CCIFG(1)/ TAIV value: 0002h/

• Canal 2 / Flag: CCIFG(2)/ TAIV value: 0004h/

• Timer / Flag: TAIFG/ TAIV value: 000Ah/ Priority: lowest

• Il suffit donc de tester la valeur de TAIV pour savoir d'où vient l'interruption.

• La valeur de TAIV n'est changée que si les interruptions sont activées sur le flag passé à 1.

• Le fonctionnement de TAIV est optimisé : à la lecture de ce registre, le flag passé à 1 est automatiquement remis à 0, ainsi que TAIV lui-même.

• De plus, si une autre interruption provenant d'un Timer est demandée pendant qu'une routine d'interruption est exécutée, celle-ci est mise en attente.

• La valeur de TAIV est alors automatiquement mise à jour pour correspondre au nouveau flag en attente.

• La valeur de TAIV doit être testée avec une instruction switch, dont la syntaxe sera présentée dans les exemples.

• Le tableau précédent présente aussi l'ordre de priorité dans lequel TAIV évolue. Par exemple, si le canal 1 et le canal 2 envoient simultanément une demande d'interruption, alors TAIV sera mis à 0002h, puis à 0004h.

MSP430 Timer Applications

Capture Mode: Event Counter

• Creating an event counter might involve counting photons, shocks etc., using an electronic circuit of the controller.
• The goal is to count the fronts, and save arrival timings in a table
• Wanting to save 10 values, which is micro seconds; The brosh P1.1 will receive data from the table, this input correspond to the ICCIOA, so ICCIOA from channel 0 of Timer 0.
• Also wanting a precision that equals 1us, which would activate the timer to 1Mhz

C tables in general

• In C, a is a variable type:

• to declare write a able with 10 variable write:

  • int AintIO

• to declare able with 20 variable unsigned character; write:

  • B: 1nassigned char [20]

• use A[1 to look at if f numbers of A table

• The N table begins with 0 and ends with N

  • in examples with 4 examples they are labeled A0 A1 A2 A3

• To intitiate able yiu ust use this, in code:

int A [4]-{lOtlOl

• Can only be during the timer when is created.
• on using the register, timers for that registers are:

int ab - de tours -
int nb des coups
unsigmned long ant a I lot (0J