Memory Management Concepts in Operating Systems
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Questions and Answers

What is the primary purpose of memory management algorithms?

  • To enhance the performance and response time of the CPU (correct)
  • To allocate resources evenly across all processes
  • To minimize the physical memory size required by programs
  • To ensure data security by isolating process memory

    • What describes the role of the memory management unit (MMU)?

  • It ensures the fastest memory access speed
  • It allocates memory by using first-fit strategies
  • It translates logical addresses to physical addresses (correct)
  • It manages CPU scheduling directly

    • Which of the following describes external fragmentation?

  • Memory that cannot be accessed or used by any process
  • Wasted memory from incomplete memory allocations
  • Unused memory spaces within allocated memory blocks
  • Scattered free memory blocks that are too small to use (correct)

    • Which memory allocation strategy can lead to the most efficient use of memory?

    <p>Best-fit strategy</p> Signup and view all the answers

    What kind of addressing is utilized during a typical instruction-execution cycle?

    <p>Any combination of addressing modes</p> Signup and view all the answers

    Which of the following characterizes internal fragmentation?

    <p>Memory blocks that are allocated but contain unused space</p> Signup and view all the answers

    In a paging system, what is the function of a translation look-aside buffer (TLB)?

    <p>To provide a faster address translation</p> Signup and view all the answers

    What is a consequence of closely integrated hardware and operating-system memory management?

    <p>Higher performance and efficiency in memory handling</p> Signup and view all the answers

    What is the primary advantage of dynamic loading over static loading?

    <p>It loads routines only when they are needed.</p> Signup and view all the answers

    Which statement about dynamically linked libraries (DLLs) is true?

    <p>DLLs can be shared among multiple processes.</p> Signup and view all the answers

    What is the role of the relocation register in memory protection?

    <p>It contains the starting physical address for a process.</p> Signup and view all the answers

    Which of the following describes static linking?

    <p>It requires linking libraries at compile time.</p> Signup and view all the answers

    What is a significant disadvantage of static linking?

    <p>Programs require relinking to incorporate library updates.</p> Signup and view all the answers

    How does the limit register function in conjunction with the relocation register?

    <p>It restricts logical addresses to a defined range.</p> Signup and view all the answers

    What does dynamic linking allow that static linking does not?

    <p>Using shared libraries across multiple programs.</p> Signup and view all the answers

    What is the consequence of memory protection in a multitasking environment?

    <p>It prevents one process from accessing another's memory.</p> Signup and view all the answers

    What characterizes the contiguous memory allocation method?

    <p>Each process occupies a single contiguous block of memory.</p> Signup and view all the answers

    How does dynamic loading benefit large programs?

    <p>Only necessary routines are loaded when required.</p> Signup and view all the answers

    Why do operating systems provide dynamic linking support?

    <p>To manage memory more efficiently across processes.</p> Signup and view all the answers

    Which is a key distinction of DLLs compared to statically linked libraries?

    <p>DLLs can be loaded at runtime instead of compile time.</p> Signup and view all the answers

    What composes the general-purpose storage that the CPU can access directly?

    <p>Main memory and CPU registers</p> Signup and view all the answers

    What happens to a program referencing an updated DLL?

    <p>It automatically utilizes the new version.</p> Signup and view all the answers

    What is the role of the base and limit registers in a memory management system?

    <p>To define a range of legal addresses for a process</p> Signup and view all the answers

    What happens when a user mode program attempts to access an illegal memory address?

    <p>A trap to the operating system occurs</p> Signup and view all the answers

    How does the hardware protect the operating system from user processes?

    <p>By using base and limit registers for memory access control</p> Signup and view all the answers

    Why is it necessary to have fast memory, such as a cache, between the CPU and main memory?

    <p>To reduce the frequency of memory stalls</p> Signup and view all the answers

    Which instruction set allows the operating system to load base and limit registers?

    <p>Privileged instruction</p> Signup and view all the answers

    What happens when the main memory is not available for the CPU to access?

    <p>The CPU remains idle until memory is available</p> Signup and view all the answers

    Which of the following statements about memory access is incorrect?

    <p>Memory accesses operate at the same speed as CPU clock cycles</p> Signup and view all the answers

    What is the effect of context switching in a multiprocessing system?

    <p>It saves and restores the process state between executions</p> Signup and view all the answers

    What describes the process of address binding?

    <p>Linking virtual memory addresses to physical memory addresses</p> Signup and view all the answers

    What is the consequence of the operating system having unrestricted access to memory?

    <p>It allows for process management and error handling</p> Signup and view all the answers

    Which of the following is a benefit of using a cache memory?

    <p>It speeds up data retrieval for the CPU</p> Signup and view all the answers

    Which statement best summarizes the purpose of dynamic linking?

    <p>To allow programs to share libraries at runtime</p> Signup and view all the answers

    In the context of memory management, what does the 'logical address space' refer to?

    <p>The range of addresses a process can legally access</p> Signup and view all the answers

    What is the main advantage of using dynamic loading in executing a program?

    <p>It allows for better memory utilization by loading routines only when called.</p> Signup and view all the answers

    What does a logical address refer to in the context of a computer's memory?

    <p>An address generated by the CPU.</p> Signup and view all the answers

    In which address-binding method does the binding of addresses occur at run time?

    <p>Execution time binding.</p> Signup and view all the answers

    What is the role of the memory management unit (MMU) in relation to logical and physical addresses?

    <p>It converts logical addresses to physical addresses.</p> Signup and view all the answers

    Which of the following is an effect of compile-time address binding?

    <p>The program must be recompiled if the starting address changes.</p> Signup and view all the answers

    What happens to logical addresses generated by a program when execution-time binding is used?

    <p>They result in a separate logical address space.</p> Signup and view all the answers

    What does the relocation register do in memory management?

    <p>It maps logical addresses to their corresponding physical addresses.</p> Signup and view all the answers

    What is the consequence of execution-time address binding on the way processes are managed in memory?

    <p>It requires special hardware support to manage address mappings.</p> Signup and view all the answers

    How does load-time address binding differ from compile-time address binding?

    <p>It allows binding to occur later than during program compilation.</p> Signup and view all the answers

    What limitation does traditional dynamic loading impose on the execution of processes?

    <p>Entire programs must be loaded into memory before execution.</p> Signup and view all the answers

    What type of address may be referred to as a virtual address?

    <p>A logical address mapped during execution.</p> Signup and view all the answers

    What would happen without a relocation register when using execution-time binding?

    <p>Processes could never be moved in memory.</p> Signup and view all the answers

    What helps facilitate the mapping of logical addresses to physical addresses?

    <p>The memory management unit (MMU).</p> Signup and view all the answers

    Which of the following statements is true about the structure of address spaces?

    <p>Physical address space is independent of the logical address space.</p> Signup and view all the answers

    Why is the relocation-register scheme beneficial for operating system memory management?

    <p>It permits the operating system's size to adjust dynamically as needed.</p> Signup and view all the answers

    What happens to a process’s memory when it terminates?

    <p>The operating system releases it for other processes.</p> Signup and view all the answers

    What does external fragmentation refer to in memory management?

    <p>The situation where total free memory can satisfy a request but isn't contiguous.</p> Signup and view all the answers

    Which memory allocation strategy allocates the first hole that is large enough?

    <p>First fit</p> Signup and view all the answers

    How does the best-fit strategy differ from the first-fit strategy?

    <p>Best fit allocates the smallest hole sufficient for the process.</p> Signup and view all the answers

    What is a consequence of using first-fit and best-fit memory allocation strategies?

    <p>They commonly lead to external fragmentation.</p> Signup and view all the answers

    Why might the worst-fit strategy not be preferable in memory allocation?

    <p>It generally leads to the greatest amount of fragmentation.</p> Signup and view all the answers

    What happens if a process arrives when there is insufficient memory?

    <p>The process is rejected, and an error message is provided.</p> Signup and view all the answers

    Which factor does not affect the level of fragmentation?

    <p>The number of CPU cores in the system.</p> Signup and view all the answers

    What is one potential issue when adjacent holes become available in memory?

    <p>They can be merged to form larger holes for better allocation.</p> Signup and view all the answers

    How does the system determine which free hole to allocate to an incoming process when using first-fit?

    <p>By scanning from the beginning until a suitable hole is found.</p> Signup and view all the answers

    Which is typically true about first-fit and best-fit strategies in terms of performance?

    <p>First-fit is generally faster but may not perform best in terms of storage utilization.</p> Signup and view all the answers

    What does a process get when it is allocated space in memory?

    <p>A portion of memory where it competes for CPU time.</p> Signup and view all the answers

    What does a limit register do in memory management?

    <p>It ensures processes do not exceed their allocated memory space.</p> Signup and view all the answers

    What does the 50-percent rule related to memory fragmentation imply?

    <p>Half of the allocated memory may be unusable due to fragmentation.</p> Signup and view all the answers

    What is internal fragmentation?

    <p>Unused memory that is internal to a partition.</p> Signup and view all the answers

    What purpose does compaction serve in memory management?

    <p>To shuffle memory contents together and eliminate holes.</p> Signup and view all the answers

    Under what condition is compaction possible?

    <p>When relocation is done dynamically during execution time.</p> Signup and view all the answers

    What is a page in the paging technique?

    <p>A fixed-sized block of logical memory.</p> Signup and view all the answers

    What is the primary function of the page table in a paging system?

    <p>To hold the corresponding frame number for each logical page.</p> Signup and view all the answers

    How does the logical address structure in paging work?

    <p>It combines page number and displacement to create a frame address.</p> Signup and view all the answers

    What does paging help to eliminate in memory management?

    <p>External fragmentation.</p> Signup and view all the answers

    What typically defines the size of a page in a paging system?

    <p>It is determined by the hardware as a power of 2.</p> Signup and view all the answers

    What is the first step in translating a logical address to a physical address in a paging system?

    <p>Extract the page number and index into the page table.</p> Signup and view all the answers

    What are the two parts of the address generated by the CPU in a paging system?

    <p>Page number and page offset.</p> Signup and view all the answers

    What is an advantage of implementing paging in operating systems?

    <p>Provides logical and physical memory separation.</p> Signup and view all the answers

    What happens when a process requests a block that perfectly matches an available memory hole?

    <p>Internal fragmentation may occur.</p> Signup and view all the answers

    What can result from static relocation during memory management?

    <p>Inability to perform compaction.</p> Signup and view all the answers

    What is the physical address mapping for logical address 4?

    <p>24</p> Signup and view all the answers

    What type of fragmentation occurs when the last allocated frame is not completely full?

    <p>Internal fragmentation</p> Signup and view all the answers

    What is a potential downside of using smaller page sizes in paging systems?

    <p>Increased overhead in page-table entries</p> Signup and view all the answers

    How many pages would a process of 72,766 bytes require if the page size is 2,048 bytes?

    <p>36 pages</p> Signup and view all the answers

    Which of the following correctly identifies a characteristic of paging?

    <p>It maps logical addresses to physical addresses.</p> Signup and view all the answers

    How does operating system manage physical memory in a paging system?

    <p>By managing available frames and their allocation.</p> Signup and view all the answers

    What is the main advantage of paging with respect to memory allocation?

    <p>It allows for dynamic relocation of logical addresses.</p> Signup and view all the answers

    What happens when a process requires more frames than available in memory?

    <p>The process will be allocated as many frames as possible.</p> Signup and view all the answers

    Which system call can be used on Linux to obtain the current page size?

    <p>getpagesize()</p> Signup and view all the answers

    What might be a consequence of having larger page sizes?

    <p>Increased internal fragmentation.</p> Signup and view all the answers

    How are logical addresses translated into physical addresses in a paging system?

    <p>Through a combination of address translation hardware and page tables.</p> Signup and view all the answers

    What should the operating system do when a new process is ready to be executed?

    <p>Match the process size to the number of available pages.</p> Signup and view all the answers

    What is usually stored in a page table entry?

    <p>The physical frame number associated with a logical page.</p> Signup and view all the answers

    What information does a frame table entry indicate?

    <p>Whether the physical page frame is free or allocated</p> Signup and view all the answers

    What happens if the ASIDs do not match during a context switch?

    <p>The attempt is treated as a TLB miss.</p> Signup and view all the answers

    What is the role of a page table in memory management?

    <p>To translate logical addresses to physical addresses</p> Signup and view all the answers

    What action must be taken if the TLB does not support separate ASIDs during a context switch?

    <p>The TLB must be flushed.</p> Signup and view all the answers

    Why does paging increase context-switch time?

    <p>Because the CPU must exchange all register values during a context switch</p> Signup and view all the answers

    How is the effective memory-access time calculated when considering TLB hits and misses?

    <p>It averages the access times for hits and misses weighted by their probabilities.</p> Signup and view all the answers

    Which component minimizes memory access delays in a paging system?

    <p>The translation look-aside buffer (TLB)</p> Signup and view all the answers

    What does a hit ratio of 80 percent imply about TLB performance?

    <p>The desired page number is found in the TLB 80 percent of the time.</p> Signup and view all the answers

    What happens in the case of a TLB miss?

    <p>Memory address translation requires additional memory references</p> Signup and view all the answers

    What would be a suitable size for a TLB according to modern hardware implementations?

    <p>Typically between 32 and 1,024 entries</p> Signup and view all the answers

    What is indicated by a valid–invalid bit in a page table entry?

    <p>The page is located in the process's logical address space.</p> Signup and view all the answers

    What is one of the trade-offs when page tables are stored in main memory rather than fast registers?

    <p>Increased memory access time</p> Signup and view all the answers

    What would occur if an attempt is made to write to a read-only page?

    <p>A hardware trap is triggered.</p> Signup and view all the answers

    What is the possible impact of an increased TLB hit ratio on effective memory-access time?

    <p>It may slightly improve access time.</p> Signup and view all the answers

    What does the page-table base register (PTBR) do?

    <p>It serves as a pointer to the page table</p> Signup and view all the answers

    What is a potential consequence of having both L1 and L2 TLBs in a CPU?

    <p>It may increase the overall memory access time.</p> Signup and view all the answers

    In a scenario where the TLB is already full and a new entry needs to be added, what must occur?

    <p>An existing entry must be replaced</p> Signup and view all the answers

    What role do address-space identifiers (ASIDs) play in TLB management?

    <p>They identify each process for address-space protection</p> Signup and view all the answers

    What is the primary purpose of protection bits in a paged memory environment?

    <p>To prevent unauthorized access to memory pages.</p> Signup and view all the answers

    What does a miss in the L2 TLB imply for memory access?

    <p>The page table must be accessed more frequently.</p> Signup and view all the answers

    What is a significant drawback of using hardware registers for page tables?

    <p>It increases context-switch time due to register exchange</p> Signup and view all the answers

    How does the operating system relate to the paging implementation and TLB design?

    <p>Operating systems must adapt paging to accommodate TLB characteristics.</p> Signup and view all the answers

    When logical addresses are generated, what is the first step taken by the memory management unit (MMU)?

    <p>It checks if the page number is in the TLB</p> Signup and view all the answers

    What is the total time taken for a mapped-memory access when the page number is found in the TLB?

    <p>10 nanoseconds.</p> Signup and view all the answers

    If a page table is reasonably small, why might it be implemented using dedicated high-speed hardware registers?

    <p>To improve access time for frequently used entries</p> Signup and view all the answers

    What potentially happens when ASIDs are not used in a TLB?

    <p>All processes could incorrectly reference old TLB entries.</p> Signup and view all the answers

    What is the relationship between TLB design changes and operating systems?

    <p>Changes in TLB design may necessitate paging implementation changes in OS.</p> Signup and view all the answers

    What is the primary difference between swapping and paging?

    <p>Swapping involves moving entire processes, while paging refers to moving pages of a process.</p> Signup and view all the answers

    What is the maximum valid address within the discussed address range for the paging system?

    <p>12287</p> Signup and view all the answers

    In mobile operating systems, why is swapping typically avoided?

    <p>Flash memory can only handle a limited number of writes.</p> Signup and view all the answers

    What happens to read-only data in Apple's iOS when memory is low?

    <p>It is removed from memory and can be reloaded later.</p> Signup and view all the answers

    What is the main consequence of internal fragmentation in paging?

    <p>Wasted memory space</p> Signup and view all the answers

    Which technology allows systems to verify the size of the page table?

    <p>Page-table length register (PTLR)</p> Signup and view all the answers

    What action does Android take if insufficient free memory is available?

    <p>It writes the application state to flash memory before terminating a process.</p> Signup and view all the answers

    Why is it wasteful for processes with low memory usage to allocate a complete page table?

    <p>Most of the table would remain empty</p> Signup and view all the answers

    Which statement about the efficiency of swapping pages compared to entire processes is correct?

    <p>Swapping pages is more efficient than swapping entire processes when there is sufficient physical memory.</p> Signup and view all the answers

    What characteristic must a code have to be shared among processes in a paging environment?

    <p>Reentrant code</p> Signup and view all the answers

    When a system faces memory restrictions due to swapping, what are the suggested approaches?

    <p>Terminate some processes or increase physical memory.</p> Signup and view all the answers

    What is one of the primary benefits of using shared pages in a system?

    <p>Reduced memory usage</p> Signup and view all the answers

    Which of the following describes how Solaris handles swapping?

    <p>It uses standard swapping under dire circumstances of low available memory.</p> Signup and view all the answers

    In a hierarchical paging system, what are logical addresses divided into?

    <p>Page number and page offset</p> Signup and view all the answers

    During a 'page out' operation, what is moved from memory?

    <p>A single page from a process is moved to the backing store.</p> Signup and view all the answers

    What problem does a two-level paging algorithm primarily address?

    <p>Excessively large page tables</p> Signup and view all the answers

    What is one key difference in memory management between PCs and mobile systems?

    <p>Mobile systems rarely need to use virtual memory.</p> Signup and view all the answers

    In the context of shared memory, what method may operating systems use to implement this?

    <p>Paging</p> Signup and view all the answers

    What is the reverse of a 'page out' operation known as?

    <p>Page in.</p> Signup and view all the answers

    What memory organization strategy is typically employed to efficiently utilize memory in paging?

    <p>Paged memory organization</p> Signup and view all the answers

    What is the main disadvantage of each process loading its own copy of the standard C library?

    <p>Higher memory requirements</p> Signup and view all the answers

    In a two-level paging scheme, how is a logical address structured?

    <p>Outer and inner page number along with offset</p> Signup and view all the answers

    Why is the operating system responsible for enforcing the read-only nature of shared code?

    <p>To prevent data corruption</p> Signup and view all the answers

    What happens when an address fails the PTLR verification?

    <p>An error trap is triggered</p> Signup and view all the answers

    What characterizes a two-level page table structure?

    <p>It divides the page table into outer and inner tables.</p> Signup and view all the answers

    What is the main limitation of using hierarchical page tables in 64-bit architectures?

    <p>Excessive number of memory accesses required.</p> Signup and view all the answers

    How does a hashed page table manage collisions?

    <p>By using a linked list at each hash index.</p> Signup and view all the answers

    In an inverted page table, what does each entry typically include?

    <p>The virtual address and process identifier.</p> Signup and view all the answers

    What is the advantage of using clustered page tables?

    <p>They will store mappings for multiple physical pages.</p> Signup and view all the answers

    Why might a standard page table consume large amounts of physical memory?

    <p>Because it requires many entries for valid and invalid addresses.</p> Signup and view all the answers

    What role does the address-space identifier serve in inverted page tables?

    <p>To correlate logical and physical addresses.</p> Signup and view all the answers

    What is a primary disadvantage of excessive levels in paging schemes?

    <p>Slower data access and address translation.</p> Signup and view all the answers

    How does a traditional page table differ from an inverted page table?

    <p>An inverted page table maps virtual addresses to physical frames.</p> Signup and view all the answers

    What type of address space is particularly well-suited for utilizing clustered page tables?

    <p>Sparse address spaces.</p> Signup and view all the answers

    Why might a hashed page table be preferred for larger address spaces than 32 bits?

    <p>It provides a scalable map for virtual pages.</p> Signup and view all the answers

    What aspect of the hashed page table process helps in reducing search time for a virtual page number?

    <p>Utilization of a hash function.</p> Signup and view all the answers

    In the context of page tables, what does the term 'collision' refer to?

    <p>Two virtual page numbers hashing to the same index.</p> Signup and view all the answers

    What primary challenge does the four-level paging scheme introduce?

    <p>It increases the difficulty of address translation.</p> Signup and view all the answers

    What is a significant disadvantage of using inverted page tables?

    <p>They may require a whole table search for lookups.</p> Signup and view all the answers

    How does the use of a hash table improve the performance of inverted page tables?

    <p>It limits the search to one or a few page-table entries.</p> Signup and view all the answers

    In a system using inverted page tables, what happens when a second process accesses a shared physical page?

    <p>The mapping for the first process is replaced with the second process’s virtual address.</p> Signup and view all the answers

    What is a characteristic of the approach taken by Solaris running on SPARC regarding virtual memory?

    <p>It employs two separate hash tables for kernel and user processes.</p> Signup and view all the answers

    What is the purpose of the translation storage buffer (TSB) in modern CPUs?

    <p>To hold translation table entries for faster access.</p> Signup and view all the answers

    What is a key benefit of standard swapping in memory management?

    <p>It allows processes to exceed the actual physical memory limits.</p> Signup and view all the answers

    What aspect of memory management does 'swapping with paging' primarily address?

    <p>The inefficiency of moving entire processes.</p> Signup and view all the answers

    During a TLB miss, what is the first step taken by the CPU?

    <p>It searches the TSB for a matching TTE.</p> Signup and view all the answers

    What is the main role of metadata in the context of standard swapping?

    <p>To track the state of processes that are swapped out.</p> Signup and view all the answers

    What happens to an inactive process that has been swapped out if it becomes active again?

    <p>It must be swapped back into memory.</p> Signup and view all the answers

    Why are idle processes considered good candidates for swapping?

    <p>They free up physical memory for active processes.</p> Signup and view all the answers

    How does the architecture of modern CPUs assist in improving translation times for virtual memory?

    <p>By implementing TLBs for immediate lookups.</p> Signup and view all the answers

    What challenge does using multiple levels of page tables present for a 64-bit operating system?

    <p>It increases the overall memory consumption.</p> Signup and view all the answers

    Study Notes

    Main Memory Management

    • CPU scheduling improves CPU utilization and response time, requiring shared memory.
    • Memory management algorithms vary, from basic approaches to paging, each with tradeoffs.
    • Hardware support is crucial for most memory management algorithms.
    • Memory is a large array of bytes, each with a unique address.
    • CPU fetches instructions from memory according to the program counter.
    • Instructions load and store data from specific memory addresses.
    • The memory unit receives only a stream of addresses; it doesn't know their origin or purpose.

    Logical vs. Physical Addresses

    • Logical (or virtual) address: generated by the CPU.
    • Physical address: address seen by memory.
    • The Memory Management Unit (MMU) translates logical to physical addresses at execution time.
    • Relocation register translates logical addresses by adding a base value.
    • User programs interact with logical addresses; the MMU handles physical address conversion.

    Address Binding

    • Addresses are bound to memory at different stages:
      • Compile time: Knowing the memory location at compile time.
      • Load time: Binding relocatable addresses to absolute addresses at load time.
      • Execution time: Binding addresses dynamically, allowing relocation during runtime. This is common in most OS systems.

    Memory Protection

    • Processes have separate memory spaces for protection.
    • Base and limit registers define a process's address range.
    • Hardware compares every generated address to the base and limit registers (checking for valid range).
    • Illegal access to other processes' or OS memory causes a trap to the OS.
    • Only the OS can load base and limit values using privileged instructions.

    Dynamic Loading

    • Routines are loaded only when called.
    • Improves memory utilization, especially for infrequently used code.
    • Users design their programs to use dynamic loading, potentially with OS support.

    Dynamic Linking and Shared Libraries

    • Libraries are linked during runtime.
    • Improves memory efficiency by sharing libraries among multiple processes.
    • Enables easier and faster library updates.
    • Operating systems often provide support for dynamic linking and DLLs.

    Contiguous Memory Allocation

    • Memory is divided into partitions for OS and user processes—typically OS in higher memory.
    • Contiguous allocation places each process in a contiguous block of memory.
    • Memory protection is achieved using relocation and limit registers.
    • The OS loads relocation and limit values during context switches to protect memory.
    • Contiguous allocation supports dynamic resizing of the OS by loading/unloading drivers if needed.

    Memory Allocation Strategies

    • First-fit: Allocates the first available hole large enough.
    • Best-fit: Allocates the smallest available hole large enough.
    • Worst-fit: Allocates the largest available hole (this strategy is generally less efficient).
    • First-fit and best-fit are generally better than Worst-fit.

    Fragmentation

    • External fragmentation: Insufficient contiguous memory, despite enough total memory, due to scattered free blocks.
    • Internal fragmentation: Unused memory inside a block due to allocating in fixed-sized units.
    • Compaction shuffles memory contents for a contiguous block of free memory. This is only possible in systems with dynamic relocation.

    Paging

    • Breaks physical memory into fixed-sized frames.
    • Breaks logical memory into the same-sized pages.
    • Pages are loaded into available frames.
    • Logical addresses are divided into a page number and an offset (displacement).
    • The page table maps page numbers to frame numbers in physical memory.
    • The MMU translates logical addresses into physical addresses using the page table.
    • Page size is typically a power of 2 (e.g., 4 KB).

    Hardware Support for Paging

    • Page tables are per-process and stored with the process control block.
    • The page table base register (PTBR) points to the page table in memory.
    • Translation Look-aside Buffer (TLB): A small, fast cache that holds frequently accessed page table entries. This significantly speeds up memory accesses (reducing overhead).
    • TLB miss: If the TLB does not have the required page number, a memory access is made to the page table.
    • TLB hit - The page number is found in TLB, so physical address is calculated quickly.
    • Hit ratio: The percentage of page lookups completed in the TLB. A higher hit ratio means lower access time.

    Protection in Paging

    • Protection bits associated with each frame in the page table
    • Ensure write accesses do not occur to read-only memory pages.
    • Valid–invalid bit indicates if a page is valid (in the address space) or invalid (illegal reference).

    Shared Pages

    • Reentrant code can be shared among multiple processes.
    • Sharing common code (e.g., standard libraries) reduces memory usage.
    • Only one copy of shared code exists in memory.

    Page Table Structures

    • Hierarchical paging: Divides the page table into smaller, nested tables.
    • Hashed page tables: Uses a hash function to map virtual page numbers to page table entries, reducing the search time when a memory reference occurs. This avoids the large page table problem in cases with vast address spaces.
    • Inverted page tables: One entry per physical page frame, storing virtual addresses and process IDs mapped to that frame (efficient usage of physical memory). This is often combined with hashing to improve search times.

    Swapping

    • Swapping moves entire processes (or pages) between main memory and backing storage. This scheme increases multiprogramming.
    • Backing store must provide fast, direct memory access.
    • Swapping with paging pages out (moving to disk) and pages in (restoring from disk).

    Swapping in Mobile Systems

    • Mobile systems may not use swapping extensively due to limitations in flash memory and write tolerance.
    • iOS and Android strategies for memory management involve asking applications to free up memory or terminating processes if necessary.

    Summary:

    • Multiple memory management strategies exist.

    • Hardware support for translation (MMU, TLB) is crucial.

    • Choice of algorithm depends on hardware and system needs.

    • Paging is a common strategy to improve memory utilization via non-contiguous memory use.

    • Fragmentation problems can occur.

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    Description

    This quiz tests your knowledge of key memory management algorithms and their functions within operating systems. You will explore concepts such as external fragmentation, internal fragmentation, and the role of the memory management unit (MMU). Additionally, you'll examine memory allocation strategies and the importance of the translation look-aside buffer (TLB).

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