Memory Arrays: DRAM, SRAM, and ROM

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Questions and Answers

What are the three common types of memory arrays?

Dynamic random access memory (DRAM), Static random access memory (SRAM), Read only memory (ROM)

In a memory array, what does the term 'depth' refer to?

The number of rows, which is also the number of words, in the memory array.

In the context of memory arrays, how is the array size determined?

Array size is calculated by multiplying the depth by the width: depth * width = 2^N * M.

Explain how a wordline operates in a memory array.

<p>A wordline acts like an enable, allowing a single row in the memory array to be read from or written to. Only one wordline is HIGH at any given time, corresponding to a unique address.</p> Signup and view all the answers

What is the key difference between volatile and non-volatile memory?

<p>Volatile memory loses its data when power is turned off, while non-volatile memory retains data even without power.</p> Signup and view all the answers

Explain why DRAM needs to be periodically refreshed.

<p>DRAM uses a capacitor to store data, which is subject to charge leakage. This leakage degrades the stored value over time, necessitating periodic rewrites to maintain data integrity.</p> Signup and view all the answers

Describe the main components and data storage mechanism in DRAM.

<p>DRAM stores data bits on a capacitor. Because charge leaks from the capacitor degrading the value, the value needs to be refreshed (rewritten) periodically and after being read.</p> Signup and view all the answers

How does a ROM store a bit, according to the dot notation?

<p>In ROM with dot notation, a bit is stored as the presence or absence of a transistor. If a transistor is present (indicated by a dot), it pulls the bitline LOW; if absent, the bitline remains HIGH.</p> Signup and view all the answers

Explain the concept of a 'lookup table' (LUT) in the context of memory arrays.

<p>A lookup table uses a memory array to perform logic by looking up the output at each input combination (address). This table is essentially a reflection of the logic's truth table.</p> Signup and view all the answers

What is a multi-ported memory, and what are its key characteristics?

<p>A multi-ported memory has multiple ports, each providing independent read and/or write access to the memory. A 3-ported memory, for example, might have two read ports and one write port, allowing simultaneous operations.</p> Signup and view all the answers

What is the purpose of the bitline in a memory array bit cell during a read operation?

<p>During a read, the bitline is initially left floating (Z). Once the wordline turns on, the stored value drives the bitline to either 0 or 1, indicating the value of the bit cell.</p> Signup and view all the answers

Describe the process of writing to a memory array bit cell.

<p>To write, the bitline is driven to the desired value (0 or 1). Then, the wordline turns ON, and the bitline overpowers the contents of the bitcell to set its value.</p> Signup and view all the answers

What does it mean when a bitline is described as being 'floating'?

<p>A 'floating' bitline means it is not connected to either Vdd (high voltage) or ground, and its potential is undefined until a memory cell drives the line during a read operation.</p> Signup and view all the answers

Explain the difference in data retention between RAM and ROM.

<p>RAM (Random Access Memory) is <em>volatile</em>, meaning it loses its stored data when the power supply is cut off. ROM (Read-Only Memory) is <em>non-volatile</em> and retains its stored data even without power.</p> Signup and view all the answers

Describe the function of a decoder in the context of memory arrays.

<p>A decoder converts a binary address into a unique signal on a single wordline. This ensures that only one row in the memory array is activated for reading or writing at any given time.</p> Signup and view all the answers

Describe the key differences between DRAM and SRAM in terms of data storage and retention.

<p>DRAM stores data as a charge on a capacitor, requiring periodic refreshing to combat charge leakage, making it dynamic. SRAM uses cross-coupled inverters, which maintain data as long as power is supplied, making it static without needing refresh.</p> Signup and view all the answers

What are the advantages and disadvantages of using ROM?

<p>ROM advantage is being non-volatile: it retains information without needing power, the disadvantage being that writing to it may be impossible or very slow. Flash memory is an example of a type of ROM.</p> Signup and view all the answers

A memory array has 2^N rows and M columns. If N represents the address bits and M the data bits, write a sentence describing what the columns represent.

<p>The columns represent the word size, also referred to as the bit-width. It represents the size of each word that can be read from or written to any addressable memory location in the memory array.</p> Signup and view all the answers

Consider a 2^2 x 3-bit array. Explain what storing the 3-bit word '100' at address '10' means in the context of the memory array.

<p>It means that when the address '10' is input to the array, the 3-bit data output will be '100'. Each bit of this output is stored in its respective bit cell within the array.</p> Signup and view all the answers

Explain the impact of charge leakage in the context of DRAM.

<p>Charge leakage degrades the stored value over time, if unchecked, the data will be lost. The value needs to be rewritten perioidically to maintain value.</p> Signup and view all the answers

Describe a situation in which a multi-ported memory would be particularly useful compared to a single-ported memory.

<p>Multi-ported memory would be appropriate for applications requiring high-speed, concurrent access to data. A suitable example is a system needing to perform read and write operations without conflicts.</p> Signup and view all the answers

How does SRAM's use of cross-coupled inverters contribute to its data retention?

<p>Cross-coupled inverters continuously reinforce each other's state. This design creates a stable storage mechanism that maintains the data as long as power is available, removing the need for constant refreshing.</p> Signup and view all the answers

In designing a memory system, which type of RAM (DRAM or SRAM) would one choose if density and cost were critical requirements? Explain the reasoning.

<p>DRAM. Its construction, storing each bit with only a capacitor and a transistor, allows for simple denser designs that lower cost by decreasing chip sizes.</p> Signup and view all the answers

Explain how multi-ported memories facilitate more complex operations compared to single-ported memories.

<p>Multi-ported memories allow concurrent operations, which is particularly useful in real-time applications, such as video, or applications where processing occurs in parallel.</p> Signup and view all the answers

Describe the typical use cases or applications where ROM is preferred over RAM.

<p>ROM is often preferred for storing firmware, boot code, or other data required immediately upon system startup, as it maintains memory when a system is turned off.</p> Signup and view all the answers

What is the major trade-off when selecting SRAM over DRAM for a cache memory system?

<p>SRAM offers increased operating speed, but the reduced space as SRAM is more bulky and expensive, and therefore the system will have less memory.</p> Signup and view all the answers

If a memory array is described as '1024-word x 32-bit', what does this specification mean in terms of addressable memory locations and the size of each stored data element?

<p>This means the memory array has 1024 unique addressable locations or 'words', and each location can store a 32-bit data element.</p> Signup and view all the answers

Explain the operation of reading data from a DRAM cell. What potentially destructive action occurs during this process, and how is it mitigated?

<p>Reading from a DRAM cell involves activating the wordline, which connects the capacitor to the bitline. This process is destructive because it discharges the capacitor, erasing the stored data. Mitigation occurs by rewriting the original data back into the cell immediately after it is read, a process known as refreshing.</p> Signup and view all the answers

When using a memory array as a lookup table (LUT) to implement a logic function, how are the inputs and outputs of the logic function mapped onto the LUT structure?

<p>The inputs act as addresses, and the data stored at each address is used as an ouput. Setting input combinations will trigger the decoder.</p> Signup and view all the answers

Describe why ROM is suitable for storing a system's BIOS, while RAM is used for the operating system.

<p>ROM is suitable for the BIOS because it is non-volatile: it needs to retain the instructions and startup operations even when the system is powered off. RAM is used for the OS because the OS will change as a user loads various software.</p> Signup and view all the answers

In a ROM where a dot signifies a transistor's presence at a memory location, what are the electrical states of the bitline if a transistor is absent, assuming the bitline is initially set to a weak HIGH?

<p>The bitline stays HIGH. The transistor would short it to ground.</p> Signup and view all the answers

Describe how a 2:4 decoder integrated within a memory array helps manage memory access.

<p>A 2:4 decoder converts a 2-bit binary address into four unique output lines, each corresponding to a distinct row (wordline) in the memory array. Only one wordline is activated for reading or writing at any given time.</p> Signup and view all the answers

What are register files, and why are they often implemented using small multi-ported memories?

<p>Register files consist of a collection of registers in a CPU that serve as temporary storage for data and addresses during the processing. Used for quickly holding a large amount of information.</p> Signup and view all the answers

If a memory array is used to implement the logic functions X = AB, Y = A + B, and Z = A XOR B, how are the truth table values for each function typically stored?

<p>The truth table values will be stroed at each location according to address. For example, for X=AB, the truth table says that if A and B are 1 and 1, X is 1. The truth table values of A and B are used to select the correct location.</p> Signup and view all the answers

Explain, with examples, the relationship between address bits (N) and the number of addressable memory locations in an address space.

<p>Address bits represent the number of bits used to specify a location in memory. Specifically, $2^N$ equals the number of unique memory adresses. For example, 10 address bits (N = 10) provide $2^{10}$ = 1024 unique addresses, that could be thought of as 1024 memory locations.</p> Signup and view all the answers

Flashcards

Memory Arrays

Memory that efficiently store large amounts of data.

DRAM

Dynamic Random Access Memory. Needs to be refreshed to retain data.

SRAM

Static Random Access Memory. Retains data as long as power is supplied.

Read Only Memory (ROM)

Retains data even when power is off.

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Volatile Memory

RAM loses its data when power is turned off.

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Nonvolatile Memory

ROM retains data even when power is turned off.

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DRAM Storage

Uses a capacitor to store charge representing a bit.

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SRAM Storage

Uses cross-coupled inverters to store data.

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ROM storage

Stores a bit as the presence or absence of a transistor.

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Wordline

A selection line that enables a row in memory for reading or writing.

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Bitline

A data line used to read or write data from/to memory cells.

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Multi-ported Memory

Memory with multiple independent access ports.

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Lookup table (LUTs)

Memory arrays used implementing logic functions.

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Memory Depth

Number of rows (number of words) in the memory array

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Memory width

Number of columns (size of word) in the memory array.

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Memory Array Size

total number of bits in a memory array, calculated by depth * width.

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Study Notes

5.5 Memory Arrays

  • Memory arrays are used to efficiently store large amounts of data
  • The three common types include Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), and Read Only Memory (ROM)
  • An M-bit data value can be read or written at each unique N-bit address

Memory Arrays Info

  • They consist of a two-dimensional array of bit cells
  • Each bit cell stores one bit
  • With N address bits and M data bits, an array has 2^N rows and M columns
  • Depth: the number of rows or memory location (number of words)
  • Width: number of columns (size of word)
  • Array size: is calculated by depth × width = 2^N × M

Memory Array Example

  • A 2^2 × 3-bit array contains 4 words
  • Each word is 3-bits wide
  • The 3-bit word stored at address 10 is 100

Memory Array Bit Cells

  • Bitline: is related to Data
  • Wordline: is related to address
  • Each rectangle is a bit cell
  • To read a bit cell, the bitline is initially left floating. Then the wordline is turned on, letting the stored value drive the bitline to 0 or 1
  • To write a bit cell, the bitline drives strongly to the desired value. Then the wordline turns on, and the bitline overpowers the contents of the bitcell

Memory Array: Wordline

  • Wordline acts like an enable
  • A single row in the memory array can be read or written via a wordline
  • Corresponds to a unique address
  • Only one wordline is HIGH at any given time

Memory Ports

  • Memories have one or more ports, each giving read and/or write access to one memory address
  • Multiported memories access several addresses simultaneously
  • A three-ported memory includes two read ports and one write port
    • Port 1 reads data A1 to read data output RD1
    • Port 2 reads data A2 onto RD2
    • Port 3 writes the data input WD3 into address A3 on the rising edge of clock if write enable WE3 is asserted

Types of Memory

  • Random Access Memory (RAM): volatile
  • Read Only Memory (ROM): nonvolatile

RAM: Random Access Memory

  • RAM is volatile, losing its data when power is turned off
  • Data can be read and written quickly
  • The main memory in computers is RAM, specifically DRAM

ROM: Read Only Memory

  • ROM is nonvolatile, retaining data with no power
  • Data can be read quickly, but writing is impossible or slow
  • Flash memory in cameras, thumb drives, and digital cameras are ROM

Types of RAM

  • There are two main types of RAM: DRAM and SRAM
  • They differ in how data is stored: DRAM uses a capacitor, while SRAM uses cross-coupled inverters

5.5.2 DRAM

  • Data bits are stored in a capacitor
  • Is called dynamic because the values need to be refreshed (rewritten) periodically and after being read
  • Charge leakage from the capacitor degrades the value
  • The operation of reading destroys the stored value
  • The logic node at the capacitor will not connect to Vdd or ground, so the logic value is floating

5.5.3 SRAM

  • Words are stored in cross-coupled inverters

ROMs

  • ROM stores a bit as the presence or absence of a transistor
  • To read ROM, the bitline is initially set to be weak HIGH
  • If the transistor is present, it pulls the bitline LOW
  • If the transistor is absent, the bitline remains High
  • A dot notation indicates that the bit is one, e.g., for address 11, the data is 010

5.5.7 Logic with Any Memory Array

  • The addresses are laid in a top down order (Like Dada2: the truth table)
  • Memory arrays used to perform logic is called Lookup table

Logic with Memory Arrays

  • Memory arrays used to perform logic are called lookup tables
  • Lookup tables (LUTs): Look up output at each combination (address). A reflection of logic truth table

Multi-ported Memories

  • Port: address/data pair
  • A 3-ported memory consists of 2 read ports (A1/RD1, A2/RD2) and 1 write port (A3/WD3, with WE3 enabling writing)
  • Small multi-ported memories are register files

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