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Questions and Answers
What are the three common types of memory arrays?
What are the three common types of memory arrays?
Dynamic random access memory (DRAM), Static random access memory (SRAM), Read only memory (ROM)
In a memory array, what does the term 'depth' refer to?
In a memory array, what does the term 'depth' refer to?
The number of rows, which is also the number of words, in the memory array.
In the context of memory arrays, how is the array size determined?
In the context of memory arrays, how is the array size determined?
Array size is calculated by multiplying the depth by the width: depth * width = 2^N * M
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Explain how a wordline operates in a memory array.
Explain how a wordline operates in a memory array.
What is the key difference between volatile and non-volatile memory?
What is the key difference between volatile and non-volatile memory?
Explain why DRAM needs to be periodically refreshed.
Explain why DRAM needs to be periodically refreshed.
Describe the main components and data storage mechanism in DRAM.
Describe the main components and data storage mechanism in DRAM.
How does a ROM store a bit, according to the dot notation?
How does a ROM store a bit, according to the dot notation?
Explain the concept of a 'lookup table' (LUT) in the context of memory arrays.
Explain the concept of a 'lookup table' (LUT) in the context of memory arrays.
What is a multi-ported memory, and what are its key characteristics?
What is a multi-ported memory, and what are its key characteristics?
What is the purpose of the bitline in a memory array bit cell during a read operation?
What is the purpose of the bitline in a memory array bit cell during a read operation?
Describe the process of writing to a memory array bit cell.
Describe the process of writing to a memory array bit cell.
What does it mean when a bitline is described as being 'floating'?
What does it mean when a bitline is described as being 'floating'?
Explain the difference in data retention between RAM and ROM.
Explain the difference in data retention between RAM and ROM.
Describe the function of a decoder in the context of memory arrays.
Describe the function of a decoder in the context of memory arrays.
Describe the key differences between DRAM and SRAM in terms of data storage and retention.
Describe the key differences between DRAM and SRAM in terms of data storage and retention.
What are the advantages and disadvantages of using ROM?
What are the advantages and disadvantages of using ROM?
A memory array has 2^N rows and M columns. If N represents the address bits and M the data bits, write a sentence describing what the columns represent.
A memory array has 2^N rows and M columns. If N represents the address bits and M the data bits, write a sentence describing what the columns represent.
Consider a 2^2 x 3-bit array. Explain what storing the 3-bit word '100' at address '10' means in the context of the memory array.
Consider a 2^2 x 3-bit array. Explain what storing the 3-bit word '100' at address '10' means in the context of the memory array.
Explain the impact of charge leakage in the context of DRAM.
Explain the impact of charge leakage in the context of DRAM.
Describe a situation in which a multi-ported memory would be particularly useful compared to a single-ported memory.
Describe a situation in which a multi-ported memory would be particularly useful compared to a single-ported memory.
How does SRAM's use of cross-coupled inverters contribute to its data retention?
How does SRAM's use of cross-coupled inverters contribute to its data retention?
In designing a memory system, which type of RAM (DRAM or SRAM) would one choose if density and cost were critical requirements? Explain the reasoning.
In designing a memory system, which type of RAM (DRAM or SRAM) would one choose if density and cost were critical requirements? Explain the reasoning.
Explain how multi-ported memories facilitate more complex operations compared to single-ported memories.
Explain how multi-ported memories facilitate more complex operations compared to single-ported memories.
Describe the typical use cases or applications where ROM is preferred over RAM.
Describe the typical use cases or applications where ROM is preferred over RAM.
What is the major trade-off when selecting SRAM over DRAM for a cache memory system?
What is the major trade-off when selecting SRAM over DRAM for a cache memory system?
If a memory array is described as '1024-word x 32-bit', what does this specification mean in terms of addressable memory locations and the size of each stored data element?
If a memory array is described as '1024-word x 32-bit', what does this specification mean in terms of addressable memory locations and the size of each stored data element?
Explain the operation of reading data from a DRAM cell. What potentially destructive action occurs during this process, and how is it mitigated?
Explain the operation of reading data from a DRAM cell. What potentially destructive action occurs during this process, and how is it mitigated?
When using a memory array as a lookup table (LUT) to implement a logic function, how are the inputs and outputs of the logic function mapped onto the LUT structure?
When using a memory array as a lookup table (LUT) to implement a logic function, how are the inputs and outputs of the logic function mapped onto the LUT structure?
Describe why ROM is suitable for storing a system's BIOS, while RAM is used for the operating system.
Describe why ROM is suitable for storing a system's BIOS, while RAM is used for the operating system.
In a ROM where a dot signifies a transistor's presence at a memory location, what are the electrical states of the bitline if a transistor is absent, assuming the bitline is initially set to a weak HIGH?
In a ROM where a dot signifies a transistor's presence at a memory location, what are the electrical states of the bitline if a transistor is absent, assuming the bitline is initially set to a weak HIGH?
Describe how a 2:4 decoder integrated within a memory array helps manage memory access.
Describe how a 2:4 decoder integrated within a memory array helps manage memory access.
What are register files, and why are they often implemented using small multi-ported memories?
What are register files, and why are they often implemented using small multi-ported memories?
If a memory array is used to implement the logic functions X = AB, Y = A + B, and Z = A XOR B, how are the truth table values for each function typically stored?
If a memory array is used to implement the logic functions X = AB, Y = A + B, and Z = A XOR B, how are the truth table values for each function typically stored?
Explain, with examples, the relationship between address bits (N) and the number of addressable memory locations in an address space.
Explain, with examples, the relationship between address bits (N) and the number of addressable memory locations in an address space.
Flashcards
Memory Arrays
Memory Arrays
Memory that efficiently store large amounts of data.
DRAM
DRAM
Dynamic Random Access Memory. Needs to be refreshed to retain data.
SRAM
SRAM
Static Random Access Memory. Retains data as long as power is supplied.
Read Only Memory (ROM)
Read Only Memory (ROM)
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Volatile Memory
Volatile Memory
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Nonvolatile Memory
Nonvolatile Memory
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DRAM Storage
DRAM Storage
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SRAM Storage
SRAM Storage
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ROM storage
ROM storage
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Wordline
Wordline
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Bitline
Bitline
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Multi-ported Memory
Multi-ported Memory
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Lookup table (LUTs)
Lookup table (LUTs)
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Memory Depth
Memory Depth
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Memory width
Memory width
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Memory Array Size
Memory Array Size
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Study Notes
5.5 Memory Arrays
- Memory arrays are used to efficiently store large amounts of data
- The three common types include Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), and Read Only Memory (ROM)
- An M-bit data value can be read or written at each unique N-bit address
Memory Arrays Info
- They consist of a two-dimensional array of bit cells
- Each bit cell stores one bit
- With N address bits and M data bits, an array has 2^N rows and M columns
- Depth: the number of rows or memory location (number of words)
- Width: number of columns (size of word)
- Array size: is calculated by depth × width = 2^N × M
Memory Array Example
- A 2^2 × 3-bit array contains 4 words
- Each word is 3-bits wide
- The 3-bit word stored at address 10 is 100
Memory Array Bit Cells
- Bitline: is related to Data
- Wordline: is related to address
- Each rectangle is a bit cell
- To read a bit cell, the bitline is initially left floating. Then the wordline is turned on, letting the stored value drive the bitline to 0 or 1
- To write a bit cell, the bitline drives strongly to the desired value. Then the wordline turns on, and the bitline overpowers the contents of the bitcell
Memory Array: Wordline
- Wordline acts like an enable
- A single row in the memory array can be read or written via a wordline
- Corresponds to a unique address
- Only one wordline is HIGH at any given time
Memory Ports
- Memories have one or more ports, each giving read and/or write access to one memory address
- Multiported memories access several addresses simultaneously
- A three-ported memory includes two read ports and one write port
- Port 1 reads data A1 to read data output RD1
- Port 2 reads data A2 onto RD2
- Port 3 writes the data input WD3 into address A3 on the rising edge of clock if write enable WE3 is asserted
Types of Memory
- Random Access Memory (RAM): volatile
- Read Only Memory (ROM): nonvolatile
RAM: Random Access Memory
- RAM is volatile, losing its data when power is turned off
- Data can be read and written quickly
- The main memory in computers is RAM, specifically DRAM
ROM: Read Only Memory
- ROM is nonvolatile, retaining data with no power
- Data can be read quickly, but writing is impossible or slow
- Flash memory in cameras, thumb drives, and digital cameras are ROM
Types of RAM
- There are two main types of RAM: DRAM and SRAM
- They differ in how data is stored: DRAM uses a capacitor, while SRAM uses cross-coupled inverters
5.5.2 DRAM
- Data bits are stored in a capacitor
- Is called dynamic because the values need to be refreshed (rewritten) periodically and after being read
- Charge leakage from the capacitor degrades the value
- The operation of reading destroys the stored value
- The logic node at the capacitor will not connect to Vdd or ground, so the logic value is floating
5.5.3 SRAM
- Words are stored in cross-coupled inverters
ROMs
- ROM stores a bit as the presence or absence of a transistor
- To read ROM, the bitline is initially set to be weak HIGH
- If the transistor is present, it pulls the bitline LOW
- If the transistor is absent, the bitline remains High
- A dot notation indicates that the bit is one, e.g., for address 11, the data is 010
5.5.7 Logic with Any Memory Array
- The addresses are laid in a top down order (Like Dada2: the truth table)
- Memory arrays used to perform logic is called Lookup table
Logic with Memory Arrays
- Memory arrays used to perform logic are called lookup tables
- Lookup tables (LUTs): Look up output at each combination (address). A reflection of logic truth table
Multi-ported Memories
- Port: address/data pair
- A 3-ported memory consists of 2 read ports (A1/RD1, A2/RD2) and 1 write port (A3/WD3, with WE3 enabling writing)
- Small multi-ported memories are register files
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