Makefile Basics Quiz

CIS*2750 Lecture 2b: Makefiles

• Make utility executes commands from a description file

• Primarily used to create executables, but can perform other tasks

• Such as removing files, reporting project status, packaging files, installing files, and building libraries

• Make utility is not unique

• Similar to Ant utility for Java

• CMake is considered an improved version of Make

• Make remains a common utility due to its frequent use

Makefiles and the Compiler Toolchain

• Make utility and compiler toolchain are separate and unrelated entities
• Make is often used to automate code building, providing flags to compilers, specifying paths, and specifying library names
• Understanding the compiler toolchain is essential to effectively using makefiles and interpreting example makefiles

Make - the Vanilla Approach

• Multiple ways to achieve similar effects with makefiles
• Good for understanding varied coding approaches to makefiles
• Learn and understand the features programmers use
• Avoid treating makefiles as magic incantations
• Adopt a straightforward and simple convention for readability
• Avoid writing code not fully understood, as this usually results in poor quality code

Makefiles

• Examines dependencies between files
• Considers file dates and existence for builds
• Attempts to construct missing files
• Recompiles compiled files if a dependency is newer

Makefile Structure

• Each entry consists of three parts:
  • Target
  • Prerequisites/Dependencies
  • Command line
• Example:

  myprog: myprog.c myprog.h
  gcc myprog.c -o myprog
  

Part 1: Target

• Target is the file a makefile entry aims to create
• Typically a filename
• Can be an executable (e.g., myprog) or a library (e.g., librecord.so)

Part 2: Prerequisites

• Prerequisites are files required for a target's creation
• Example: to build myprog, myprog.c and myprog.h are required
• If a prerequisite is newer than the target, the command line is executed
• Only necessary files are recompiled

Makefiles and Efficiency

• Recompiling only necessary files is crucial for large projects
• Avoids the slow process of recompiling everything

Part 3: Command Line

• Command line is the command executed using dependencies
• Must be prefaced with a tab character, not spaces
• Using tabs is crucial

Invoking Make

• make compiles the first target in the Makefile
• make <target> compiles the specified target

Other Common Targets

• Targets don't need to be files
• Example: clean target removes unnecessary files like object files and core files

Checking the Commands

• Use the -n flag to view commands without execution
• Example: make -n or make someTarget -n

Multiline Command Lines

• Separate command lines using semicolons
• Use backslashes to continue commands onto subsequent lines
• Backslashes should always be the last character on each line

Makefile Macros

• Used to avoid repetitive text in Makefiles
• Simplifies paths, compiler flags, and library lists
• Defined using the equal sign (e.g., LIBS = -L/usr/local/lib -lm -llibname)
• Referenced using $ and brackets (e.g., $(LIBS) or ${LIBS})

Example: Sample Makefile

• Macro names are typically in uppercase
• Example incorporating macros in a Makefile

Undefined Macros

• Undefined macros are replaced with an empty string.

Predefined Macros

• CC is predefined and commonly corresponds to the C compiler

Macro String Substitutions

• Allows substituting strings within macros
• Example using substitution: $(SRCS: .c = .o) translates .c source files to object files

Suffix Rules

• Suffix rules instruct the system on how to compile different file types
• (e.g., .c to executable)

Comments

• Comments begin with a #

Flags Control Options for Tools

• Makefiles allow controlling C toolchain components
• Some Integrated Development Environments (IDEs) handle flag settings differently, often through graphical user interfaces.

Selecting the Compiler in a Makefile

• Choosing default C compilers or using alternative ones
• Example: CC = gcc

Preprocessor Flags

• Modifies how the preprocessor interprets the input
• Example: -Iinclude_file_dir to modify include paths

Compiler Flags

• Modifies compiler behavior (Optimization, debugging,...).
• Example: -g, -On, -Wall -std=c11, -fpic, -C

Linker Flags

• Modifies linker behavior
• Example: -Llibrary_dir, -llibrary, -shared, -o filename

A Note on Code Organization

• Large C codebases often use different directories following conventions
• Headers typically placed in an include directory
• Source files in a src directory

Real-World Example: The Curl Library

• Example demonstrates a real-world Makefile usage in a large software project.

Standards for Our Course

• Course follows standard makefile conventions
• Code, headers, and the Makefile itself follow file structure conventions, and the file structure for examples are standardized