IT 110 Lecture Notes: Systems and Counting

IT 110 Lecture Notes

• Lecture 1: Introduction and Components

  • A system is a collection of components linked together to be recognized as a single unit.
  • Architecture describes the fundamental properties and relationships among components and the system's environment.
  • Information systems (IS) are made up of hardware, software, data, people, and networks. Each component can itself be a system within its own architecture.
  • Hardware abstraction in programming languages involves input/output, arithmetic, logic, assignment, selection, conditional branching, looping, and unconditional branching.

• Lecture 2: Counting Systems

  • Base 10: Uses ten digits (0-9) and powers of ten for positional notation in numbers.
  • Base 2: Uses two digits (0-1) and powers of two for positional notation.
  • Leading zeros are insignificant but can indicate the number of bits.
  • Conversion between base 10 and base 2 uses repeated division with remainders or repeated multiplication and addition.

• Lecture 3: Signed Integer Representations

  • Signed Magnitude: The most significant bit indicates the sign (0 for positive, 1 for negative). The remaining bits represent the magnitude.
  • 1's Complement: To find the 1's complement of a number, flip all the bits.
  • 2's Complement: To find the 2's complement of a number, find the 1's complement and then add 1. Note: The most significant bit (MSB) represents the sign.

• Lecture 4: Little Man Computer and Instruction Cycle

  • The Little Man Computer (LMC) is a simplified model of a computer.
  • Mnemonic codes (e.g., LDA, STO, ADD, SUB, IN, OUT, HLT, BRP, BRZ, BR, DAT) represent instructions in the LMC.
  • Each instruction has a specific code and description related to the LMC functionality.

• Lecture 5: Assembly Language

  • Programming languages are categorized into generations based on their level of abstraction.
  • First-generation is binary, using wires or switches
  • Second-generation is assembly language, which is readable by humans and translated to machine-executable code.
  • Third and fourth generations involve higher-level abstractions (e.g. natural languages).
  • Regardless of language, computers only process machine code. Translation steps occur to convert any non-machine code to machine code (e.g. compilers, assemblers).

• Lecture 6: Fetch/Execute Cycle

  • The fetch/execute cycle describes how instructions are executed by a CPU.
  • Control signals manage the order of operations, register loading, etc.
  • Components involved in the cycle include the PC (program counter), IR (instruction register), MAR (memory address register), MDR (memory data register), ALU (arithmetic logic unit).

• Lecture 7: Instruction Set Architectures

  • Instruction Set Architectures (ISA) control the format of and determine the assembly language of instructions and have varying operand counts from 0 to 3. (e.g., 0-address, 1-address, 2-address, and 3-address machines)
  • Machine code implementations vary due in part to the number of explicit operands in the instructions (i.e. parameters in the instructions.)
  • Stack-based machines require no explicit address operands in their instructions.

• Lecture 8: RISC vs. CISC

  • Complex Instruction Set Computers (CISC)
    • Include many complex instructions, maximizing code density in memory.
    • Compiler design is simplified, but instructions are typically multi-clock cycle and include many operations per instruction.
  • Reduced Instruction Set Computers (RISC)
    • Use a small set of simple instructions, that execute within one clock cycle
    • Compiler work is increased, but CPU clock cycle complexity is decreased.

• Lecture 9: CPU Performance Enhancements

  • General enhancements, such as using fixed-length instructions and more general-purpose registers can be used to improve CPU performance.
  • Instructions are fetched, decoded and then executed through various stages, allowing multiple instructions to be handled simultaneously.

• Lecture 10: Memory Performance Enhancements

  • Approaches to enhance memory performance include wide path memory access, memory interleaving, and cache memory.
  • Wide path memory access widens the data path to increase the amount of data exchanged at one time..
  • Memory interleaving breaks the memory into independent blocks to process requests simultaneously.
  • Cache memory stores frequently accessed data to minimize latency.

• Lecture 11: Programmed I/O, Interrupts, and DMA

  • Programmed I/O (PIO), interrupts, and DMA (Direct Memory Access) handle input/output operations.
  • PIO involves CPU handling input/output operations.
  • Interrupts let devices notify the CPU when data is ready to be processed.
  • DMA lets devices transfer data directly to memory without CPU involvement.

• Lecture 12: Storage Hierarchy and Disk Technology

  • Computer storage is organized hierarchically by speed.
  • The hierarchy ranges from CPU registers, cache, RAM, and various forms of secondary storage (flash, magnetic hard drive, optical disks).
  • Understanding terminology related to magnetic disk technology (e.g., platter, track, sector, seek time, latency) is crucial.

• Lecture 13: Data Communication Concepts

  • Networks encompass protocols (rules), messages, media (transport mechanisms), and devices.
  • The OSI and TCP/IP models represent layered architectures for network communication.
  • Protocol data units are encapsulated or de-capsulated as data moves into or out of layers.
  • Network topologies include bus, ring, star, extended star, hierarchical, and mesh structures.

Explore the foundational concepts of information systems and counting systems in IT 110. Understand the architecture of components and the transition between various numeral bases. This quiz covers key principles that are essential for your IT studies.