Introduction to Embedded Systems

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Questions and Answers

Which of the following best describes an embedded system?

  • A high-performance server used for data processing and storage.
  • A system designed to perform one or a few dedicated functions, often within an electronic device. (correct)
  • A network of interconnected computers communicating over the Internet.
  • A general-purpose computer designed for a variety of tasks.

Field Programmable Gate Arrays (FPGAs) are slower than microprocessor-based systems due to their technology dependence and the need for software updates.

False (B)

What are the key differences between a microprocessor and a microcontroller?

  • A microcontroller is a microprocessor integrated with memory, I/O, and other necessary functionalities on a single chip. (correct)
  • Microprocessors are used in embedded systems, while microcontrollers are used in general-purpose computers.
  • There is no significant difference; the terms are interchangeable.
  • A microprocessor includes memory and I/O, while a microcontroller only performs instructions.

What is the primary characteristic of Random Access Memory (RAM) regarding access time?

<p>Access time is the same for any location on the chip. (B)</p> Signup and view all the answers

Dynamic Random Access Memory (DRAM) does not require periodic refresh to maintain its contents.

<p>False (B)</p> Signup and view all the answers

In the context of memory organization, what is the key feature of Synchronous DRAM (SDRAM)?

<p>It has a synchronous interface, meaning a clock signal must be received before it responds to control inputs. (D)</p> Signup and view all the answers

What is the primary difference between Erasable Programmable ROM (EPROM) and Electrically Erasable Programmable ROM (EEPROM)?

<p>EPROM is erased using ultraviolet light, while EEPROM is electrically erasable. (C)</p> Signup and view all the answers

While many microcontroller vendors use the same processor as their CPU, the memory system, memory map, peripherals, and operation characteristics are identical across different products.

<p>False (B)</p> Signup and view all the answers

What does the term 'isolated I/O' refer to in the context of address space usage?

<p>One space is used by normal memory access and another space is reserved for I/O peripheral registers. (D)</p> Signup and view all the answers

In memory management, how does the Little Endian format store data?

<p>The LSB is stored in the lowest address of the memory with the MSB stored in the highest address. (C)</p> Signup and view all the answers

In a Von Neumann architecture, data and program instructions must reside in separate memory spaces.

<p>False (B)</p> Signup and view all the answers

What is the key advantage of Harvard architecture over Von Neumann architecture?

<p>Simultaneous access to instructions and data, improving performance. (C)</p> Signup and view all the answers

Which statement accurately describes registers in a processor?

<p>Registers are small, fast storage areas used for immediate data manipulation. (D)</p> Signup and view all the answers

What is the primary role of the Instruction Set Architecture (ISA)?

<p>Providing an interface between the programmer and the hardware, enabling communication. (C)</p> Signup and view all the answers

In the context of instruction set architectures, what is the main goal of the Complex Instruction Set Computer (CISC) approach?

<p>To minimize the number of instructions per program. (A)</p> Signup and view all the answers

Reduced Instruction Set Computing(RISC) architectures typically feature more straightforward instruction sets, thus needing fewer instructions to perform comparable tasks relative to CISC.

<p>False (B)</p> Signup and view all the answers

What does address space refer to in a computing context?

<p>The range of memory locations that a processor can access. (C)</p> Signup and view all the answers

What is a key feature of ARM's Thumb-2 technology?

<p>It allows intermixing 16-bit and 32-bit instructions for high code density. (C)</p> Signup and view all the answers

What is the Execution Program Status Register (EPSR) primarily used for?

<p>Providing status information about the execution state, such as Thumb mode and If-Then block execution. (D)</p> Signup and view all the answers

In ARM architecture, what is the purpose of the CONTROL register?

<p>To control the stack used and the privilege level for software execution, as well as indicate FPU (floating point unit)estate. (D)</p> Signup and view all the answers

Which addressing mode involves the data itself being contained within the instruction, requiring no additional memory access cycles?

<p>Immediate addressing mode (C)</p> Signup and view all the answers

What is the address used by the instruction, ADR R5, label?

<p>PC + $offset (C)</p> Signup and view all the answers

Explain the key difference between memory-mapped I/O and isolated I/O.

<p>memory-mapped utilizes a single memory address space for both I/O and memory, whereas isolated I/O reserves separate address spaces for each</p> Signup and view all the answers

What is the fundamental difference in instruction order related to byte order between standard ARM instructions and Thumb 2 instructions?

<p>Standard are are organized in one byte order, Thumb 2 instructions are organized differently</p> Signup and view all the answers

In terms of load and Store instructions which is typically needed given that ARM is a load/store architecture, what instruction set format is used for their descriptions?

<p>Rd, [Rn]</p> Signup and view all the answers

In assembly language, a mnemonic is used as a representation of a ______ instruction.

<p>machine</p> Signup and view all the answers

The ______ register controls the stack used and the privilege level for software execution when the processor is in Thread mode.

<p>CONTROL</p> Signup and view all the answers

Match each memory type with its correct description:

<p>RAM = Requires the same amount of time to access data independently of its location ROM = Can only be read and cannot be overwritten DRAM = Requires period refresh to maintain memory content SRAM = Data is predictable, and faster than DRAM</p> Signup and view all the answers

Match the ARM status registers with their proper usage description:

<p>APSR = Contains condition flags from instruction executions IPSR = Contains the exception type number of the current interrupt routine CPSR = Composed of the three status registers (APSR, EPSR, and IPSR)</p> Signup and view all the answers

The .W suffix is used to indicate what bit instructions are to be used for in embedded systems. The .N suffix is not used.

<p>False (B)</p> Signup and view all the answers

In the Cortex-M4 processor, data processing operations are performed directly on memory contents, not just on registers.

<p>False (B)</p> Signup and view all the answers

In ARM assembly, what is a primary characteristic about if a constant is to be used in an operation within a 32-bit work?

<p>The constant must correspond to an 8-bit pattern rotated by an even number of bits within a 32 bit world</p> Signup and view all the answers

In an ARM instruction, what is the symbol used and the syntax needed to include comments?

<p>The semi-colon is used, any information after the semi-colon is ignored by the assembler</p> Signup and view all the answers

In ARM, what is function of the ALIGN directive?

<p>The directive instructs the Assembler to address data or instructions. (C)</p> Signup and view all the answers

In a ARM instruction like SUBS R1, #1, what is this command and what is its functionality?

<p>A decrement. Subtracts one, and if the results are not zero continue checking, and decrement counter (B)</p> Signup and view all the answers

Flashcards

Embedded System

A special purpose system that performs one or a few dedicated functions, embedded inside an electronic device.

Arithmetic Logic Unit (ALU)

A circuitry capable of doing various operations such as ADD, SHIFT, AND, OR on on-chip registers.

Control Unit

Directs the operation of the processor and tells the memory, arithmetic/logic unit, and input/output devices how to respond to a program's instructions.

Registers

A small amount of storage available as part of a microprocessor for temporary data.

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System Bus

Connects the major components of a computer system, carrying information, addresses, and control signals.

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Microcontroller

A full computer system on a chip, designed for standalone applications with limited resources.

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Microprocessor

A component that performs the instructions and tasks involved in computer processing.

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Little Endian

Where the least significant byte (LSB) is stored in the lowest address of the memory.

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Big Endian

Where the least significant byte (LSB) is stored in the highest address of the memory.

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Von Neumann architecture

Memory architecture where data and program can reside in the same memory, using a single memory interface bus.

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Harvard architecture

Memory architecture with separate instruction bus and data bus, allowing simultaneous access.

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Instruction Set Architecture (ISA)

An interface to allow easy communication between the programmer and the hardware.

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Complex Instruction Set Architecture (CISC)

Attempts to minimize the number of instructions per program, sacrificing the number of cycles per instruction.

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Registers

fundamental storage area in the processor, provides very fast access to the processor, and operates at the same frequency as the processor clock.

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Reduced Instruction Set Architecture (RISC)

Reducing the cycles per instruction at the cost of the number of instructions per program.

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ARM architecture

Used to desgin to semiconductor partners who fabricate and sell to their customers.

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ARM processor

CPUs based on the RISC (reduced instruction set computer) architecture developed by Advanced RISC Machines (ARM)

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Signed

Indicates that data values are interpreted as two's complement and thus can represent negative numbers as well as positive numbers

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unsigned

Indicates that data values are interpreted as strictly positive numbers. The value must be positive (or zero)

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Addressing mode

The format the instruction uses to specify the memory location to read or write data. includes: immediate, direct, indirect or indexed or relative.

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Immediate addressing mode

The data itself is contained in the instruction, no memory access cycles are needed to get the data

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Indexed addressing mode

The data is in memory and a register will contain a pointer to the data. One or more additional memory access cycles are required to read or write the data.

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PC-relative addressing mode

Indexed addressing using PC as the pointer, and is the PC value plus or minus a numeric offset.

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LDR Rd,=val

Pseudo-operation that gets assembled into either a MOV Rd,#val, or a constant in ROM with LDR Rd,[pc,#offs].

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Cortex-M4 memory

divided into 8x512MB segments

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Directive

a program statement that is not directly translated into machine code, but provides instructions or directives to the assembler.

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AREA directive

Indicates the assembler the start of a new data or code section

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ENTRY directive

marks the first instruction to be executed within an application program

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END directive

indicates the end of a source file. Any lines of information after this are ignored by the assembler

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PROC and ENDP

are to mark the start and end of a function (also called subroutine or procedure)

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EXPORT

declares a symbol and makes this symbol visible to the linker

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IMPORT

gives the assembler a symbol that is not defined locally in the current assembly file but which must be defined in another file to be used by the linker

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Thumb-2

is a major enhancement to the Thumb Instruction Set Architecture (ISA). It introduces 32-bit instructions that can be intermixed freely with the older 16-bit Thumb instructions.

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Thumb-2 Instruction Set Architecture (ISA)

delivers overall code density comparable with Thumb, together with the performance levels associated with the ARM ISA

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Thumb2 instructions are either 16-bit or 32-bit?

Thumb2 instructions are either 16-bit or 32-bit. Bits[15:11] of the halfword determine the length.

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Thumb Instruction Set

Most instructions are 16 bits long, some are 32 bits. Most 16-bit instructions can only access low registers (R0-R7), but some can access high registers (R8-R15).

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APSR register (Application Program Status Register):

Used to the processor status registers, including negative flag (N), zero flag (Z), carry or borrow flag (C)

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Data Instruction

Data must begin on 2, 4, or 8 byte boundaries.

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Load/store Architecture

ARM is a load/store architecture, so must process data in registers, not memory

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Study Notes

Course Objectives

  • Understand the operation of microprocessors and microcontrollers
  • Learn machine language programming and microprocessor interfacing techniques
  • Design and interface microcontroller-based embedded systems in both hardware and software
  • Master basic programming of ARM Cortex chips using assembly language
  • Learn the fundamentals of embedded system design
  • Ultimate goal: Apply this knowledge to more advanced structures.

Embedded Systems

  • Special-purpose systems perform dedicated functions
  • Computer systems embedded inside electronic devices, but not general-purpose computers
  • Characteristics include being dedicated to specific functions, interacting with the environment, and having real-time requirements
  • Application examples: microwave oven front panels, Canon EOS 3 camera, digital TV, a smartphone, vehicle control, nuclear power plant control
  • Implemented using microcontrollers or digital circuits
  • Microcontrollers (or microprocessor-based systems): Slower but software can be updated
  • Digital circuits or Field Programmable Gate Arrays (FPGAs): Faster but function changes are difficult

Microcontrollers

  • A full computer system on a chip, although resources are limited
  • Designed for standalone applications
  • Basic components: CPU, temporary memory (registers, cache), main and secondary memory, input/output modules

Microprocessors

  • A component performing instructions and tasks for computer processing
  • When integrated with memory, I/O, and other functionalities, becomes a microcontroller
  • Can be single-core or multi-core
  • Multi-core processors have two or more independent cores or processing units
  • Arithmetic Logic Unit (ALU): Circuitry capable of performing operations like ADD, SHIFT, AND, OR on on-chip registers
  • Control Unit: Directs processor operations and instructs memory, ALU, and I/O devices
  • Registers: Small storage within a microprocessor
  • System Bus: Connects major computer components, carrying information, addresses, and control signals

I/O Ports

  • External devices connected to the microcontroller give functionality to the system
  • An input port is hardware on a microcontroller that allows information about the external world to be entered into the computer
  • An output port is hardware on the microcontroller to send information out
  • Interface Includes I/O ports, external electronics, physical devices, and software
  • Classifications of I/O interfaces:
  • Parallel: Binary data available at once
  • Serial: Binary data sent one bit at a time
  • Analog: Data encoded as voltage, current, or power
  • Time: Data encoded as period, frequency, pulse width, or phase shift
  • I/O ports available on the Tiva C series board: UART, SSI, I2C, Timer, PWM, ADC, Analog comparator, QEI, USB, Ethernet, CAN

Memory

  • Random Access Memory (RAM): Equal access time for any location.
  • Read/write capable
  • Read-Only Memory (ROM): Can only be read.
  • Cannot be directly written to by the processor
  • Dynamic Random Access Memory (DRAM): Requires periodic refresh to maintain contents
  • Static Random Access Memory (SRAM): No periodic refresh
  • Predictable and faster than DRAM
  • Synchronous DRAM (SDRAM): Synchronous interface requires a clock signal
  • Divided into banks for concurrent operations, improving concurrency and data transfer
  • Mask-Programmed ROM (MROM): Programmed during manufacturing
  • Programmable ROM (PROM): Programmed by the end user
  • Erasable Programmable ROM (EPROM): Electrically programmable and erasable using ultraviolet light
  • Electrically Erasable Programmable ROM (EEPROM): Electrically programmable and erasable at the location level
  • Flash Memory: Electrically programmable and erasable only in bulk blocks
  • The Tiva C Series TM4C123G microcontroller has 256KB of flash memory, 32KB of RAM, and 2KB of EEPROM

Developing Embedded Applications

  • Embedded system development requires synchronized hardware and software development
  • Factors in Microcontroller Selection
  • Peripherals and interface features, such as the number of I/O ports and types of serial communication modules
  • Memory size requirements
  • Processing speed requirements
  • Low power requirements
  • Performance and maximum frequency
  • Chip package
  • Operation conditions: voltage, temperature, electromagnetic interference
  • Cost and availability
  • Software development tool support and kits
  • Future upgradability
  • Firmware packages and firmware security
  • Availability of application notes, design examples, and support

Software Development

  • Program Instructions
  • Machine Instruction: Binary code executed by the processor
  • Assembly Language: Mnemonic representation of machine code instructions
  • High-Level Language: English-like syntax, translated by a compiler
  • Assembly programs are more optimized
  • Microcontrollers have different word sizes, memory types, and architectures.

Address Space

  • Memory is a sequence of addressable locations
  • A memory location has an address and its contents.
  • CPU and memory communicate through address and data buses.
  • The address space depends on the processor’s address decoding mechanism
  • Different address space usage approaches
  • Isolated I/O: Separate spaces for memory and I/O. (Intel)
  • Memory-mapped I/O: Single address space for both. (ARM, Motorola)
  • The Cortex-M4 processor has 32 bits for addressing, supporting 4GB of memory space

Data Organization

  • Memory stores data in fixed-size locations (typically 8-bit bytes), each with a unique address
  • Memory content is accessible by size: byte, half word, word, double word
  • A 32-bit piece of data has four bytes, depends on endianness
  • Little Endian: LSB stored in the lowest address (ARM default)
  • Big Endian: LSB stored in the highest address

Memory Architecture

  • Two classes
  • Von Neumann: Data and program share memory
    • Requires a single memory interface bus, but bottlenecks data transfer
  • Harvard: Separate buses for code and data to improve performance
    • Requires sophisticated hardware to support multiple interface buses
    • The Cortex M4 is based on the Harvard architecture

Registers

  • They are closely located in the processor
  • Fast access, but limited quantity
  • General-purpose registers store data (timer values, constants) and addresses (ASCII tables, stack)
  • Some are reserved for specific purposes like program counters and program status registers.

Instruction Set Architecture (ISA)

  • ISA provides an interface for communication
  • Elements in ISA
  • Instruction Set:
  • Group of instructions to the computer
  • Instructions direct computer in terms of data manipulation -Opcode or operational code: Instruction that's applied
  • Operand is memory register or data which instruction is applied on
  • Addressing Modes: Specifies how data is accessed -Direct mode accesses data in a indirect way -Indirect mode access is straight data

CISC and RISC

  • Complex Instruction Set Architecture (CISC) approach minimizes instructions per program, sacrificing cycles per instruction -Complex hardware design, slower execution. Reduced Instruction Set Architecture (RISC) decreases the cycles per instruction
    • Needs more instructions and memory
  • ARM provides the 16-bit Thumb and 16/32-bit Thumb2 instruction sets

Instruction Execution

  • Multiple stages in executing an instruction
  • Fetching
  • Decoding
  • Executing
  • Cortex M4 uses a 3 stage pipeline

ARM Architecture

  • 1980s ARM Acorn computers
  • ARM based an RISC developed by Advanced RISC machines
  • requires lesser transistors
  • smaller size
  • low power consumption
  • has modular design
  • can be grouped by different architectutres, families and cores

Arm Processors

  • Various bit widhts, for instance ARMv4T with 32, ARMv5 with 32 etc
  • Cortex AX implements Virtual Memory Systems arch based on MMU
  • ARM Processor licenses includes ARMv8A, CortexA15

Registers

  • Has 32 bit registers
  • General purpose registers r0-r12
  • Stack Pointer SP
  • Link Register
  • Program Counter
  • Some register can be reached accoringly

Cortex M3/M4 CPU

  • Has Flash Memory
  • Has IO Code bus with Instuction Fetch
  • Has data and debug data

Data Processing

  • Data can be handeled efficiently with 8/16 bit
  • Support operating systems
  • Support memory protection
  • Has instructions for system control

Thumb instructions

  • 16 bit instruction set, some can access high register
  • alligned and half-worded
  • Various types, for instance data movement, arithmetic
  • APSR 32 bit register holds the flag bits

ALU Support

ALU Supports a barrel shifter that has powerful instruction when shifting

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