Intro to Microprocessors

Introduction to Microprocessors

• A microprocessor combines "micro" (extremely small) and "processor" (a device that manipulates numbers, specifically binary 0s and 1s).
• Microprocessors are essential for electronic components needing programmed processing.
• Smaller processors are needed for small components like traffic lights and remote controls.
• A microprocessor is a controlling unit of a microcomputer, built on a small chip, capable of Arithmetic Logic Unit (ALU) operations.
• It is a programmable, general-purpose, clock-driven, register-based electronic device.
• The device reads binary instructions from memory, accepts binary data as input, process data, and provides output.
• Basic components of a programmable machine are the microprocessor, memory, and input/output devices.

Microprocessor vs Microcontroller

• Microprocessors are program-controlled semiconductor devices that fetch, decode, and execute instructions from memory.
• Microprocessors do not have RAM, ROM, and other peripherals on the chip.
• Microcontrollers have an embedded processor, RAM, ROM, and other peripherals all on a single chip.
• Microprocessors require external system designers to make them functional.
• Microcontrollers are suited for use in keyboards, mice, washing machines, digicams, remotes, microwaves, cars, bikes, telephones, mobiles, watches, etc.
• Microprocessor applications include use in desktops, laptops, etc.

CPU Functions and Components

• The Central Processing Unit (CPU), also called the microprocessor, acts as the brain, coordinating all activities within a computer.
• The memory stores program instructions and data.
• The input/output (I/O) devices allow data input for processing and output of results, and are also known as computer peripherals.
• The CPU controls the system's operation.
• The CPU performs algebraic and logical operations.
• The CPU stores information while processing.
• A program stored in memory instructs the CPU to perform actions.
• The CPU has multiple registers for temporary internal information storage.
• Registers inside the CPU depend on its type.
• The CPU contains registers for temporary information storage.
• An Arithmetic and Logic Unit (ALU) performs all calculations.
• A Program counter also known as an Instruction Pointer indicates the address of the next instruction.
• An Instruction Decoder interprets fetched instructions, generating control signals.

Buses

• The address bus identifies the memory location or I/O device to communicate with.
• Address Bus width ranges from 20 bits (8086) to 36 bits (Pentium II).
• The data bus transfers data between the CPU, memory, and I/O devices.
• Data Bus width is used to classify the microprocessor.
• Intel Microprocessors data buses vary between 8 bits (8085) to 64 bits (Pentium).
• The control bus activates control signals when the processor outputs an address.
• Control Bus signal examples include: Memory Read, Memory Write, Input/Output Read and Input/Output Write.
• Address and control buses are unidirectional, data bus is bidirectional.

Memory Types

• RAM (Random Access Memory) is read-write memory used for temporary storage of running programs.
• Data in RAM is lost when power is turned off, making it volatile memory.
• RAM is primary storage; magnetic/optical disks are secondary storage.
• ROM (Read Only Memory) is permanent; information is not lost when power is off.
• ROM is named non-volatile memory.

Evolution of Microprocessors

• 4-bit: Intel 4004/4040 was invented in 1971, has a 740 KHz clock speed, uses 2,300 transistors, processes 60K instructions/second, and has 16 pins.
• 8-bit: 8008 processor was invented in 1972, has a 500 KHz clock speed, and processes 50K instructions/second.
• 8-bit: the 8080 was invented in 1974, has a 2 MHz clock speed, uses 60k transistors, and is is 10x faster than the 8008.
• 8-bit: the 8085 was invented in 1976, has a 3 MHz clock speed, uses 6,500 transistors, processes 769230 instructions/second, and has 40 pins.
• 16-bit: the 8086 microprocessor was invented in 1978, has clock speeds of 4.77, 8 & 10 MHz, uses 29000 transistors, processes 2.5 million instructions/second, and has 40 pins.
• 16-bit: The 8088 microprocessor was invented in 1979 and processes 2.5 Million instructions/second.
• 16-bit: The 80186/80188 microprocessors were invented in 1982 with a clock speed of 6 MHz.
• 16-bit: The 80286 microprocessor was invented in 1982, has an 8 MHz clock speed, uses 134000 transistors, processes 4 Million instructions/second, and has 68 pins.
• 32-bit: The Intel 80386 microprocessor, invented in 1986, operates at clock speeds of 16 MHz to 33 MHz.
• 32-bit: It uses 275,000 transistors and has 132 pins in a 14x14 PGA configuration.
• 32-bit: Also in 1986, the Intel 80486 microprocessor operated at 16MHz to 100 MHz.
• 32-bit: The 80486 uses 1.2 million transistors, processes 8KB of cache memory per second, and has 168 pins in a 17x17 PGA (Pin Grid Array) arrangement.
• 32-bit: in 1993, The Pentium microprocessor had a 66 MHz clock speed and cached 8-bit instructions, 8-bit data. The pin count is 237 PGA.
• 64-bit: The Intel Core 2 microprocessor was invented in 2006 with a clock speed of 1.2 GHz to 3 GHz.
• 64-bit: The Core 2 uses 291 million transistors and processes 64KB of L1 cache per core and 4MB of L2 cache.
• 64-bit: The i3, i5, and i7 microprocessors were invented between 2007 and 2010.
• 64-bit: These have clock speeds rangin between 2GHz to 3.3GHz, 2.4GHz to 3.6GHz & 2.93GHz to 3.33GHz.

Intel 8086 Microprocessor

• Intel designed the Intel 8086 microprocessor in 1976.
• It is a 16-bit, N-channel, HMOS microprocessor, where HMOS stands for "High-speed Metal Oxide Semiconductor".
• The 8086 is built on a single semiconductor chip in a 40-pin IC (Dual Inline Package).
• It uses 20 address lines and 16 data lines, directly addressing up to 2^20 = 1 Mbyte of memory.
• The 8086 operates in minimum and maximum modes.

Architecture of the Intel 8086 Microprocessor

• Consists of two blocks: Execution Unit (EU) and Bus Interface Unit (BIU).
• The EU handles processing, arithmetic, and logic operations.
• The BIU manages information transfer between the processor, memory, I/O ports, and storage devices.

Execution Unit (EU)

• Responsible for executing instructions.
• When ready, it pulls the object code from the BIU's instruction queue, executing in clock cycles.
• Informs the BIU for memory or I/O device access during instruction.
• It has no direct bus connection, receives and outputs data through the BIU.
• An EU consists of both data and address registers aka General Purpose Registers along with the ALU.

8086 Register Organization

• The 14 registers of the 8086 microprocessor are divided in to four groups: General Purpose Data Registers, Pointer & Index registers, Segment registers, and Flag register.
• General purpose registers are 16-bit (AX, BX, CX, DX) and 8-bit (AH, AL, BH, BL, CH, CL, DH, DL).
• The Instruction and Pointer Registers are 16-bit.
• Segment registers are 16-bit and include Code Segment (CS), Data Segment (DS), Stack Segment (SS), Extra Segment (ES)
• A Flag (PSW) register is 16-bit.

General Purpose Registers

• Data registers store temporary results for subsequent instructions.
• Registers temporarily store information in the CPU.
• This data can be one or two bytes, or a data address.
• Bits are numbered in descending order.
• AX is used for accumulation.
• BX is used for base addressing.
• CX is used for Counter loop operations.
• DX is used to point out Data in I/O operations.

Index Registers

• There are two 16-Bit index registers: Source index (SI) register and Destination Index (DI) register.
• They are useful in array processing and string operations.
• The SI register points to the source string.
• The DI register points to the destination string.

Segment Registers

• These includes four 16-bit segment registers: Code Segment (CS), Stack Segment (SS), Data Segment (DS) and Extra Segment (ES).
• The CS register addresses the 64kB memory location in the code segment, where the executable program code is stored.
• The DS register points to the 64kB data segment of memory for storing data.
• The ES register essentially refers to another data segment of the memory space.
• The SS register is useful for using stack segment of the memory.
• There are different segment addresses for different code, data, stack and extra segments of the memory.

Pointer & Control Registers

• There are two 16-Bit pointer registers: Stack Pointer (SP) and Base Pointer (BP).
• The SP points to the top of the stack.
• Base pointer is also used as memory pointer.
• Controller Registers consists of two 16-Bit registers: The Instruction Pointer (IP) register and Flag Register.

Instruction Pointer Register

• The Instruction Pointer (IP) register, also known as Program Counter is a 16 bit register with only one function: point to the next instruction fetched by the BIU from memory.
• The Register IP is physically part of the BIU and not under direct control of the programmer.

Flag Registers

• The Carry Flag (CF) is set if a mathmatical or logical operation results in a carry out of the MSB, and is cleared to zero otherwise.
• The Parity Flag (PF) is set if a result has even parity.
• The Auxiliary carry Flag (AF) is for BCD
• The Zero Flag (ZF) is set if results = 0
• The Sign Flag (SF) = MSB of result
• The Overflow Flag (OF) identifies an overflow flag
• Flags can be conditional or control flags.
• Conditional flags represent the result of the last arithmetic or logical instruction. Carry Flag, Auxiliary Flag, Parity Flag, Zero Flag, Sign Flag and Overflow Flag
• Control Flags can be set or reset directly by the programmer and are used to control the operation of the processor: Trap Flag, Interrupt Flag, and Direction Flag.
• If mathmatical or logical operation results in a carry out of igh-order bit of output, carry flag is set to 1. It is cleared to 0 otherwise.
• If mathmatical or logical operation results in a carry out of the low order nibble, auxillary flag is set to 1, otherwise it is cleared to 0.
• An arithmetical or logical operation sets hte sigh flag equal to the MSB of the result. For signed binary numbers, SF = 0 for positive results and SF =1 for negative result provided there is no overflow.
• If the result of an arithmetical or logical operation is zero then the zero flag is set to 1, otherwise to zero.
• Parity Flag (PF): If the result of an arithmetic or logic operation contains an even number of "1" bits, then the parity flag is set to 1; otherwise cleared to zero.
• Overflow Flag (OF): If the result of an operation is too large to fit in the destination operand, then the OF flag is set; otherwise cleared to zero.
• Direction Flag (DF): setting DF =1 causes string instructions to auto decrement, i.e. to process strings from high address to low address.
• Interrupt Flag (IF): Setting IF =1, unmasks the mask interrupt requests.
• Trap Flag (TF): Setting TF =1 puts the processor into single step mode for program debugging.

Arithmetic Logic Unit

• Arithmetic Logic Unit (ALU) is the is used by the Execution Unit (EU) for computation.
• If an arithmetic or logic operation needs to be performed on numbers, the numbers are sent from the general purpose registers to the ALU. And the ALU performs the function and the result is sent back to the general purpose registers.

Bus Interface Unit (BIU)

• Segment registers, instruction pointer, and 6-byte instruction queue are associated with the bus interface unit.
• The handling of data and address transfer are managed by the BIU.
• BIU fetches instruction codes, stores fetched instruction codes in a first-in-first-out register set called a queue,
• The BIU reads data from memory and I/O devices,
• The BIU writes data to memory and I/O devices,
• BIU relocates addresses of operands since it gets un-relocated operand addresses from EU.
• The EU tells the BIU from where to fetch instructions or where to read data.

Starting the 8086

• The execution of a machine code instruction is broken into three stages: Fetch, Decode, Execute.
• Fetch retrieves the next instruction from memory.
• Decode determines which circuits to energize.
• Execute executes the instruction.
• Three circuits perform these tasks: the bus control logic performs the fetch, the EU control system performs the decode, and the ALU performs the execute.

Memory Mapping

• The 8086 memory space can be viewed as sixteen 64KB blocks running from address 00000h to FFFFF)h.
• Division into 64KB blocks is arbitrary.
• The most significant hex digit increments by 1 with each additional block.
• Address 20000h is 65,536 bytes higher than 10000h.

Memory Segmentation

• The 8086 defines four 64K-byte memory blocks called the code segment, stack segment, data segment, and extra segment.
• Each of these blocks of memory is used differently by the processor.
• The stack segment is used to store interrupt and subroutine return addresses.
• Segment registers point to "location 0" (the base address) of each segment.
• The registers are only 16 bits wide, but the memory address is 20 bits wide.
• The BIU appends four 0's to the low order bits of the segment register multiplying the segment register contents by 16 to fix the address size.

Logical and Physical Addresses

• Addresses within a segment range from 00000h to 0FFFFh matching the 64KB length.
• An address within a segment is called an offset or logical address.
• A logical address provides displacement from address base to desired location and is different from a "real" or physical address which maps to the 1 MB memory space.
• Physical Address = Segment Address x 10H + Offset Address
• Physical Address or Actual Logical address of the next instruction to be executed by the microprocessor = CS x10H + IP
• Physical Address or Actual Logical address of the data = DS x 10H + SI, DI or BX
• Physical Address or Actual Logical address of the data in the stack memory = SS x 10H + SP or BP
• Physical Address or Actual Logical address of where the source data is found when string instruction is executed = DS x10H + SI
• Physical or Actual Destination address of data when string instruction is executed = ES x 10H + DI

8086 Pin Configuration

• AD0-AD15 (Address Data Bus): Bidirectional address/data lines form the low order address bus and are multiplexed with data.
• When transmitting memory address, the symbol A is used instead of AD, for example, A0- A15.
• A16 - A19 (Output): High order address lines, multiplexed with status signals.
• A16/S3, A17/S4: A16 and A17 are multiplexed with segment identifier signals S3 and S4.
• A18/S5: A18 is multiplexed with interrupt status S5.
• A19/S6: A19 is multiplexed with status signal S6.
• BHE/S7 : Bus High Enable/Status. It enables the data onto the most significant half of data bus, D8-D15.
• It is multiplexed with status signal S7.
• RD (Read): The Read operation is an output signal, active when LOW.
• Ready (Input): The addressed memory or I/O sends acknowledgment with this pin and when HIGH. It denotes that the peripheral is ready to transfer data.
• RESET (Input): System reset activated. The signal is active HIGH.
• CLK (Input): Clock speed is 5, 8 or 10 MHz.
• INTR: Interrupt Request.
• NMI (Input): Non-maskable interrupt request.
• TEST (Input): A wait for test control where LOW signifies the microprocessor will continue execution.
• VCC: Power supply +5V dc.
• GND: Ground.

Operating Modes of 8086

• There are two operating modes of operation for the Intel 8086 including the minimum mode and the maximum mode.
• The 8086 is used in the Minimum mode of operation when when only one 8086 CPU is to be used in a microprocessor system.
• The 8086 operates in the Maximum mode when in a multiprocessor system

Minimum Mode Pin Description

• In this minimal mode of operation The MN/MX pin is connected to 5V DC supply: MN/MX = VCC.
• INTA (Output): Pin number 24 transmits Interrupt acknowledgement when the processor issues an interrupt acknowledgment signal after receiving the interrupt signal and It is active LOW.
• ALE (Output): Address Latch Enable- is pin no. 25 that goes HIGH during state T1. The microprocessor 8086 sends this signal to latch the address. Data Enable (DEN) Is pin no. 26 and It is active LOW.
• Data Transmit/Receives (DT/R ) Is pin no. 27 and the signal controls the direction of data flow: When it is HIGH, data is sent out and when it is LOW, data is received. M/IO (Output): Pin no. 28, Memory or I/O access, which is HIGH when the CPU wants to access memory and LOW when the CPU wants to access I/O device.
• Write (WR) Is pin no. 29 that is active when LOW and The CPU performs memory or I/O write operation.
• HOLD (Input) Is pin no. 31 where another device in microcomputer system wants to use the address and data bus, it sends HOLD request to CPU through this pin which is active HIGH signal.
• Hold Acknowledgment (HLDA) Is pin no. 30 is sent to the processor when it receives the HOLD signal and it is active HIGH signal: When HOLD is removed HLDA goes LOW