Interrupts in Microcontrollers

Interrupts

• An interrupt is an external or internal event that informs the microcontroller that a device needs its service.

Interrupt vs Polling

• Interrupts:
  • The device notifies the microcontroller by sending an interrupt signal when it needs service.
  • The microcontroller interrupts its current task and serves the device.
  • The associated program is called the Interrupt Service Routine (ISR) or interrupt handler.
• Polling:
  • The microcontroller continuously monitors the status of a given device.
  • When conditions are met, it performs the service and moves on to monitor the next device.

Steps in Executing an Interrupt

• Finishes the current instruction and saves the address of the next instruction (PC) on the stack.
• Saves the current status of all interrupts internally (not on the stack).
• Jumps to a fixed location in memory, the interrupt vector table, which holds the address of the ISR.
• Retrieves the address of the ISR from the interrupt vector table and jumps to it.
• Executes the interrupt service subroutine until the RETI (return from interrupt) instruction.
• Upon executing RETI, the microcontroller returns to the interrupted location.

8051 Interrupts

• The original 8051 has 6 sources of interrupts: Reset (RST), Timer 0 overflow (TF0), Timer 1 overflow (TF1), External Interrupt 0 (INT0), External Interrupt 1 (INT1), and Serial Port events (RI+TI).
• 8051 Interrupt Vectors: 8
• 8051 Interrupt-related Registers: 9

Interrupt-related Registers

• TCON: Edge and Type bits for External Interrupts 0/1
• SCON: RI and TI interrupt flags for RS232 (Serial Communication)
• IE: Interrupt Enable (responsible for enabling/disabling interrupts)
• IP: Interrupt Priority (assigns high or low priority to interrupts)

Enabling and Disabling Interrupts

• The IE (Interrupt Enable) register enables (unmasks) or disables (masks) interrupts.
• IE Register:
  • EA: Global enable/disable
  • ES: Enable Serial port interrupt
  • ET1: Enable Timer 1 control bit
  • EX1: Enable External 1 interrupt
  • ET0: Enable Timer 0 control bit
  • EX0: Enable External 0 interrupt