Instruction Cycle

Instruction Cycle

• The main job of the CPU is to execute programs using the fetch-decode-execute cycle (also known as the instruction cycle).
• This cycle begins as soon as one turns on the computer.
• To execute a program, the program code is copied from secondary storage into the main memory.
• The CPU's program counter is set to the memory location where the first instruction in one program has been stored.
• Execution begins, and the program is now running.
• The processor checks the program counter to see which instruction to run next.
• The program counter gives an address value in the memory of which the next instruction is.
• The processor fetches the instruction value from this memory location.
• Once the instruction has been fetched, it needs to be decoded and executed.
• This could involve taking one value, putting it into the ALU, then taking a different value from a register and adding the two together.
• Once this is complete, the processor goes back to the program counter to find the next instruction.
• This cycle is repeated until the program ends.

Addressing Modes

• The way the operands are chosen during program execution is dependent on the addressing mode of the instruction.
• The Address field contains the information needed to determine the location of the operands and the result of an operation.
• The Addressing mode specifies how to interpret the information within the address field, and how to compute the actual or effective address of the data needed.
• Addressing modes define the different ways of specifying the location of an operand in an instruction.
• The addressing mode specifies a rule for interpreting or modifying the address field of the instruction before the operand is actually referenced.
• The purpose of the addressing mode is to give programming versatility to the user, including pointers to memory, counters for loops, indexing of data, and programming relocation.
• It also reduces the number of bits in the addressing field of instruction.

Types of Addressing Modes

• There are different types of addressing modes including Implied/Implicit, Immediate, Direct, Indirect, Register Direct, Register Indirect, Auto-Increment/Auto-Decrement, Relative, Indexed, and Base Register addressing modes.
• Implied/Implicit mode does not require an address field.
• Immediate mode's address specifies the memory location.
• Register modes address the processors registers.
• In Implied (or Implicit) Mode: Operands are specified implicitly in the definition of the instruction.
• Examples include CMA (Complement Accumulator) where the operands in AC is implied in the definition of the instruction and CLA (Clear Accumulator) where operands in AC is implied in the definition of the instruction.
• All register reference instructions that use an accumulator (AC) are implied-mode instructions.
• Zero-address instructions in a stack-organized computer are implied-mode instructions since the operands are implied to be on top of the stack.
• In Immediate Mode: The operand is specified in the instruction itself.
• An immediate mode instruction has an Operand field rather than the address field.
• The Operand field contains the actual operand.
• For example, Load #7 (AC <- 7) or ADD #5 (AC <- AC+5).
• Immediate mode is useful for initializing registers to a constant value.
• In Direct Mode: The operand resides in memory and its address is given directly by the address field of the instruction.
• The address field of the instruction contains the effective address EA (or actual address) of the operand.
• The effective address (EA) is equal to one address field (A).
• For example, ADD A (AC + M(A)) or LOAD B (AC < M(B)).
• Direct mode is also called absolute addressing mode.

Instruction

• The advantage of direct addressing is its simplicity.
• It requires only a single (one) memory reference to access data.
• There are no additional calculations to work out the effective address.
• A disadvantage is that the address space is limited to the size of the address field.

Indirect Mode Addressing

• The address field of the instruction specifies an address where the effective address of the operand is stored in memory.
• EA = (A) or EA = @A': look in A, find address (A) and look there for the operand.
• An advantage is that a large address space is possible.
• Disadvantages include that multiple (two) memory references are needed to find the operand, hence it is slower.

Register Modes

• In Register Mode (Direct Mode), the Registers reside within the CPU.
• The operand is stored in the register.
• The address field of the instruction refers to a CPU register that contains the operand.
• EA = Ri.
• A k-bit field can specify any one of 2k registers.
• No reference to memory is required to fetch the operand.
• Advantages include limited address field sizes.
• No memory reference (very fast execution).
• Disadvantages: very limited address space.
• Using multiple registers helps performance but it complicates the instructions.

Register Indirect Mode

• The address field of instruction specifies the register that contains the effective address of the operand. The operand is in memory.
• The register contains the effective address of the operand rather than the operand itself.
• EA = (Ri)
• For example: ADD (R1), R2 m[R1]
• Advantages: Address field of instruction uses fewer bits to select a memory address.
• Large address space 2^n.
• One fewer memory access than indirect addressing.
• Disadvantages: Extra memory reference as compared to register direct mode.

Addressing Modes: Auto-increment / Auto-decrement mode

• Similar to register indirect mode (Effective Address of operand is the content of register specified in the instruction) except that in Auto-increment, the register is incremented after its value is used to access memory (EA = (Ri)+).
• In Auto-decrement, the register is decremented before its value is used to access memory (EA = -(Ri)).
• This mode is used when the address stored in the register refers to a table of data in memory, making it necessary to increment or decrement the register after every access to the table.

Addressing Modes: Displacement Addressing

• Addressing modes require that one address field of instruction be added to the content of a specific register in the CPU.
• Effective Address = Address part of instruction + content of CPU Register (PC/XR/R).
• The Address field holds two values: A = base value and R = register that holds displacement/offset (or vice versa).
• Advantages: flexibility.
• Disadvantages: Complexity.
• Three versions of displacement addressing are Relative (EA = PC+A), Indexed (EA = A+XR), and Base Register (EA = Ri+A) addressing.
• In Relative Addressing Mode: Register = Program Counter (PC).
• The Content of PC is added to the address Part of the instruction to obtain the effective address of the operand.
• The effective address is content of PC + Address part of instruction.
• Move the operand A bytes away from the current location pointed to by PC (EA) = (PC) + A.
• For example: Load A (PC) AC < M[PC+A].
• The address location is related to PC, so it is called relative mode.
• For Indexed Address Mode: Register = Base Register.
• Effective address = content of XR + Address part of Instruction.
• A contains a constant value of instruction.
• XR/Ri is the name of the register involving (index value).
• Baje Register Addressing Mode: Similar to indexed addressing except that the register is now called a base register.
• The content of the Base Register is added to the address part of the instruction to obtain the effective address of the operand.
• Effective address = Content of BR + Address part of Instruction. Ri is a base register that holds the base address.
• A holds a displacement relative to this base address.

Example Addressing Mode Evaluation

• Given an instruction stored at location 300 with its address field at location 301, and the address field has the value 400, and a processor register R1 contains the number 200:
• Evaluate the effective address for:
  • Direct Mode: Effective address is the address part of the instruction (400), EA = 400.
  • Immediate Mode: The second word of the instruction is taken as the operand, EA = 301
  • Register Indirect Mode： effective address is 200, the content of R1, EA = 200.
  • Relative addressing mode: In relative address mode, the effective address is 400 + 302 = 702 (PC = PC+2), EA = 702.

Design of Control Unit

• The control unit can be designed by two methods: Hardwired Control Unit and Micro-Programmed Control Unit.
• A Hardwired Control Unit is implemented with physical components such as hardwired gates, flip-flops, and decoders in the hardware.
• The inputs to the control unit are the instruction register, flags, and timing signals.
• If the design is modified or changed, all the combinational circuits should be modified, which is a very difficult task.
• The sequence of the operation carried out by this machine is determined by wiring of the logic elements, and is known as "Hardwired."
• Microprogrammed Control Unit is implemented using a Programming approach.
• A sequence of micro-operations is carried out by executing a program which consists of micro-instructions.
• Any modifications or changes can be done by updating the microprogram in the control memory, which is done by a programmer. .
• Control signals are generated by a program.
• Its speed is slow because of the time it takes to fetch microinstructions from control memory. .

Control Unit Comparison

• Hardwired Control Unit controls are generated by hardware where as Software is used in Microprogrammed Control Unit
• Hardwired Control Unit Structure is more complex that Microprogrammed Control Unit
• Hardwired Control Unit High cost compare to Microprogrammed Control Unit Low cost
• Hardwired Control Unit Fast at Speed compare to Microprogrammed Control Unit being Slow
• Hardwired Control Unit Difficult to be Modified compare to Microprogrammed Control Unit which is Easily Modified
• Hardwired Control Unit implemented inHardware (flip flop, logic gates) compare to Microprogrammed Control Unit implemented in (Control Memory Micro-operation)

Bus Structure

• A Bus is a group of wires (or lines) that connects several devices within a computer system.
• Each wire/line can transfer one bit (1/0) of information.
• The Bus carries data, address, and control information.
• There are Three types of Bus: Address Bus, Data Bus, and Control Bus.

Address Bus:

• The address bus is unidirectional, consisting of a group of wires that carries address information bits from the processor to peripherals.
• The address bus width determines the maximum memory capacity.
• An example is if the address line is 3 bits, then 2^3=8 bits, i.e. 3 address lines are required to select 8 locations.
• In general, 2^n=n, where n is the number of address lines (address bit) and n is the number of locations.
• The Data bus is bidirectional, a group of wires that carries data information bits from processor to peripherals and vice-versa.
• The data bus is used to move data/instruction between CPU and peripherals.
• The data bus width determines the system performance (word length of computer).
• The Control bus is bidirectional, a group of wires which carries control signals from the processor to peripherals and vice-versa.
• The control bus controls the access to and use of address lines and data lines and consists memory read/write and I/O read/write.

Common Bus System

• Each register has four bits (0 through 3).
• The 4-bit register uses 4 multiplexers because the number of bits in register is always equal to the number of multiplexers.
• The bus consists of four 4x1 multiplexers each having four data inputs (0 through 3) and two selection inputs (S1 and S0).
• Number of Mux = Number of bits in Register.
• Number of I/P in Mux = Number of Registers.
• The two Selection lines S0 and S1 are connected to the selection inputs of all four multiplexers.
• The selection lines choose the four bits of one register and transfer them into the four line common bus.
• when both of the selection lines S1, S0=00, the 0 data inputs of all four multiplexers are selected and applied to the outputs that forms the bus.

General Rules for Multiplexers and Common Bus System

• A bus system will multiplex K registers of n "bits" each to produce an n-line common bus.
• The "number of multiplexers" needed to construct the bus is equal to n, the number of bits on each register.
• The size of each multiplexer must be Kx1 since in multiplexes K data lines.
• For a common bus system using multiplexers for 8 registers of 16 bit data transformation: 16 multiplexers are requires, one for each line in the bus.(no. of bits in registers), Each multiplexer must have eight data input lines and three selection lines (S2,S1,S0) to multiplex one significant bit in the eight registers, the size of MUX is 8X1.

Program Evaluation of Arithmetic Statements

• A program to evaluate would be (A+B) * (C+D)
• Using three address instruction: -ADD R1, A, B // R1 ← m[A] + m[B] -ADD R2, C, D // R2 ← m[C] + m[D], -MUL X, R1, R2 // m[X] ← R1 * R2.
• Using two address instruction: -MOV R1, A // R1 ← m[A] -ADD R1, B // R1 ← R1 + m[B] -MOV R2, C // R2 ← m[c] -ADD R2, D // R2 ← R2 + m[D] -MUL R1, R2 // R1← R1 + R2 -MOV X, R, // M [X ] ← Ri
• MOV instruction: It moves or transfers the operands to and from memory and processor registers.

Arithmetic Statements using One or More Address Instruction.

• Given this statement to be calculated -X = A*B + C * C
• Using three-address instructions: -MUL R1, A, B// R1 +R1 + M[CJ R2 -ADD x, R1, R2 // M[X]< R1 + R2
• Using two-address instruction: -MVR1, A // R1< MEAJ -MUL R1, B // R2<miej

Bit Slicing Technique

• Bit Slicing refers to the technique of constructing an m-bit-arithmetic-logic unit (ALU) by interconnecting a set of identical n-bit LSI chips are called bit slices.
• Bit slice chips - typically, one, two, or four bits wide - contain all of the circuits necessary to perform a large number of ALU functions, including arithmetic, logic, and register storage.
• For example, four-bit slices may be combined to form the CPU of a 16-bit computer.