EE321 Chapter 5: Computer Memory

Overview of Computer Architecture and Memory

• Course objectives: understand structure and function of different types of memories
• Topics covered: memory organization, memory types (ROM, SRAM, DRAM), memory chip, memory map, memory interfacing, cache memory

Memory System Overview

• Definition of memory: data storage module
• Memory characteristics: capacity, cost per bit, access time, transfer rate, physical characteristics (volatile/non-volatile, erasable/non-erasable)
• Ideal memory features: fast access time, high transfer rate, non-volatile, low power, high capacity, low cost per bit, in-system re-writable, fully-bit erasable
• Memory hierarchy: registers, cache, main memory, magnetic disks, tapes, optical disks

Memory Organization and Function

• Memory module: latch, flip-flop, register, memory chip (ROM, EPROM, EEPROM, FLASH, SRAM, DRAM), optical disc, magnetic disk, magnetic tape
• Flip-flop or latch memory cell: 1-bit memory cell, active low write signal, active low read signal
• Example: 4x8-bit memory using two 4x4-bit memory chips
• Memory chip requirements: address lines, data lines, enable signal, chip select signal, read signal, write signal

Memory Types

• Read Only Memory (ROM)
  • Permanent storage
  • Non-volatile
  • Used in microprogrammed control unit and system programs (BIOS)
• Random Access Memory (RAM)
  • Can both read data from and write data into the memory
  • Volatile
• Types of ROM:
  • Maskable ROM
  • One-time programmable ROM (fuse ROM)
  • EPROM (Erasable Programmable ROM)
  • EEPROM (Electrically Erasable Programmable ROM)
  • Flash memory
• Types of RAM:
  • Static RAM (SRAM)
  • Dynamic RAM (DRAM)

ROM

• Maskable ROM: data is 'wired in' during fabrication, very expensive for small runs
• One-time programmable ROM (OTP ROM): data can be written once by the user, useful for small production runs
• EPROM: can be erased by exposing to Ultra Violet (UV) light, entire memory is erased, off-system programming and de-programming
• EEPROM: can be written to many times while remaining in a system, writes require several hundred microseconds per byte
• Flash memory: similar to EEPROM, supports block erasures, faster erasures

DRAM

• Dynamic Random Access Memory (DRAM)
• Bits stored as charge in capacitors
• Charges leak, need refresh circuits
• Simpler construction, less expensive, slower, used for main memory
• Read and write operations: address line active, transistor switch closed, charge from capacitor fed via bit line to sense amplifier

SRAM

• Static Random Access Memory (SRAM)
• Bits stored as on/off switches
• No charges to leak, no need for refresh circuits
• More complex construction, more expensive, faster, used for cache memory
• 6T-SRAM cell compared to 1T-DRAM cell### Memory Types
• Random-access memory (RAM):
  • Category: Read-write memory
  • Erasure: Electrically, byte-level
  • Write mechanism: Electrically
  • Volatility: Volatile
• Read-only memory (ROM):
  • Category: Read-only memory
  • Erasure: Not possible
  • Write mechanism: Masks
  • Volatility: Nonvolatile
• Programmable ROM (PROM):
  • Category: Read-mostly memory
  • Erasure: Not possible
  • Write mechanism: Electrically, byte-level
  • Volatility: Nonvolatile
• Erasable PROM (EPROM):
  • Category: Read-mostly memory
  • Erasure: UV light, chip-level
  • Write mechanism: Electrically
  • Volatility: Nonvolatile
• Electrically erasable PROM (EEPROM):
  • Category: Read-mostly memory
  • Erasure: Electrically, byte-level
  • Write mechanism: Electrically
  • Volatility: Nonvolatile
• Flash memory:
  • Category: Read-mostly memory
  • Erasure: Electrically, block-level
  • Write mechanism: Electrically
  • Volatility: Nonvolatile

Memory Chip

• A memory chip contains an array of memory cells
• Each chip has a specific organization and size (e.g., 16 Mbits DRAM, 4Mx4bits)

Memory Module Organization

• A memory module is a group of chips mounted on a printed circuit board (PCB)
• Examples: Single Inline Memory Module (SIMM) and Dual Inline Memory Module (DIMM)
• A DIMM card can contain 16 chips of 64MBytes each

Memory Map/Interfacing

• Memory map: dividing the memory range into sections suited to specific roles (e.g., program section, data section, stack section)
• Memory interfacing: allows the CPU to read from and write into a location of a given memory chip
• Decoding: generating the chip select signal (CS) or chip enable (CE) signal
• Interfacing: connecting the data lines of the memory chip to the data bus, and the address lines to the address bus

Word vs. Byte Addressable Memory

• Word addressable memory: each address location stores one word of data
• Byte addressable memory: each address location stores one byte of data
• Most computer designs use byte addressable memory

Byte Ordering

• Little-endian: stores the least significant byte first (e.g., Intel X86 processors)
• Big-endian: stores the most significant byte first (e.g., Motorola and Sparc processors)

Cache Memory

• Cache memory: small, fast memory that stores recently used words from main memory
• Cache levels: Level-1 (L1), Level-2 (L2), and Level-3 (L3) caches
• Cache operation: CPU requests contents of memory location, checks cache, and retrieves data from cache or main memory

External Memory

• Magnetic disk: Hard Drive Disk (HDD), magnetic tape
• Optical disc: Compact Disc (CD), Digital Versatile Disc (DVD), Blu Ray
• Solid-state storage: Flash memory, Solid State Disk (SSD)