Digital Logic Design: Combinational Logic Functions Quiz

Half-Adder Outputs

• For inputs A=1 and B=1, the half-adder produces a sum output of 0 and a carry output of 1.
• For inputs A=0 and B=1, the half-adder generates a sum output of 1 and a carry output of 0.
• Half-adders are designed to perform addition of two binary digits without carry input.

Full-Adder Inputs and Outputs

• A full adder has three binary inputs: two significant bits (A and B) and a carry input (C).
• Given inputs A=1, B=1, and Carry in=1, the full adder produces a sum output of 1 and a carry output of 1.
• Full adders allow for transfer of carry from previous sums, enabling multi-bit binary addition.

Binary Addition with Half-Adder

• The result of binary addition for inputs A=1 and B=1 using a half-adder results in a sum of 0 with a carry of 1, indicating the need to handle overflow in binary addition.