Digital Integrated Circuits

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Questions and Answers

Which of the following logic families is characterized by its high speed due to its avoidance of saturation in transistors, but at the cost of higher power consumption and more complex fabrication processes?

  • Emitter-coupled logic (ECL) (correct)
  • Complementary metal-oxide semiconductor (CMOS)
  • Transistor-transistor logic (TTL)
  • Metal-oxide semiconductor (MOS)

A combinational circuit's output is solely determined by the present inputs, irrespective of any past input states or internal memory elements.

True (A)

In the context of implementing a full adder using exclusively NAND gates, what is the minimum number of NAND gates required, assuming only the inputs A, B, and Carry-in ($C_{in}$) are available without pre-computed complements?

  • 6
  • 9 (correct)
  • 12
  • 15

In a decoder circuit, if the number of input lines is 'n', the maximum number of output lines possible is ______.

<p>2^n</p> Signup and view all the answers

Which of the following scenarios presents a use case where a decoder followed by a multiplexer would be optimally employed over other logic circuits?

<p>Implementing a complex lookup table where inputs are sparsely populated. (C)</p> Signup and view all the answers

Given a 4-to-2 encoder with the valid-input control signal, what condition accurately represents the output when valid input is high and none of the data inputs are asserted?

<p>The output is 00, indicating the absence of any valid input. (B)</p> Signup and view all the answers

Considering a multiplexer with n selection lines, which of the following statements accurately characterises its functionality?

<p>It selects one of $2^n$ inputs and routes it to a single output. (B)</p> Signup and view all the answers

In a scenario where a de-multiplexer is used to route data from a single input line to one of eight output lines, how many selection lines are required to control the routing?

<p>3 (A)</p> Signup and view all the answers

What condition must be met for a comparator to accurately establish equality between two multi-bit numbers by comparing each bit individually using XOR gates?

<p>All XOR gate outputs must be logic 0 for the numbers to be deemed equal.</p> Signup and view all the answers

In a sequential circuit, if the current input values are known, it is always possible to determine the present and the future state without any knowledge of the past inputs.

<p>False (B)</p> Signup and view all the answers

What characteristic of a synchronous sequential circuit fundamentally distinguishes it from an asynchronous one?

<p>Synchronous circuits change state only at specific, clock-governed time instants. (B)</p> Signup and view all the answers

Why does asynchronous operation cause serious problems in digital systems where the output of one circuit is the input of several others?

<p>Asynchronous operation means that not all required inputs might be valid at the same time. (B)</p> Signup and view all the answers

The ______ of a clock signal is defined as the reciprocal of the clock frequency.

<p>period</p> Signup and view all the answers

What advantage do edge-triggered flip-flops offer over level-triggered flip-flops in complex digital circuits?

<p>Edge-triggered flip-flops provide better timing control by responding to a transition rather than a voltage level. (A)</p> Signup and view all the answers

Match the type of flip-flop with its operational characteristics:

<p>SR Flip-Flop = Has set and reset inputs; avoids S=1, R=1 condition D Flip-Flop = Transfers the input D to the output Q on the clock edge, acting as a delay element. JK Flip-Flop = Functions like an SR flip-flop, but toggles the output when J=1 and K=1 T Flip-Flop = Toggles its output state on each clock pulse if the input T is high.</p> Signup and view all the answers

Why is the SR=11 input condition avoided in a standard SR flip-flop?

<p>It results in both outputs (Q and ~Q) being set to the same value, violating the complementary nature of the outputs. (D)</p> Signup and view all the answers

In a D flip-flop configuration, the Q output will asynchronously, and without dependence on a clock, reflect a change in input D.

<p>False (B)</p> Signup and view all the answers

A register that shifts information serially for interfacing with serial I/O devices requires a ______ configuration.

<p>shift register</p> Signup and view all the answers

What design limitation primarily motivates the use of synchronous counters over asynchronous (ripple) counters in high-performance digital systems?

<p>Synchronous counters eliminate the accumulated propagation delay associated with ripple counters. (D)</p> Signup and view all the answers

In the context of memory systems, how is byte-addressability defined?

<p>Each byte of memory is assigned a unique address.</p> Signup and view all the answers

In random access memory (RAM), access time to read all memory cells depends linearly on the physical location of the memory cell in the array.

<p>False (B)</p> Signup and view all the answers

What unique characteristic defines read-only memory (ROM) in contrast to random-access memory (RAM)?

<p>ROM retains its stored data even when power is removed, making it suitable for firmware. (C)</p> Signup and view all the answers

Which customization method for ROMs involves physically altering the chip's configuration after manufacturing?

<p>PROM programming (A)</p> Signup and view all the answers

The process of permanently setting the bit pattern in a ROM during its fabrication is known as ______ programming.

<p>mask</p> Signup and view all the answers

In what scenario would using a mask-programmed ROM be most economically justifiable compared to field-programmable ROMs like PROMs or EPROMs?

<p>For mass production of devices with a fixed, well-tested code base. (B)</p> Signup and view all the answers

Once a bit pattern has been written, it can be erased and reprogrammed with electrical signals.

<p>True (A)</p> Signup and view all the answers

Which memory technology allows in-circuit electrical erasure of data?

<p>EEPROM (B)</p> Signup and view all the answers

Design a combinational circuit that takes two 2-bit binary numbers, A[1:0] and B[1:0], as input and outputs a single bit, 'Greater', which is '1' if A > B; otherwise, it is '0'. Which Boolean expression correctly implements this comparison?

<p>Greater = A[1]B[1]' + (A[1] ⊕ B[1])A[0]B[0]' (D)</p> Signup and view all the answers

Suppose a hypothetical processor employs a carry-lookahead adder comprised of multiple levels of abstraction and uses Manchester carry chains, for propagation. What significant disadvantage arises?

<p>Degradation in signal integrity due to cascading multiple levels of Manchester carry chains. (B)</p> Signup and view all the answers

What design change is required?

<p>Redesign and use a different adder (A)</p> Signup and view all the answers

A combinational logic function that uses a minimal number of gates. What is a design that achieves this that must also be scalable?

<p>Programmable Logic Arrays (PLAs) (A)</p> Signup and view all the answers

Evaluate the scenario and choose the best:

<p>For high fan-in gates, tree structures can help in lowering capacitance. (B)</p> Signup and view all the answers

To design a high-speed and complex VLSI, which methodology reduces interconnections through an algorithm and performs at a system and also offers testable elements by its design?

<p>Register-Transfer Level (RTL) Synthesis (D)</p> Signup and view all the answers

Why are sequential circuits usually less ideal than combinational circuits in highly integrated digital circuits?

<p>All of the above (D)</p> Signup and view all the answers

.Select the best answer:

<p>Caches depend on the locality during program operation. (C)</p> Signup and view all the answers

In digital design, what does the term 'setup time' refer to?

<p>The duration a data signal must be stable <em>before</em> the triggering edge of the clock. (D)</p> Signup and view all the answers

What is the primary strategic emphasis governing design decisions for digital circuits intended for deployment?

<p>Optimizing Power Consumption.</p> Signup and view all the answers

Considering only pass transistors, what issue should be focused upon?

<p>Logic degradation (B)</p> Signup and view all the answers

To create highly advanced digital circuits, different processes are used. Which combination is best to implement this?

<p>Algorithm, RTL, Gate netlist, placement/route (A)</p> Signup and view all the answers

When power-gating techniques are employed to reduce leakage in memory cells during periods of inactivity, what phenomenon poses a significant challenge to design?

<p>Data retention failure due to voltage droop during sleep mode. (C)</p> Signup and view all the answers

Flashcards

Integrated Circuit (IC)

Basic building block of digital circuits; a small silicon semiconductor crystal containing electronic components for digital gates.

Small-Scale Integration (SSI)

Contain usually less than 10 independent gates in a single package.

Medium-Scale Integration (MSI)

Contain approximately 10 to 200 gates in a single package; perform specific elementary digital functions.

Large-Scale Integration (LSI)

Contain between 200 and a few thousands gates in a single package; include digital systems such as processors, memory chips and programmable modules.

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Very-Large-Scale Integration (VLSI)

Contain thousands of gates in a single package; examples are large memory arrays and complex microcomputer chips.

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-TTL

Transistor-transistor logic

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-ECL

Emitter-coupled logic

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-MOS

Metal-oxide semiconductor.

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-CMOS

Complementary metal-oxide semiconductor

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Combinational Circuit

An interconnected set of gates whose output at any time is a function only of the input at that time.

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Half Adder

A binary addition circuit that adds two input bits to produce a 1-bit sum and a carry bit.

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Is the half adder scalable?

Can the half adder be used to build adders that can add more than two 1-bit numbers?

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Full Adder

A binary addition circuit that adds three bits (two input bits and a carry-in bit) to produce a sum bit and a carry-out bit.

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What is an adder made up of?

Full adders are connected in series.

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Decoder

Converts n inputs into 2n outputs, activating only one output line based on the input combination.

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What converts n-bit input into 2n outputs?

An n-to-2n decoder.

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Code Converter

Translates an input code word into an output bit pattern corresponding to a new code word.

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What kind of converter is a decoder?

Changes an n-bit code word into a 2n-bit code word.

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Encoders

Perform the reverse operation of decoders, converting input lines to binary number output.

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Multiplexer (MUX)

A switch that connects one of its several inputs to a single output based on control signals.

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De-multiplexer

Connects a single input to one of several outputs, controlled by select inputs.

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Comparators

Implement relational operations such as =, <, >.

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Sequential Circuit

Circuit whose output depends on both current inputs and past inputs.

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What kind of sequential circuits are there?

Two types: synchronous and asynchronous; the former changes at specific times, the latter at any time.

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How do circuits avoid timing issues?

Clock signals synchronize state changes, global timing definition.

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Rising Edge

Goes from 0 to 1.

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Falling Edge

Goes from 1 to 0.

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Clock Period

Time for one clock cycle

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Clock Rate/Frequency

Counts cycles per second.

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Flip-Flops

Storage elements employed in clocked sequential circuits; used for memory

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What does a Flip-flop do?

Binary cell capable of storing one bit.

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Flip Flop Number of Outputs

Has two outputs, one for normal, one for complement value.

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SR Flip-Flop or S-R Latch

A common flip-flop configuration with S (Set) and R (Reset) inputs.

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D Flip-Flop

A flip-flop with a single data input; used for storing one bit of data.

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J-K Flip-Flop

A versatile flip-flop with J and K inputs that can toggle the output.

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Registers

What is able to store/hold binary data?

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Shift Registers

Accepts/transfers information serially, shifting data with each clock pulse.

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Counters

The most useful category of sequential circuit?

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Asynchronous (ripple) counters.

Increment counter in series.

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Random-Access Memory (RAM)

Memory that can be accessed for information transfer from any desired random location.

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Read-Only Memory (ROM)

Memory unit that performs only the read operation; information stored is permanent.

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Study Notes

  • Integrated circuits (ICs) are the fundamental components of digital circuits
  • ICs are small silicon semiconductor crystals with electronic components for digital gates
  • Gates are interconnected inside the IC to form the required circuit
  • An IC chip is mounted in a ceramic or plastic container with thin gold wires connecting it to external pins
  • IC vendors provide catalogs with detailed descriptions of their ICs

IC Technology Advancements

  • Technology improvements have increased the number of gates that can be placed on a single IC chip
  • Small-scale integration (SSI) devices have less than 10 indepedent gates
  • Medium-scale integration (MSI) devices contain around 10 to 200 gates and performs functions like decoding and adding
  • Large-scale integration (LSI) devices have from 200 to a few thousand gates and include processors and memory
  • Very-large-scale integration (VLSI) devices contain thousands of gates like memory arrays and microcomputer chips

Digital IC Classification

  • Digital IC's are classified based on their logic operation and specific circuit technology
  • Circuit technology is referred to as a digital logic family
  • Each logic family has its own basic electronic circuit
  • The basic circuit in each technology is a NAND, NOR, or inverter gate
  • The electronic components used to construct the basic circuit dictates the technology's name
  • Popular logic families include:
    • TTL (Transistor-Transistor Logic)
    • ECL (Emitter-Coupled Logic)
    • MOS (Metal-Oxide Semiconductor)
    • CMOS (Complementary Metal-Oxide Semiconductor)
  • Integrated circuits are used to provide various digital components in computer systems

Common Combinational Circuits

  • A combinational circuit is a set of interconnected gates where the output is only dependent on the current input
  • The appearance of the input is immediately followed by the output, with only gate delays

How to Define a Combinational Circuit

  • Truth table: Lists output for each possible input combination
  • Graphical symbols: Depicts the interconnected layout of gates
  • Boolean equations: Expresses each output signal as a Boolean function of input signals
  • Combinational circuits do not use periodic clock signals nor have storage
  • There are no feedbacks involved and the output at all time is dependent on the inputs provided.
  • The name "combinational" comes from the combinations of logic gates used
  • A combinational system's output depends only on the current input
  • Combinational circuits include adders, multiplexers, demultiplexers, decoders, encoders, and comparators

Adders

  • Binary addition differs from Boolean algebra by adding a potential carry term to the result
  • Addition is the most common arithmetic operation performed by processors with hardware capable of performing addition
  • Subtraction is performed by adding the subtrahend expressed in 2s or 1s compliment to the minuend
  • Multiplication is repeated addition of multiplicand to itself by multiplier
  • Division is repeated subtraction of divisor from dividend
  • Addition can be represented in Boolean terms to produce a 1-bit sum and a carry bit
  • A half adder is a digital arithmetic circuit that adds a pair of bits

Half Adder

  • Half adders are simple, useful combinational logic circuits
  • Half adders find the sum of two bits
  • Sum can be found using the XOR operation and the carry using the AND operation
  • Adder circuits give the basic capability to perform arithmetic operations
  • A half adder adds two bits and produces a sum and carry output
  • Half adders cannot be used to add more than two 1-bit numbers

Full Adder

  • Full adders are created from half adders to process carry bits when we want to add n-bits along with a carry
  • Two half adders make a full adder
  • Set adders together so the carry from one adder is provided as input to the next
  • A full adder adds 3 bits, producing a sum and carry bit
  • Full adders can be connected in series
  • The carry bit "ripples" from one adder to another; hence, named ripple-carry adder
  • A ripple-carry adder starts its carry ripples with LSB to MSB
  • Adding two n-bit numbers requires one half-adder and n-1 full adders

Decoders

  • A decoder selects one of the output lines depending on the input pattern
  • An n-input decoder has 2n outputs
  • An encoder reverses a decoder: encoding input lines to a binary number for output
  • In an n-to-2n decoder, the n-bit input data is output to 2n outputs
  • The output line corresponding to the combination on the input lines will be 1 and all other outputs will be 0
  • The outputs are numbered from 0 to (2n - 1)
  • Decoders are useful for address decoding with an additional input line, a decoder can be used as a de-multiplexer

Code Converters

  • Code converters translate an input code word into an output bit pattern corresponding to a new code word
  • A decoder is a code converter that changes an n-bit code word into a 2n-bit code word

Encoders

  • Encoders reverse the operation of decoders
  • Encoders take input lines and generate a binary number as output
  • An encoder generates an n-bit code word as a function of the combination of values on its input.
  • At the maximum, there can be 2n inputs
  • The design of an encoder is executed by first drawing a truth table
    • It shows the n-bit output needed for each of the 2n combinations of inputs
    • The circuit diagrams are then derived for each output bit
  • The output of an encoder is valid as long as only one of the inputs is 1
  • Encoders have a way to indicate when the output is valid so that the presence of invalid inputs can be conveyed
    • This is typically done by an additional output control line
    • An enable input can be incorporated into the logic

Multiplexers

  • A multiplexer is a switch connecting one of several inputs to the output
  • The multiplexer connects multiple inputs to a single output
  • One of the inputs is selected and passed to the output at any given time
  • A set of n control/selector inputs selects one of the 2n inputs that are connected to the output
  • A 2-bit selection code is needed to select one of four possible inputs
    • This is implemented as two select lines labeled C1 and C0

4-to-1-line Multiplexer

  • Receives information from one of its input lines and directs it to a single output line
  • Selection is dependent on the data and n selection inputs
  • A multiplexer is a digital circuit that selects one of several analog or digital input signals and forwards the selected input into a single line
  • 4 line multiplexer: a total of 6 inputs for two selection inputs, four data lines, and one output
  • Multiplexers use a function table to relate data inputs and the single output as a function of the selection inputs
  • Multiplexers can be used to control signal and data routing
  • This is exemplified in loading a Program Counter with potential input

De-multiplexers

  • A de-multiplexer is the inverse function of a multiplexer;
    • Connects to only one of several outputs
    • Has only one input and several outputs
    • Connects the one input to one of the outputs depending on the combination of values on a set of control/select inputs
  • There can be a maximum of 2n outputs when there are n control signals

Comparators

  • Comparators can implement relational operations (=, <, >)
  • Comparator outputs 1 if inputs match but implementing < and > is more involved than testing equality
    • Equality is established comparing bit by bit
    • Positional weights are needed when comparing for < and >

Sequential Circuits

  • Sequential circuits based around the current and the previous input variables

  • Combinational systems makes outputs based on variable input only

  • Sequential can change its value with its current and its input

    • Has to "remember" their current state
  • Employs feedback with memory

  • Employs a periodic clock signal output, with the effect of input, and the previous output

  • Sequential output is produced in sequence- clock enables and disables functioning

  • Has feedback, employs memory elements

  • Defining feature- output depends on both input values and former

    • Property gives the “memory" of sequential circuits
  • Employs sequence of past input, and a set of state variables

    • In general, feedback feeds these variables to the input
      • Feedback is an interconnection of outputs and inputs to the input circuits
      • Can also be Flip-flops that remember, and store state information

Types of Sequential Circuits

  • Synchronous: Outputs change only at specific times
  • Asynchronous: Outputs change at any time
  • Digital circuits can operate in synchronous or asynchronous mode
    • Asynchronous circuits are independent of each other, meaning one asynchronous circuit has no bearing on time versus another
      • Asynchronous is problematic as one output circuit works on input to multiple. One is NOT viable at the same time
    • Synchronous, the circuit changes state at the precisely defined instances
      • Clock signal is the time point, which the circuit can exist. This definition specifies how fast the circuit exists

Clock Signals

  • Clock signals sequence of 1s and 0s
    • The clock at 1 state = "ON" period, 0 state = "OFF" period
  • Symmetrical or unsymmetrical
  • Clock provides Global Sync to entire system
  • Cycle gives distinct start, end, and immediate point with signal changing level

Measuring Cycles

  • When the clock is going from 0 to 1- the rising edge of the clock (positive)
  • When the clock goes from 1 to zero- the falling edge (trailing, or negative)
  • The time between the two successive rising edges is the clock cycle, the same if successive falling edges
    • It is measured in number of cycles per second, Hertz (Hz)
    • Millions of cycles per second: MHz
    • Length of clock- Clock period- Time represented by said level
  • Change of state with a clock pulse- Edge triggered, by rising/falling edge cycle -Level trigerred- Clock reaches highest, or lowest level

Flip-Flops

  • Simplest form of signal circuit
    • Storage used in clockwise, sequential circuits
    • Binary CELL capable of storing one bit of information
    • Has two outputs, value and complement
      • Maintains Binary state until directed at a clock pulse to switch states
    • Share two properties: Bistable device- two values, and when input is not present, it remains Two outputs that complement- labeled Q and Q_

S-R Flip-Flop

  • The S-R latch employs two NOR Gates in sequence to implement SET-RESET logic

  • The circuit is “bistable.”

  • In one state, the output will oscillate between HI and LOW but will eventually settle. -In another state, the output will remain stable.

  • SR Latch is very similar to the "Truth Table.“ it needs a characteristic Table displaying states + functions When BOTH HI, R and S not allowed in some models (inconsistent data where both equal 0)

  • The ""Clocked"" SR flip-flop adjusts after brief timing, due to input Referred to as the ""asynchronous operation"" Events are more synchronized to clock pulse- changes occur in the clock pulse (below depicts arrangement) R + 0 = ""NOR"" gates during the loop pulse itself

D Flip-Flop

  • The D flip-flop avoids the condition of SR = 11 input combo through one single input
  • A gate setup + characteristic table with D flip flop- non clock inputs guarantee two AND Gates in opposite each other
  • Data (D) Flip-Flop- storage for ONE bit -""The output of D: ALWAYS value -The most recent applies to input (remembers and produces the last input) -""Delay Flip Flop""- delays the clock pulse once applied

J–K Flip-Flop

  • Inputs - Like SR FF. However in case input is valid- gate implementation by JK logic - The SNO. 51 = chart by that logic for SR and D’s FF
  • Combinations are “Same” (but 3) for the SR FF’s, stable with UN-asserted input If ONLY asserted- Result = SET function, to BE one. IF ONLY-K input- result is RESET- function to be 0) Q. Which Is ONE + 1 AND J + K - = reverse (new value =0) referred as - the ""toggle function.""

Registers

  • Registers are like storage units that can hold the binary data

Shift Registers

  • A shift register operates by accepting, moving, or transferring information serially An example is a 5-bit shift construct, with clocked. With every cycle- data are shifted to the right- where bits are transferred out
  • Interface to Serial I/O Devices (Shift Registers)
    • They can perform logic, shift, function, and rotate (ALU’s) but parallel circuit is needed

Counters

  • The Counter Category- a circuit + function
    • Its number is easily added by the capacity (one is added via Modulo) -A register with a flip-flop can count TO and up for said number (power two, -1 from the value) -Clock that loads register -Designated asynchronous. or Synchronous -based on Operations -Asynchronous is slow based on flip flops triggering changes Synchronous counter can flip at the same time, so employed for CPUs

Types of Counters

  • Ripple- Asynchronus- changes increment -""Ripples"" and ""move through"", and can add JK flippys- together a diagram of operations is idealized (DOES not show propogation- just the signals to move the series -Output of the FF- is the LSB (bit value, or 0 or 1) AND is for adding by cascading/ FF more -The counter is always the increment with every pulse from when constant -Synchronous counters
    • Have the disadvantage of ""Delay""
  • CPUs + synchros can do it at the same time
  • JK FFs are to ""Label"" the ""NO-completed Output AND 3 ff-"" -Create logic/ and truth states with JK table (the first section are from a -c), and the in order of- added/ increment ""JK inputs/AND outputs"", a table for circuit + use table AND ""add"" with karnuagh MAps- a map (expression where it derived- straight forward!""

Memory

  • The memory of a computer system consists of tiny electronic switches, with each switch in one of two states: open or closed. It’s more convenient to think of states as 0 and 1 rather than Open and Closed

    • Thus
    • Each switch can represent a bit -The memory unit consists of millions of such bits, Eight bits are grouped to a byte to increase manageability A view of the computer consists of bytes with number starting with 0 -A memory is the address of said BUTE -Said address consists of two
  • Random access memory (RAM): Random access to memory cells (for transfer) if need -The name signifies process is similar regardless of locatoin -RAM is made of sequential circuit components-Communicate + data, the address selection lines, and the controls ""N = data input"", n = output line ""k address= binary number k for bits"" / and is available in the memory

  • Two controls show transfer desire. -Transfer in A ram can perform a write, a read, or in operation

ROM :ReadOnly Memory

  • A combination can do memory less circuits cause outputs can only rely with the current input; no history -The name signifies process is similar regardless of location -To access information, the info + control is required! -To write address of choice the data bit -In conclusion. it’ll take any input bit+ place in word A given input on ROM given from address lines, to ALWAYS produce the same Data out Because it happens only at the one, the ""ROM"" (picture) - a ROM CAN BE COMPLETED with decoder + or gate (or table) look at table, its TRUTH- 4 in / AND 4 OUT! With given - to give a 64Bit from ROM. Specifying with: a 4, AND with outputs from section

Types of ROM

  • In three ""Required Paths="" (rom's) it is coded in with multiple reasons Masks: 1: mask program does 1st -semiconductor last processing unit- must fill out with what it has must give. The form needs a special with instructions on a CD the manufacturer makes paths for 1 or 0, as CD provides
  • ""COST"", is the change with vendor, it's great to CUSTOM masks - ROM! the machine should economical is what its is 2: Small qualities -""programmed"". ROM:
  • A machine has intacted Fuses, for one, with Stored terms+ it BLOWN through by pulses from outputs for each address -A Blown: Equals 0 state. A machine- it, lets one programm by the ""own"" for achieve desired relationship to store terms -3: a third Rom avalible call - ERASABLE prom . restructred to ""Original"", even after fuse .when put under certain light, with the wave it discharge gates that are ""used"".
  • after it get reset - can get a re-programmed terms AND (other promos can electrical- not wave)

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