CPU Design: ALU, CU, Registers, and Processing

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Questions and Answers

Within the CPU architecture, the ______ is principally responsible for performing logical comparisons and arithmetic operations.

ALU

A processor implementing ______ appears to the operating system as having multiple logical CPUs due to the duplication of registers on a single physical core.

hyperthreading

To subtract by using the ALU, you must add a ______ number.

negative

The CPU component that stores current instructions and data for immediate access during processing is the ______.

<p>register</p> Signup and view all the answers

Unlike serial processing, ______ involves the concurrent execution of program instructions across multiple microprocessors to reduce overall processing time.

<p>parallel processing</p> Signup and view all the answers

The memory technology that employs SRAM chips, offering faster access speeds than DRAM, and is used to pre-fetch instructions for the CPU is known as ______ memory.

<p>cache</p> Signup and view all the answers

A memory module employing ______ technology synchronizes with the CPU's clock signal, minimizing wait times during data refresh cycles.

<p>SDRAM</p> Signup and view all the answers

The interval required for a component to respond to a request is quantified as ______, with lower values generally correlating to improved system responsiveness.

<p>latency</p> Signup and view all the answers

In the memory hierarchy, ______ cache interfaces directly with main memory (DRAM), holding disk blocks retrieved from local disks.

<p>L3</p> Signup and view all the answers

The practice of pushing components beyond their specified operating parameters to achieve higher clock speeds and enhanced performance is called ______.

<p>overclocking</p> Signup and view all the answers

The maximum rate at which data can be transmitted across a bus is referred to as its ______, while the actual data transfer speed considering latency is termed ______.

<p>speed, throughput</p> Signup and view all the answers

A parallel communication interface that connected components to the motherboard, replaced by point-to-point serial connections in more modern systems, is the ______.

<p>FSB</p> Signup and view all the answers

Peripheral components, such as GPUs, commonly interface with the motherboard via ______ slots, capable of independent clocking and high data transfer rates.

<p>PCI express</p> Signup and view all the answers

The computer bus interface designed for connecting mass storage devices, such as hard drives and solid-state drives, to the motherboard is ______.

<p>SATA</p> Signup and view all the answers

Modern systems utilize ______, a more advanced firmware interface than BIOS, which supports larger storage capacities, improved boot times, and enhanced graphics capabilities during startup.

<p>UEFI</p> Signup and view all the answers

Flashcards

CPU

The central processing unit, made of the ALU, CU, and Registers.

Control Unit (CU)

Controls the execution of each instruction.

Arithmetic Logic Unit (ALU)

Performs arithmetic and logical operations.

Register

Stores current instructions and data.

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Serial Processing

Processes one instruction at a time using a single core.

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Parallel Processing

Breaks instructions across multiple microprocessors to reduce processing time.

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Hyperthreading

Duplicates registers to allow two sets of instructions to run at the same time, appearing as two logical CPUs.

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Multiprocessing

Having multiple CPUs (cores) on a single CPU chip, duplicating the entire core, not just registers.

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Cache Memory

Cache memory made from Static RAM chips with faster access speed than Dynamic RAM.

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Level 1 Cache (L1)

Small, fast memory inside the CPU, same speed as CPU internal speed.

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Level 2 Cache (L2)

Slightly further than Level 1 and larger, slower access speed.

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Level 3 Cache (L3)

Found on motherboards, closer to CPU than RAM, Larger than Level 1 and Level 2 but slower than both.

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RAM

Main memory, storing currently used instructions and data, linked to the CPU.

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Latency

Time taken for a component to respond; lower latency means faster processing.

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FSB (Front Side Bus)

A parallel bus connecting the CPU and RAM to the motherboard, facilitating data transfer.

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Study Notes

CPU Design

  • The CPU comprises the Arithmetic Logic Unit (ALU), Control Unit (CU), and Registers.

Control Unit (CU)

  • The CU is responsible for controlling the execution of each instruction.

Arithmetic Logic Unit (ALU)

  • The ALU is designed to add, and subtraction needs a negative number to be added.
  • The ALU handles logical comparisons like True/False and performs general calculations.

Register

  • The Register stores the current instructions and data being processed.

Serial Processing

  • Serial processing involves processing one instruction at a time, utilizes one core, and breaks the problem into sequentially executed instructions.

Parallel Processing

  • Parallel processing entails running program instructions simultaneously on multiple microprocessors to reduce processing time.
  • Instructions are executed on different processors, such as when a user runs multiple programs concurrently.

Hyperthreading

  • A single processor chip duplicates its registers to preload the next instructions into a second set of registers.
  • This enables two sets of instructions to run concurrently, referred to as a thread.
  • Context switching between processes is hastened by removing data saving and loading times due to the appearance as two logical CPUs within one physical CPU with dual register sets.

Multiprocessing

  • Involves having multiple CPUs, referred to as cores, on a single CPU chip, which duplicates the whole core.
  • More cores allow for more parallel processes.
  • Effectiveness requires support from both the motherboard and the operating system.

Processor Cache

  • Processor speed is faster than RAM speed.
  • Cache memory is made from Static RAM (SRAM) chips with faster access speeds than Dynamic RAM (DRAM).
  • Cache memory temporarily retains pre-fetched instructions and data from RAM, anticipating their next use by the CPU.
  • Level 1 (L1) cache is a small memory inside the CPU that operates at the same speed as the CPU's internal speed.
  • Level 2 (L2) cache is larger than L1, located slightly further away, and operates at half the CPU's internal speed between the CPU and RAM.
  • Level 3 (L3) cache is found on motherboards, is larger, slower than L1/L2 and closer to the CPU than RAM.
  • The CPU searches for information in the order of L1, then L2, then L3, and slowest from RAM.
  • L3 cache's purpose is dependent on the CPU's design.
  • Cache memory stores data for quicker future access, resulting in a cache hit when data is found. A cache miss transpires when data isn't in the cache.

RAM (Random Access Memory)

  • RAM exists as chips on modules plugged into dedicated slots.
  • RAM stores currently used programs and data linked to it.
  • DDR (Double Data Rate) is a commonly used type of RAM.
  • DRAM is dynamic RAM and is the chip used for memory.
  • SDRAM synchronizes RAM chips with the CPU, eliminating wait times during refreshing, which allows for faster CPU instruction feeding.
  • DDR transfers data twice as fast per clock pulse compared to single data rate transfers..
  • Faster RAM speed leads to quicker instruction delivery to the cache.

Latency

  • Latency measures the time it takes for a component to respond; RAM has varied latency, which can cause wasted clock ticks.
  • Fewer clock ticks indicate a faster processor.

Types of Memory

  • L0: registers hold words retrieved from cache.

  • L1: on-chip L1 cache holds cache lines retrieved from L2 cache.

  • L2: off-chip L2 cache holds cache lines retrieved from memory.

  • L3: main memory (DRAM) holds disk blocks retrieved from local disks.

  • L4: local secondary storage (local disks) hold files retrieved from remote network servers.

  • L5: remote secondary storage (distributed file systems, Web servers)

  • Storage devices are larger, slower, and cheaper as you go down the list. The reverse is true they are smaller, faster and more costly.

Motherboard

  • Connects different circuits.
  • Provides communication between components.
  • Provides power.

System Clock

  • Overclocking increases component speeds beyond their specified limits.
  • Per component overclocking increases the CPU speed relative to the system clock, by changing the clock multiplication factor.
  • The whole system overclocking increases the system clock speed and is applied to all components that use and multiply the system clock.

Clocking Multiplication

  • Clocking multiplication involves increasing the system clock to raise a component's frequency through overclocking and increasing the clock multiplier.

Cooling

  • Methods include Fans, Liquid Cooling, and Heat Sinks.

Speed vs Throughput

  • Speed/bandwidth (theoretical speed) is measured in Megabits per second (Mbps), which indicates the bus's maximum speed.
  • Due to latency, throughput/actual data speed, is often reduced.

Front Side Bus (FSB)

  • FSB is a parallel bus that connects components to the motherboard.
  • FSB connections replaced the point-to-point serial connections in other connections.
  • Typically connects the CPU and RAM.
  • A data bus transfers actual instructions/data between the CPU and RAM.
  • An address bus transfers physical addresses of data between the CPU and RAM.
  • Control buses manage commands between the CPU and RAM, essentially sending/reading signals.

External Buses

  • PCI Express slots connect graphic cards.
  • The number of slots available depends on the motherboard.
  • These slots have independent clocks, preventing dependence on the front-side bus for timing.
  • SATA is a computer bus interface used to connect mass storage devices like hard drives to a computer's motherboard.
  • SATA I speed is 1.5GHz with a throughput of 150MB/s.
  • SATA II speed is 3GHz with a throughput of 300MB/s.
  • SATA III speed is 3GHz with a throughput of 600MB/s.
  • USB connects peripherals to the computer for communication and power.
    • USB 1.0 (Low-Speed): 1.5 Mbps
    • USB 1.1 (Full-Speed): 12 Mbps
    • USB 2.0 (Full-Speed): 480 Mbps
    • USB 3.0 (SuperSpeed): 5 Gbps
    • USB 3.1 (SuperSpeed): 10 Gbps
  • NVMe connects SSDs to the motherboard and enables higher speed read/write operations via SATA communication bus.
  • The M.2 format is for installing high-speed, low-power devices in small spaces.

Secondary Storage

  • Cloud storage is remote storage on an external server for access from any device.
  • Size determines the amount of remote storage, where more storage results in higher costs.
  • Speed measures the time for accessing a service provider's server over the internet.
  • Cost is determined by the amount of cloud storage used, billed annually or monthly.

Other Types of Caching

  • Disk Cache is hardware that speeds up disk read/write times and can be kept in general RAM.
  • Browser Cache stores website copies accessed on the local hard drive, including downloaded web files.
  • Web Cache stores recently accessed web pages on a network server with the most recently downloaded pages.
  • The first network request to a webpage accesses the internet and then stores a copy in the proxy server's cache.
  • Subsequent access from a user accesses the web page from the browser if conditions are met.

System Software

Start Up and Boot Software

  • During computer startup, hardware devices are initialized.
  • Passed to RAM after initial checks, which leads to a boot sequence.
  • The bootloader performs the boot sequence and loads the operating system.

BIOS (Basic Input/Output System)

  • It is firmware on the ROM chip that uses nonvolatile memory, and loads the OS.
  • The Power-On-Self-Test (POST) checks the hardware.
  • An inventory is obtained from the Complementary Metal-Oxide Semiconductor (CMOS).
  • Hardware is tested for proper function, the Master Boot Record (MBR) is located on the hard drive and then loads and runs the OS kernel.

Kernel

  • Core of the OS in RAM, the kernel handles input/output requests from software, translating them into instructions for the CPU.
  • It also manages memory and peripherals like keyboards and monitors.

CMOS

  • Volatile memory that stores hardware and user settings, including hardware installed and the current date and time settings.
  • The BIOS accesses it during the boot process to obtain data.

UEFI (Unified Extended Firmware Interface)

  • UEFI is used by modern computers for efficient system startups.
  • New hardware with UEFI is needed , as it is not interchangable.
  • It can boot from drives larger than 2.2TB
  • It can run in 32-bit or 64-bit mode.
  • It has more address space, resulting in faster boot process and user-friendly features like graphics and cursor support.

Interrupts

  • Signals sent to the CPU from hardware or software indicate a need for attention.
  • Interrupts can be generated by either hardware or software.

Software Interrupts

  • Generated by programs during events like division by zero or I/O requests.
  • This can occur when a process has used its allocated CPU cycles.

Hardware Interrupts

  • Signals from a device (e.g., keyboard key press, printer out of paper).
  • When the CPU receives an interrupt, it pauses the current task to execute the interrupt handler program based on priority.

IRQ (Interrupt Request)

  • Each device possesses a unique IRQ for identification by the CPU during interrupts, found in the Device Manager on Windows.

I/O Range

  • Act as a buffer, or a temporary storage area in RAM, to accelerate slow I/O devices.
  • A complete file may load into a buffer in memory, giving the CPU faster data access.

Processing Techniques

  • Designed to optimize computer system efficiency through multitasking and multithreading.

Multitasking

  • Allows the OS to run many programs concurrently. The system suspends or interrupts a task when it can't use the processor, freeing the processor for use by another.
  • Multiple RAM-stored programs are processed with short bursts of CPU time.
  • Os uses process scheduling for fair CPU time distribution.

Multithreading

  • It allows a program to run several different threads (parts of a program that run independently) simultaneously such as navigating one website while another downloads in a web browser.
  • Hyperthreading from Intel allows processors to run two instruction threads simultaneously through two register sets on the CPU.
  • Multithreading is when more than one task in the same program can be executed at the same time.

Virtual Memory

  • Enlarges the addressable memory by using swapping pages between RAM and hard disk.
  • A slower device is used when the faster RAM runs out of space.
  • Is used by most apps use a GUI.

Translator

  • A programming tool that converts code into another form, such as translating source code into machine code.
  • These are compilers, assemblers or interpreters.
  • Most programming languages are text-based.

High-Level Languages

  • Abstract the computer's workings, making them user-friendly.
  • Python, Delphi, and Java are examples.

Low-Level Languages

  • Closely mirror machine language.
  • Machine language: binary code of 1s and 0s.
  • Assembly code is one machine language instruction but with readable notation.
  • Assembly is more readable than machine code.

IDEs (Integrated Development Environments)

  • Offer editing features like code completion and error checking during programmer designs.

Interpreters

  • Read, convert to machine code, and execute each program line, discarding the machine code afterward, and re-interpreting with each execution.

Compilers

  • Transform compiled languages into executable forms before execution.

Machine Code Generation

  • Compilers create a machine-specific object code file from source code that can only execute on the compiled machine,. Delphi compiles into .exe files which can only be run on Windows..

Intermediate Representations

  • Languages are compiled into bytecode (an intermediate representation) so that bytecode does not need to re-read the source file to execute.
  • Bytecode must be interpreted for execution.
  • Java uses .class bytecode files that interpreted in the Java Virtual Machine.

Machine Cycle

  • Consists of four stages:
    1. FETCH: Retrieve instruction from RAM.
    2. DECODE: Understand the instruction using the CPU's instruction set.
    3. EXECUTE: Perform the instruction, using data if necessary.
    4. STORE: Save result in main memory or an output device.
  • The CPU only stores current instructions and the CU sends read/write signals to memory to fetch data.
  • The instructions are broken down and stored temporarily in registers.
  • The accumulator is a register in the ALU that stores results for RAM storage. The data get loaded from ram into the accumulator if data is loaded.

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