CPU Architecture: The Fetch-Execute Cycle

CPU Architecture

The Fetch-Execute Cycle

• A sequence of steps that a CPU performs to execute instructions:
  1. Fetch: Retrieve an instruction from memory
  2. Decode: Decode the instruction into a format the CPU can understand
  3. Operate: Execute the instruction (perform calculations, move data, etc.)
  4. Store: Store the results of the instruction
  5. Repeat: Fetch the next instruction

Common CPU Components and their Function

• Control Unit:
  • Retrieves and decodes instructions
  • Generates control signals for other components
• Arithmetic Logic Unit (ALU):
  • Performs mathematical and logical operations (e.g., addition, subtraction, AND, OR)
• Registers:
  • Small amount of on-chip memory for storing data temporarily
  • Examples: accumulator, index register, stack pointer
• Instruction Register (IR):
  • Holds the current instruction being executed
• Program Counter (PC):
  • Holds the memory address of the next instruction to be fetched

Von Neumann Architecture

• A design model for CPUs that combines the program and data in a single memory space
• Key features:
  • Single Bus: A single bus is used for both data and instructions
  • Memory Hierarchy: A hierarchical organization of memory, with registers at the top and main memory at the bottom
  • Fetch-Execute Cycle: The CPU executes instructions sequentially, using the fetch-execute cycle
• Advantages:
  • Simplified CPU design
  • Easier to implement and program
• Disadvantages:
  • Bottleneck in the single bus can limit performance
  • Memory access can be slow due to the hierarchical organization

CPU Architecture

The Fetch-Execute Cycle

• The CPU performs a sequence of steps to execute instructions: fetch, decode, operate, store, and repeat.
• Fetch: Retrieves an instruction from memory.
• Decode: Translates the instruction into a format the CPU can understand.
• Operate: Executes the instruction, performing calculations, moving data, etc.
• Store: Stores the results of the instruction.
• Repeat: Fetches the next instruction.

CPU Components and their Functions

Control Unit

• Retrieves and decodes instructions.
• Generates control signals for other components.

Arithmetic Logic Unit (ALU)

• Performs mathematical and logical operations (e.g., addition, subtraction, AND, OR).

Registers

• Small amount of on-chip memory for storing data temporarily.
• Examples: accumulator, index register, stack pointer.

Instruction Register (IR)

• Holds the current instruction being executed.

Program Counter (PC)

• Holds the memory address of the next instruction to be fetched.

Von Neumann Architecture

• A design model combining the program and data in a single memory space.
• Key Features:
  • Single Bus: A single bus is used for both data and instructions.
  • Memory Hierarchy: A hierarchical organization of memory, with registers at the top and main memory at the bottom.
  • Fetch-Execute Cycle: The CPU executes instructions sequentially, using the fetch-execute cycle.
• Advantages:
  • Simplified CPU design.
  • Easier to implement and program.
• Disadvantages:
  • Bottleneck in the single bus can limit performance.
  • Memory access can be slow due to the hierarchical organization.

Understand the fundamental steps of the CPU's instruction execution process and the roles of common CPU components.