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Questions and Answers
What is the main difference between DRAM and SRAM?
What is the main difference between DRAM and SRAM?
What is the purpose of the Memory Address Register (MAR) in a computer system?
What is the purpose of the Memory Address Register (MAR) in a computer system?
Which type of memory is best suited for permanently storing software that is not expected to change?
Which type of memory is best suited for permanently storing software that is not expected to change?
What is the primary function of the Fetch stage in the Fetch-Execute cycle?
What is the primary function of the Fetch stage in the Fetch-Execute cycle?
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If a computer system has a 16-bit MAR, what is the maximum memory address it can access?
If a computer system has a 16-bit MAR, what is the maximum memory address it can access?
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What is the function of a bus's data width in bits?
What is the function of a bus's data width in bits?
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Which type of bus connection involves a single source sending data to a single destination?
Which type of bus connection involves a single source sending data to a single destination?
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Identify the type of data transmission where data can flow in both directions, but only one way at a time.
Identify the type of data transmission where data can flow in both directions, but only one way at a time.
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What is the difference between a parallel bus and a serial bus?
What is the difference between a parallel bus and a serial bus?
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Which of the following is NOT a characteristic of a bus?
Which of the following is NOT a characteristic of a bus?
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What is the term used to describe the data transfer rate of a bus?
What is the term used to describe the data transfer rate of a bus?
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Which of the following defines the maximum number of devices that can be connected to a bus?
Which of the following defines the maximum number of devices that can be connected to a bus?
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Which of the following instructions is responsible for transferring the address from the PC to the MAR?
Which of the following instructions is responsible for transferring the address from the PC to the MAR?
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What is the purpose of the instruction 'MDR IR'?
What is the purpose of the instruction 'MDR IR'?
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Which instruction performs the addition operation in the ADD Fetch/Execute Cycle?
Which instruction performs the addition operation in the ADD Fetch/Execute Cycle?
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What is the primary difference between the MDR instruction in the LOAD Fetch/Execute Cycle and the STORE Fetch/Execute Cycle?
What is the primary difference between the MDR instruction in the LOAD Fetch/Execute Cycle and the STORE Fetch/Execute Cycle?
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Which of the following instructions would be used to update the Program Counter after each instruction is executed?
Which of the following instructions would be used to update the Program Counter after each instruction is executed?
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What is the purpose of the 'PC + 1 PC' instruction in the "SUBTRACT" and "IN" operations?
What is the purpose of the 'PC + 1 PC' instruction in the "SUBTRACT" and "IN" operations?
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Which operation does not involve loading the value of the Program Counter (PC) into the Memory Address Register (MAR)?
Which operation does not involve loading the value of the Program Counter (PC) into the Memory Address Register (MAR)?
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What happens in the 'IN' operation after the instruction is loaded into the Instruction Register (IR)?
What happens in the 'IN' operation after the instruction is loaded into the Instruction Register (IR)?
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What is the primary purpose of the 'HALT' instruction in the context of the "LMC Fetch/Execute" process?
What is the primary purpose of the 'HALT' instruction in the context of the "LMC Fetch/Execute" process?
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What is the role of the 'BRANCH on Condition' operation in the "LMC Fetch/Execute" process?
What is the role of the 'BRANCH on Condition' operation in the "LMC Fetch/Execute" process?
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What is the role of the 'BUS' in a computer system, as described in the content?
What is the role of the 'BUS' in a computer system, as described in the content?
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Which of the following is NOT a type of signal that might travel on a 'BUS'?
Which of the following is NOT a type of signal that might travel on a 'BUS'?
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Which of the following is a characteristic of a 'BUS' as described in the content?
Which of the following is a characteristic of a 'BUS' as described in the content?
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Flashcards
MAR
MAR
Memory Address Register; holds the address of the data to be accessed.
Volatile Memory
Volatile Memory
Memory that requires power to maintain stored information; it loses data when power is off.
Fetch-Execute Cycle
Fetch-Execute Cycle
The process of fetching an instruction from memory and executing it.
RAM vs. ROM
RAM vs. ROM
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Cache Memory
Cache Memory
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MDR (Memory Data Register)
MDR (Memory Data Register)
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PC (Program Counter)
PC (Program Counter)
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MAR (Memory Address Register)
MAR (Memory Address Register)
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IR (Instruction Register)
IR (Instruction Register)
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Accumulate Operation
Accumulate Operation
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Program Counter (PC)
Program Counter (PC)
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PC + 1
PC + 1
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LMC Fetch/Execute Cycle
LMC Fetch/Execute Cycle
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Instruction Register (IR)
Instruction Register (IR)
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Branch Instruction
Branch Instruction
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Bus in Computer Systems
Bus in Computer Systems
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Bus Characteristics
Bus Characteristics
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Throughput
Throughput
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Bus Types
Bus Types
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Simplex
Simplex
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Half Duplex
Half Duplex
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Full Duplex
Full Duplex
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Point-to-Point Bus
Point-to-Point Bus
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Study Notes
CPU and Memory
- The CPU has components like the ALU (arithmetic logic unit) and CU (control unit).
- The ALU performs calculations and comparisons.
- The CU performs the fetch-execute cycle.
- The CU controls the movement of data from the CPU registers and other hardware components.
- The CU manages fetching instructions and data from memory.
- Memory management unit manages this.
- Sometimes the I/O Interface is combined with the memory management unit as a Bus Interface Unit.
Topics Covered
- CPU Components
- The Concept of Registers
- The Memory Unit
- Fetch-Execute Cycle
- Buses
- Instructions and Word Formats
Learning Objectives
- Describe the structure, components, and functions of a computer system.
Key Terms
- instruction cycle
- linear memory addressing
- Little Man Computer (LMC)
- mnemonics
- op code
- stored program concept
- von Neumann architecture
CPU: Major Components
- ALU (arithmetic logic unit) performs calculations and comparisons.
- CU (control unit) performs the fetch-execute cycle; accesses program instructions and issues commands to the ALU, moves data to and from CPU registers and other hardware components.
- Subcomponents: memory management unit supervises fetching instructions and data; I/O Interface (sometimes combined with memory management as bus interface unit).
System Block Diagram
- Shows the CPU, ALU, memory, I/O interface, and control unit (with program counter).
The Little Man Computer (LMC)
- A simplified model of a computer.
- The model consists of an ALU, control unit, memory (with memory addresses), and I/O interface.
Concept of Registers
- Small, permanent storage locations inside the CPU.
- Used for specific purposes.
- Manipulated directly by the control unit.
- Wired to perform specific functions.
- Hold data, addresses, or instructions (not in MB).
Use of Registers
- Scratchpad for currently running program.
- Holds data frequently needed.
- Stores information on the CPU and currently running program's status.
- Stores the next program instruction's address.
- Receives signals from external devices.
- General-purpose registers: hold intermediate results or data values (e.g, loop counters).
- Equivalent to a calculator in an LMC.
Special-Purpose Registers
- Program Count Register (PC) or instruction pointer: Stores the address of the next instruction to be fetched.
- Instruction Register (IR): Stores the instruction fetched from memory.
- Memory Address Register (MAR): Holds the memory address to be accessed.
- Memory Data Register (MDR): Temporarily stores data read from or written to memory.
- Status Registers: Holds flags (one-bit Boolean variables), indicating conditions like arithmetic carry/overflow, power failure, or internal computer error.
Register Operations
- Stores values from other locations (registers and memory).
- Performs addition and subtraction.
- Shifts or rotates data.
- Tests contents for conditions (e.g, zero or positive).
Operation of Memory
- Each memory location has a unique address.
- The address from an instruction is copied to the MAR.
- The CPU determines if it's a store or a retrieval operation.
- Transfer takes place between the MDR and memory.
- MDR is a two-way register.
Relationship between MAR, MDR, and Memory
- Shows the connection between the memory address register (MAR), memory data register (MDR), and memory.
- Addresses and data are transferred between registers and memory.
MAR-MDR Example
- An example illustration of how the MAR and MDR work together to access memory locations.
Visual Analogy of Memory
- A visual representation of how the MAR and MDR access memory locations, showing the address lines, and the memory location.
Individual Memory Cell
- A diagram representing how data is written and read from an individual memory cell based on address lines and read/write lines.
Memory Capacity
- Determined by the number of bits in the MAR and the size of the address portion of the instruction.
- Example: 4 bits allows 16 locations, 8 bits 256, and 32 bits 4,294,967,296 (4 GB).
RAM
- Random access memory (DRAM, SRAM).
- DRAM: the most common, economical, but must be refreshed (recharged with power) thousands of times per second.
- SRAM: faster but more expensive than DRAM, in cache memory for high-speed memory access.
Nonvolatile Memory
- ROM (read-only memory): holds software not expected to change throughout the system's lifetime.
- EEPROM (electrically erasable programmable ROM).
- Flash Memory: faster than disks, uses hot carrier injection. Slow rewrite time but is useful for nonvolatile storage (e.g. portable devices).
Fetch-Execute Cycle
- Two-cycle process, because both instructions and data are in memory.
- Fetch: Decodes instruction, loads it from memory to a register, and signals the ALU.
- Execute: Performs the operation needed by the instruction, moves/transforms data.
LMC vs. CPU Fetch and Execute Cycle
- A comparison showing steps followed in executing instructions, using the Little Man Computer (LMC) analogy.
Load Fetch/Execute Cycle
- Steps to load data from memory to the accumulator.
-
- PC to MAR. 2. MDR to IR. 3. IR[address] to MAR. 4. MDR to A. 5. PC + 1 to PC
Store Fetch/Execute Cycle
- Steps for storing data from the accumulator to memory.
-
- PC → MAR. 2. MDR → IR. 3.IR [address] → MAR. 4. A → MDR. 5. PC +1 → PC
ADD Fetch/Execute Cycle
- Steps involved in adding data from MDR to accumulator.
-
- PC → MAR. 2. MDR → IR. 3. IR[address] → MAR 4. A + MDR → A. 5. PC + 1 → PC.
LMC (Little Man Computer) Fetch/Execute
- Shows how the LMC performs operations (SUBTRACT, BRANCH, and HALT).
Bus
- Physical connection enabling data transfer between locations in the computer system.
- A group of conductors (electrical/optical).
- Four kinds of signals: data, addressing, control signals, and power (sometimes).
Bus Characteristics
- Number of conductors.
- Data width carried simultaneously.
- Addressing capacity.
- Signal lines.
- Throughput rate (bits/second).
- Distance between endpoints.
- Supported attachments.
- Needs (type and purpose).
- Features and capabilities.
Bus Categorizations
- Parallel vs. Serial buses.
- Transmission Direction (Simplex, Half Duplex, Full Duplex).
- Interconnection Methods (Point-to-point, Multipoint).
Parallel vs. Serial Buses
- Parallel: high throughput because all bits transmit simultaneously, but are expensive and vulnerable to interference. They are suitable for short distances such as within the CPU and motherboard.
- Serial: transmit one bit at a time, less expensive, and less prone to interference; they are suitable for longer distances.
Point-to-point vs. Multipoint
- Point-to-point: single source to a single destination, like connecting a modem to a computer.
- Multipoint: shared among multiple devices for broadcast purposes, such as Ethernet.
Classification of Instructions
- Data Movement: copying data between memory and registers.
- Arithmetic: performing calculations.
- Boolean Logic: performing Boolean operations (AND, OR, NOT).
- Single Operand Manipulation: performing operations on single operands.
More Instruction Classifications
- Bit manipulation.
- Program control.
- Stack instructions.
- Multiple data instructions.
- I/O and machine control.
Register Shifts and Rotates
- Types of shifts and rotates, such as logical shift left, rotate right, and arithmetic right shifts.
Program Control Instructions
- Jump and Branch: changing the order in which instructions are executed.
- Subroutine Call and Return: allow the code to be reused repeatedly.
Stack Instructions
- LIFO (Last In, First Out)
- Instructions for adding and removing items from a stack.
Block of Memory as a Stack
- Describes the concept of a stack using blocks of memory.
- PUSH instructions increment the stack pointer, then store data.
- POP loads data, then decrements the stack pointer
Multiple Data Instructions
- SIMD (Single Instruction, Multiple Data): A way to perform a single operation on multiple data elements simultaneously, useful for multimedia and vector/array processing.
Multiple Data Instructions
- OPCODE: the task the instruction is to perform.
- Source Operand(s): location of the data used in the operation.
- Result Operand: the place where the result of the operation is stored.
Instruction Format
- Machine-specific template that specifies the op code's length.
- The number of operands' length.
- Examples (such as simple 32 bit instruction format, showing op code and address fields).
Instructions
- Direction given to a computer
- Causes signals to be sent through specific circuits for processing.
- Set of instructions that define functions performed by the processor, and differentiates computer architecture based on various factors.
Instruction Word Size
- Fixed vs. variable size instructions.
- Most current architectures using 32-bit or 64-bit words.
- Addressing modes (direct, register deferred).
Instruction Format Examples
- Various instruction formats from different processors (with different definitions for fields and sizes).
Quick Review Questions
- Covers concepts in the instruction cycle, von Neumann architecture, memory types, register functions, similarities in the fetch-execute cycle between the LMC and actual computer, and other related topics.
Summary
- Describes the Little Man Computer as a model for simulating computer functions.
- Includes mailboxes, calculator, counter, and input/output baskets.
- How does the LMC meet the requirements of von Neumann architecture.
- Operations supported by the LMC instructions.
Q&A
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- Indicates the next topic to be covered in relation to Computer Science in the following sections.
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Description
Test your knowledge of computer memory types and data transmission concepts with this quiz. Questions cover essential topics such as DRAM vs. SRAM, the role of the Memory Address Register, and various bus configurations. Perfect for students looking to deepen their understanding of computer architecture.
