Computer Logic Gates and Architecture Quiz

Logic Gates

• OR Gate: Outputs a 1 if either input A or input B is 1, or both are 1
• AND Gate: Outputs a 1 only if both input A and input B are 1.
• XOR Gate: Outputs a 1 if either input A or input B is 1, but not both.
• NOT Gate: Inverts the input signal, outputting a 1 if the input is 0 and a 0 if the input is 1.
• NAND Gate: Outputs a 0 only if both input A and input B are 1, and outputs a 1 otherwise.

Computer Architecture

• CPU Busses: Address Bus, Data Bus, Control Bus
• Control Unit Functions: Fetching instructions, decoding instructions, sequencing operations
• Von Neumann Architecture Concepts: Instructions and data share the same memory space, sequential execution of instructions, single address space for both instructions and data.
• RISC Architecture: Instruction per cycle, Register to register operations
• CPU Operation Cycles: Fetch, Decode, Execute, Write Back

Peripherals

• Frequency Modulation (FM) Encoding: 0 is encoded as a low frequency signal, 1 is encoded as a high frequency signal.
• Modified Frequency Modulation (MFM) Encoding: 0 is encoded as a transition in the middle of the bit period, 1 is encoded as a transition at the start of the bit period.
• Concentric rings on a hard disk platter: Tracks
• Wedge of a concentric ring: Sector
• Device copying data from (or to) a peripheral device: Direct Memory Access (DMA) controller
• Alternative method of data transfer where CPU copies data: Programmed I/O
• Port mapped I/O Disadvantage: Limited address space and potential conflicts with peripheral addresses.
• Memory mapped I/O Disadvantage: Additional memory space required for device addresses.

Assembly Language

• LDA #$0D addressing mode: Immediate addressing
• Value of A after LDA #$0D: $0D
• LDY $0D addressing mode: Zero page addressing
• Value of Y after LDY $0D: $OD
• LDY $(000F), X addressing mode: Indexed indirect addressing
• Value of Y after LDY $(000F), X: $55
• CLC before ADC: Used when you want to add two numbers without carrying over from a previous operation.
• No CLC before ADC: If you want to maintain the carry flag from a previous addition.

Operating System Concepts

• Operating System (OS) manages: Resources of the computer like the CPU, memory, and peripherals, and provides services to users and applications.
• Two spaces of the CPU: Kernel Space, User Space
• Kernel Space: CPU has full privilege to access resources.
• User Space: CPU cannot directly access resources without permission from the Kernel.
• Processes issue requests to the Kernel: System calls
• Three sections of a process memory layout: Text segment, Data segment, Stack segment
• Process management data structure: Process Control Block (PCB)
• Shared resources of a thread: Text Segment, Data Segment
• Terminate a process: Signal
• Terminated child process with a live parent process: Zombie
• Multiple accesses to shared data: Race Condition
• High-level synchronization construct: Semaphore
• Deadlock conditions: Mutual exclusion, Hold and wait, No preemption, Circular wait.
• CPU unit responsible for address translation: Memory Management Unit (MMU)
• Insufficient contiguous memory: Fragmentation
• UNIX system calls to launch another program: fork() and exec()
• Page table cache in CPU: Translation Lookaside Buffer (TLB)
• Trap occurring on access to invalid page: Page Fault
• File system data retrieval/modification system calls: open(), read(), write(), close()
• Delegating I/O tasks to a special-purpose processor: DMA (Direct Memory Access)
• Kernel module that understands device hardware: Device Driver

Semaphore Implementation

// setup.This is guaranteed to be run exactly once, before anything else.void setup() {
  // YOUR CODE HERE
  init(s, 1); // Initialize semaphore with value 1 
}
  
int counter = 0;
void incrementCounter() {
  // YOUR CODE HERE
  wait(s); // Acquire the semaphore
  counter = counter + 1;
  signal(s); // Release the semaphore
}

void decrementCounter() {
  // YOUR CODE HERE
  wait(s); // Acquire the semaphore
  counter = counter - 1;
  signal(s); // Release the semaphore 
}

Compare-And-Swap Instruction

• CAS(o, a, n): Atomically compares the value of a memory location (o) with an expected value (a), and if they match, updates the memory location with a new value (n).

Paging System

• CPU*

• Page Table*

Page Replacement Algorithms

• FIFO Page Replacement Algorithm: The page that has been in memory the longest is replaced. The sequence results in 11 page faults
• LRU Page Replacement Algorithm: The least recently used page is replaced. The sequence results in 10 page faults.

Indexed Allocation

• The largest file that can be stored: 12 direct pointers * 4096 bytes + 4096 bytes * 1024 pointers = 4,194,304 bytes + 4,194,304 * 1024 bytes

Test your knowledge on logic gates, computer architecture, and peripheral concepts. This quiz covers the functions of various gates and the principles of CPU operations within different architectures, including Von Neumann and RISC. Get ready to challenge yourself and see how much you know about these fundamental computing concepts!