Computer Architecture Lecture 6 & 7: Cache Memory Mapping

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What is a disadvantage of direct mapping?

Fixed location for a given block

What is the purpose of the tag in a cache?

To uniquely identify a block of main memory

What is an advantage of associative mapping?

Flexibility in block replacement

What is the purpose of the word identifier in a memory address?

To identify the word position within a block Signup and view all the answers

What is a disadvantage of associative mapping?

Complex circuitry required Signup and view all the answers

What is the purpose of the block identifier in a memory address?

To uniquely identify the block within a line of the cache Signup and view all the answers

What is the purpose of the cache control logic?

To examine every line's tag for a match Signup and view all the answers

What is an advantage of direct mapping?

Simple and inexpensive implementation Signup and view all the answers

What is the primary reason for implementing a mapping function in cache memory?

Because there are fewer cache lines than main memory blocks Signup and view all the answers

Which of the following mapping techniques maps each block of main memory into only one possible cache line?

Direct mapping Signup and view all the answers

How many fields can a main memory address be divided into for direct mapping?

Three fields Signup and view all the answers

What do the least significant w bits of a main memory address identify?

Unique word within a block Signup and view all the answers

What is the main advantage of using direct mapping in cache memory?

It is the simplest mapping technique to implement Signup and view all the answers

What is the primary limitation of direct mapping in cache memory?

It maps each block of main memory into only one possible cache line Signup and view all the answers

What is the characteristic of a 2-way associative mapping?

A given block can be in one of 2 lines in only one set Signup and view all the answers

What is the purpose of the dirty bit in write back cache?

To indicate when a block is updated Signup and view all the answers

What is a disadvantage of the write through cache technique?

It slows down writes Signup and view all the answers

What is the purpose of the LRU cache replacement technique?

To replace the block that has had the least used Signup and view all the answers

What happens when a block is to be replaced in a write back cache?

The block is written to main memory only if the dirty bit is set Signup and view all the answers

What is the formula for the number of addressable units in a cache?

2s + w words or bytes Signup and view all the answers

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Cache Memory Mapping

Three techniques can be used for mapping main memory blocks into cache lines: Direct, Associative, and Set-Associative.
Direct Mapping:
- Maps each block of main memory into only one possible cache line.
- Each block of main memory maps into a unique line of the cache.
- The mapping function is easily implemented using the main memory address.
- Each main memory address can be divided into three fields:
  - Least Significant w bits identify unique word within a block.
  - Remaining bits (s) specify which block in memory, divided into two fields:
    - Least significant r bits identify which line in the cache.
    - Most significant s-r bits uniquely identify the block within a line of the cache.
- Advantages: Simple, Inexpensive.
- Disadvantages: Fixed location for a given block, high cache misses (thrashing) if two blocks that map to the same line are repeatedly accessed.

Associative Mapping

Permits each main memory block to be loaded into any line of the cache.
The cache control logic interprets a memory address as a Tag and a Word field.
The Tag field uniquely identifies a block of main memory.
To determine whether a block is in the cache, the cache control logic must simultaneously examine every line's tag for a match.
Advantages: Flexibility in replacing blocks when a new block is read into the cache.
Disadvantages: Complex circuitry required to examine the tags of all cache lines in parallel.

Set-Associative Mapping

Cache is divided into a number of sets, each containing a number of lines.
A given block maps to any line in a given set.
Example: 2 lines per set (2-way associative mapping), a given block can be in one of 2 lines in only one set.

Cache Memory Replacement

Techniques:
- No choice: Replace the line that a block maps to.
- Least Recently used (LRU): Replace the block that has been used least recently.
- First in first out (FIFO): Replace the block that has been in the cache longest.
- Least frequently used: Replace the block that has been used least frequently.
- Random: Replace a block randomly.
Write policies:
- Write Through: All writes go to main memory as well as cache.
- Write Back: Write initially made in cache only, with a dirty bit set when an update occurs.