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What is a disadvantage of direct mapping?
What is a disadvantage of direct mapping?
What is the purpose of the tag in a cache?
What is the purpose of the tag in a cache?
What is an advantage of associative mapping?
What is an advantage of associative mapping?
What is the purpose of the word identifier in a memory address?
What is the purpose of the word identifier in a memory address?
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What is a disadvantage of associative mapping?
What is a disadvantage of associative mapping?
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What is the purpose of the block identifier in a memory address?
What is the purpose of the block identifier in a memory address?
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What is the purpose of the cache control logic?
What is the purpose of the cache control logic?
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What is an advantage of direct mapping?
What is an advantage of direct mapping?
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What is the primary reason for implementing a mapping function in cache memory?
What is the primary reason for implementing a mapping function in cache memory?
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Which of the following mapping techniques maps each block of main memory into only one possible cache line?
Which of the following mapping techniques maps each block of main memory into only one possible cache line?
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How many fields can a main memory address be divided into for direct mapping?
How many fields can a main memory address be divided into for direct mapping?
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What do the least significant w bits of a main memory address identify?
What do the least significant w bits of a main memory address identify?
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What is the main advantage of using direct mapping in cache memory?
What is the main advantage of using direct mapping in cache memory?
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What is the primary limitation of direct mapping in cache memory?
What is the primary limitation of direct mapping in cache memory?
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What is the characteristic of a 2-way associative mapping?
What is the characteristic of a 2-way associative mapping?
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What is the purpose of the dirty bit in write back cache?
What is the purpose of the dirty bit in write back cache?
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What is a disadvantage of the write through cache technique?
What is a disadvantage of the write through cache technique?
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What is the purpose of the LRU cache replacement technique?
What is the purpose of the LRU cache replacement technique?
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What happens when a block is to be replaced in a write back cache?
What happens when a block is to be replaced in a write back cache?
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What is the formula for the number of addressable units in a cache?
What is the formula for the number of addressable units in a cache?
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Study Notes
Cache Memory Mapping
- Three techniques can be used for mapping main memory blocks into cache lines: Direct, Associative, and Set-Associative.
- Direct Mapping:
- Maps each block of main memory into only one possible cache line.
- Each block of main memory maps into a unique line of the cache.
- The mapping function is easily implemented using the main memory address.
- Each main memory address can be divided into three fields:
- Least Significant w bits identify unique word within a block.
- Remaining bits (s) specify which block in memory, divided into two fields:
- Least significant r bits identify which line in the cache.
- Most significant s-r bits uniquely identify the block within a line of the cache.
- Advantages: Simple, Inexpensive.
- Disadvantages: Fixed location for a given block, high cache misses (thrashing) if two blocks that map to the same line are repeatedly accessed.
Associative Mapping
- Permits each main memory block to be loaded into any line of the cache.
- The cache control logic interprets a memory address as a Tag and a Word field.
- The Tag field uniquely identifies a block of main memory.
- To determine whether a block is in the cache, the cache control logic must simultaneously examine every line's tag for a match.
- Advantages: Flexibility in replacing blocks when a new block is read into the cache.
- Disadvantages: Complex circuitry required to examine the tags of all cache lines in parallel.
Set-Associative Mapping
- Cache is divided into a number of sets, each containing a number of lines.
- A given block maps to any line in a given set.
- Example: 2 lines per set (2-way associative mapping), a given block can be in one of 2 lines in only one set.
Cache Memory Replacement
- Techniques:
- No choice: Replace the line that a block maps to.
- Least Recently used (LRU): Replace the block that has been used least recently.
- First in first out (FIFO): Replace the block that has been in the cache longest.
- Least frequently used: Replace the block that has been used least frequently.
- Random: Replace a block randomly.
- Write policies:
- Write Through: All writes go to main memory as well as cache.
- Write Back: Write initially made in cache only, with a dirty bit set when an update occurs.
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Description
This quiz covers the concept of cache memory mapping in computer architecture, including direct, associative, and set-associative techniques.