Computer Architecture Basics Quiz

Advanced Computer Architecture

• The course is about Advanced Computer Architecture, offered by Michael Gerndt at the Technical University of Munich (TUM).
• The lecture schedule includes Tuesday (12:30-14:00), and Friday sessions (12:15-13:45), in Hörsaal HS2.
• The course will involve 6 ECTS and 4 SWS (semester work).
• Students are expected to prepare materials at home, understand key terms/concepts, use online resources and prepare for student presentations.
• Students may use MarginNote 4 (Mac only) or REMnote (remnote.com).
• Quizzes during lectures will be multiple-choice questions about the lecture material.
• The exam will be 90 minutes long; online; and including multiple-choice questions and free text.
• Expected topics include the content of current processors, evaluation of different designs and the interaction of architectures, compiler technology and applications. Additionally, it will cover different classes of parallel architectures, their implementation concepts, the practical art of selecting and interconnecting hardware components to create computers; formal modeling of computer systems; Instruction Set Architecture (ISA), Machine language, Microarchitecture, System architecture; different memory technologies, VLIW processors, data parallel architectures, shared memory systems, distributed memory, and many more.
• Additional aspects include concepts for Computer History, study material (books and web resources), and a discussion of the concept of an Edge-Cloud continuum.
• The course also covers topics on the Serverless IoT Framework, Senior Homecare costs in Germany, Intel's core architectures (Knights Landing and Sapphire Rapids) and their characteristics (including core architecture, technology, and applications).
• The study notes cover further information on computer architecture aspects, including Computer Architecture and Parallel Systems (CAPS), lecture organization, course quizzes, and the goals of the lecture.
• Also addressed are topics on process technology, Moore's Law, 10 nm technology, different processor classes (Signal processors, Graphics processors, Vector processors), and related topics.
• The study material includes descriptions of parallelism in hardware, parallel metrics, the hardware/software interface, memory hierarchy, caching, and corresponding principles.
• The course includes discussions on fault tolerance, reliability, availability, virtualization, specific processor classes, network processors, Intel Tofino 2, domain-specific language for the packet forwarding plane, all about parallelism (including pipeline), and related topics.
• Furthermore, covered are topics on memory hierarchy; memory disambiguation; ordering; and types of cache misses (cold misses, capacity misses, conflict misses), cache update strategies, cache replacement strategies, performance gain, instruction cache, trace cache, and cache optimizations (including methods for increasing bandwidth, reducing hit time, reducing miss penalty and reducing miss rate).
• Specific topics include the concepts of different memory architectures (SRAM, DRAM, and the architecture of a DRAM chip) and corresponding characteristics. Furthermore, the documentation provides information on DIMMs and Virtual Memory, including the Memory Management Unit (MMU) and translation, including page table organization, and the different characteristics and properties of non-volatile memory types (ROM's types such as PROM & EPROM & FLASH), including NOR vs NAND Flash and their corresponding cell designs and technologies (SLC and MLC).
• Topics extend to including descriptions of and comparisons between different memory and processor technologies (including 3D XPoint, Intel Optane SSDs, and the use of those technologies in computing systems).
• Noteworthy is discussions of fault tolerance concepts (ECC), Chipkill memory and the design decisions to support a proper functioning of a chip multiprocessor, covering, among other aspects, shared vs private LLC, centralized vs distributed implementations of shared caches, shared memory architecture and including descriptions of the important memory models such as sequential consistency, processor consistency, and weak consistency, and corresponding examples.
• Also addressed are aspects of various processor types (such as NVIDIA GPUs and specific architectures, such as the Hopper, and its streaming multiprocessors (including a description of CUDA, a GPU programming language)) along with examples of their programming (e.g., DAXPY in PTX and CUDA and further examples).
• Finally, covered are aspects of various network topologies, including fully connected networks, linear arrays and tori, as well as multidimensional meshes and tori, hypercubes, k-ary trees, and fat trees.
• Further aspects covered include different Network Interface (NI) implementations, their characteristics, flow control, and corresponding types, methods, and examples, including zero-copy interface mechanisms.

Topic subtitles

• Content (Advanced Computer Architectures)
• Lecture schedule
• Resources
• Evaluation of different architectures
• Classes of Parallel Architectures
• Parallel Metrics
• Fault Tolerance, Reliability, and Availability
• Virtualization
• Processor Classes
• Network Processors
• Computer Architecture-related topics
• Process Technology
• Memory Technology
• Memory Hierarchies
• Cache Hierarchy
• Cache Organization
• Cache Update Strategies
• Cache Replacement Strategies
• Cache Performance Gain
• Cache Optimization techniques
• Cache Accesses (Pipelining vs Serial)
• Instruction Pipelining; Instruction Cycle
• Pipeline Hazards; Hazard Classes
• Code Generation and Instruction Scheduling (static vs dynamic)
• Loop Unrolling, Software Pipelining and Loop Fusion
• More Processor Classes
• Compiler Support
• Work Sharing through Explicit Tasking
• Synchronization
• Locks
• Bus Traffic
• Atomic Operations
• Memory Consistency
• Software Pipelining vs Loop Unrolling
• Summary Compiler Optimizations
• Floating Point and Vector Extensions to Processors
• Instruction Set Architecture (ISA) details, topics, and examples
• Comparison among different Instruction Set Architectures (e.g., x86, ARM, and RISC-V) and a look into the particular characteristics of different architectures like Intel Knights Landing (KNL) processor series.
• Memory Architectures for different processors
• Network Topologies
• Networks
• Hardware Prefetching
• Software Prefetching
• Cache Optimization techniques (higher associations, etc)