Binary Integers and 2s-Complement

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Questions and Answers

What is the range of unsigned binary integers for a 32-bit representation?

0 to +4,294,967,295

How do you calculate a 2's complement signed integer?

Negate the most significant bit and calculate as a sum of the remaining bits.

What does the sign bit indicate in a 32-bit 2's complement number?

A sign bit of 1 indicates a negative number, while 0 indicates a non-negative number.

What is the result of negating the integer +2 using 2's complement?

-2, which is represented as 1111 1111 1111 1111 1111 1111 1110. Signup and view all the answers

Which specific 32-bit representation corresponds to the most-negative signed integer?

1000 0000 0000 0000 0000 0000 0000 0000 Signup and view all the answers

Explain how sign extension is performed.

Sign extension is done by replicating the sign bit to fill the additional bits. Signup and view all the answers

What result would you get from adding a positive integer x to -x in `x + (-x)`?

The result would be 0. Signup and view all the answers

What is the result of the operation `x & 7 == 7` when x is non-negative?

It implies that the last three bits of x are all 1s. Signup and view all the answers

How are unsigned values extended from 8-bit to 16-bit representation?

By prepending zeros to the left, e.g., +2 becomes 0000 0000 0000 0010. Signup and view all the answers

What is the machine code format for MIPS instructions?

MIPS instructions are encoded as 32-bit instruction words. Signup and view all the answers

What is the purpose of the 'shamt' field in MIPS R-format instructions?

'shamt' specifies the shift amount for shift and rotate instructions. Signup and view all the answers

What defines the opcode in MIPS instructions?

Opcode defines the basic operation of the instruction, indicating what action to perform. Signup and view all the answers

Explain how the 'addi' instruction in MIPS extends its immediate value.

'addi' sign-extends the immediate value when loading a constant into a register. Signup and view all the answers

What role do the registers $t0 through $t9 play in MIPS assembly?

$t0 to $t9 represent temporary registers used for intermediate calculations. Signup and view all the answers

How does the 'lui' instruction function in MIPS architecture?

'lui' loads a 16-bit constant into the upper half of a register while zeroing the lower bits. Signup and view all the answers

Describe the immediate addressing mode in MIPS.

Immediate addressing allows instructions to include a constant value that is directly specified. Signup and view all the answers

What happens to the PC (Program Counter) during a 'beq' instruction when the condition is true?

If the condition in 'beq' is true, the PC updates to PC + 4 + 4 * offset. Signup and view all the answers

In MIPS I-format instructions, what is the size of the constant/address field?

The constant/address field is 16 bits in size. Signup and view all the answers

What differentiates the function of instructions sharing the same opcode in MIPS?

The 'funct' field differentiates their specific operation. Signup and view all the answers

What is the effect of using 'srl' in MIPS instructions?

'srl' performs a logical right shift, filling left bits with zeros. Signup and view all the answers

Why are different instruction formats used in MIPS despite complicating decoding?

Different formats allow the uniform use of 32-bit instructions while optimizing performance. Signup and view all the answers

What is the hexadecimal representation of the ADD instruction for adding $t0, $s1, $s2?

The hexadecimal representation is 0x02324020. Signup and view all the answers

Study Notes

Unsigned Binary Integers

An n-bit number represents values from 0 to +2^n - 1.
Example: 0000 0000 0000 0000 0000 0000 0000 10112 = 8 + 2 + 1 = 1110
When using 32-bits, the range encompasses values from 0 to +4,294,967,295.

2s-Complement Signed Integers

An n-bit number represents values from -2^(n-1) to +2^(n-1) - 1.
The leftmost bit is the sign bit, where 1 signifies a negative number and 0 represents a non-negative number.
Non-negative numbers have identical representations in both unsigned and 2s-complement form.
Example: 1111 1111 1111 1111 1111 1111 1111 11002 = -2,147,483,648 + 2,147,483,644 = -410
The range for 32-bit signed integers spans from -2,147,483,648 to +2,147,483,647.

Signed Negation

To negate a number, complement each bit (1 to 0, 0 to 1) and add 1.
Example: negating +2 (0000 0000 … 00102) yields -2 (1111 1111 … 11012 + 1 = 1111 1111 … 11102).

Sign Extension

To represent a number using more bits while preserving its value, replicate the sign bit to the left.
Example: extending a positive 8-bit number (+2) to 16-bit results in 0000 0000 0000 0010.
Example: extending a negative 8-bit number (-2) to 16-bit results in 1111 1111 1111 1110.

Representing Instructions

Instructions are encoded in binary, referred to as machine code.
MIPS instructions are 32-bit words.
MIPS instructions are encoded using a small set of formats, including opcode, register numbers, and immediate values.

MIPS R-format Instructions

The opcode field defines the basic operation.
The rs, rt, and rd fields represent source and destination registers.
The shamt field is used with shift/rotate operations.
The funct field differentiates functions sharing the same opcode.

MIPS R-format Instructions (cont’d)

An example of an R-format instruction is ADD 88 89 10,whichsemanticallytranslatesto10, which semantically translates to 10,whichsemanticallytranslatesto8 = 9+9 + 9+10.

MIPS R-format Example

The R-format instruction "add t0,t0, t0,s1, $s2" is encoded as 000000100011001001000000001000002, which in hexadecimal form is 0x02324020.

MIPS I-format Instructions

These instructions include immediate arithmetic and load/store operations.
The rt field represents the destination or source register number.
The constant field ranges from -2^15 to +2^15 - 1.
The address field is an offset added to the base address specified by rs.

MIPS I-format Instructions (cont’d)

Syntax: BEQ 1,1, 1,2, 25.
Action: If (1!=1 != 1!=2), PC = PC + 4. If (1==1 == 1==2), PC = PC + 4 + 4*25.

Immediate Addressing on MIPS

Useful for loading constants, like li $7, 12 to load 12 into register $7.
The ori, andi, xori, and addi instructions are immediate versions of or, and, xor, and add, allowing operations with immediate values.
The lui instruction loads the upper 16 bits with a constant and sets the lower 16 bits to zero.

MIPS J-format Instructions

Used by unconditional jumps, such as j dest_addr.

MIPS Instruction Formats

R-format: opcode (6 bits), rs (5 bits), rt (5 bits), rd (5 bits), shamt (5 bits), funct (6 bits).
I-format: opcode (6 bits), rs (5 bits), rt (5 bits), immediate (16 bits).
J-format: opcode (6 bits), address (26 bits).
The formats ensure consistency and facilitate efficient decoding.

MIPS Instruction Set

The instruction set includes arithmetic, logic, data transfer, and control flow instructions.
Arithmetic instructions: add, sub, mul, div.
Logic instructions: and, or, xor, not.
Data transfer instructions: lw, sw, lb, sb.
Control flow instructions: beq, bne, j, jal.

MIPS Logical Operations

and, andi: bitwise AND.
or, ori: bitwise OR.
nor: bitwise NOT (inverted OR).

MIPS Shift Operations

sll: shift left logical.
srl: shift right logical.
The shamt field determines the number of positions to shift.

[Aside] SHL: Logical Shift Left on x86 & M1

Intel architecture documentation details the logical shift left (SHL) operation on x86 processors.

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Description

This quiz covers the concepts of unsigned binary integers and 2s-complement signed integers. It details their representations, ranges, and methods for negation and sign extension. Perfect for understanding binary arithmetic in computer science.