ARM CPU Operating State and Instruction Examples Quiz

What memory type is slower than on-chip memory such as M1 and M2 cache?

SRAM

For high-performance CPUs like x86, what technique is used to make main memory look faster at a low cost?

Using caches (small fast RAM)

Which CPU design places memory on-chip with the CPU for low-performance CPUs like ARM-Cortex?

ARM

Which type of instructions re-encode some into fewer bits, reducing program memory size and bandwidth requirements?

16-bit instructions Signup and view all the answers

What was introduced in 2003 as an enhancement to ARM's Thumb-1 instruction set?

Thumb-2: Adds some 32-bit instructions, faster, low memory overhead. Signup and view all the answers

What are the 3 basic types of MIPS instructions?

Register type, Immediate type, Jump type Signup and view all the answers

Which architecture supports ARM T32 and Thumb-2 instructions?

ARM-Cortex M3 Signup and view all the answers

What does Moore's Law suggest?

It is easier to speed up the CPU than the memory. Signup and view all the answers

What is the unique feature of Thumb-2 instructions for ARM architecture?

Reduced code size Signup and view all the answers

Which of the following is NOT a basic element of ARM specifications for an instruction?

Memory address Signup and view all the answers

What does Moore's Law revisited state about the relationship between CPU and memory speed?

It is easier to speed up memory than the CPU. Signup and view all the answers

In ARM CPUs, what does the PSR T-bit control?

The operating state (Thumb state or ARM state) Signup and view all the answers

How is Thumb state indicated in ARM CPUs?

By the least significant bit (LSB) of the program counter being 1 Signup and view all the answers

How does the CPU Control Unit determine if an instruction is 16 or 32 bits long?

By examining the value of bits[15:11] of the instruction Signup and view all the answers

Which of the following values indicate a 32-bit instruction in ARM CPUs?

0b11111 Signup and view all the answers

What does Moore's Law refer to in computer science and engineering?

A principle stating that CPU performance doubles every two years Signup and view all the answers

In ARM CPUs, what determines whether an instruction is executed in Thumb state or ARM state?

The value of the T-bit in the PSR Signup and view all the answers

ARM CPU Operating State and Instruction Examples Quiz

Questions and Answers

What memory type is slower than on-chip memory such as M1 and M2 cache?

For high-performance CPUs like x86, what technique is used to make main memory look faster at a low cost?

Which CPU design places memory on-chip with the CPU for low-performance CPUs like ARM-Cortex?

Which type of instructions re-encode some into fewer bits, reducing program memory size and bandwidth requirements?

What was introduced in 2003 as an enhancement to ARM's Thumb-1 instruction set?

What are the 3 basic types of MIPS instructions?

Which architecture supports ARM T32 and Thumb-2 instructions?

What does Moore's Law suggest?

What is the unique feature of Thumb-2 instructions for ARM architecture?

Which of the following is NOT a basic element of ARM specifications for an instruction?

What does Moore's Law revisited state about the relationship between CPU and memory speed?

In ARM CPUs, what does the PSR T-bit control?

How is Thumb state indicated in ARM CPUs?

How does the CPU Control Unit determine if an instruction is 16 or 32 bits long?

Which of the following values indicate a 32-bit instruction in ARM CPUs?

What does Moore's Law refer to in computer science and engineering?

In ARM CPUs, what determines whether an instruction is executed in Thumb state or ARM state?

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ARM CPU Operating State and Instruction Examples Quiz

Questions and Answers

What memory type is slower than on-chip memory such as M1 and M2 cache?

For high-performance CPUs like x86, what technique is used to make main memory look faster at a low cost?

Which CPU design places memory on-chip with the CPU for low-performance CPUs like ARM-Cortex?

Which type of instructions re-encode some into fewer bits, reducing program memory size and bandwidth requirements?

What was introduced in 2003 as an enhancement to ARM's Thumb-1 instruction set?

What are the 3 basic types of MIPS instructions?

Which architecture supports ARM T32 and Thumb-2 instructions?

What does Moore's Law suggest?

What is the unique feature of Thumb-2 instructions for ARM architecture?

Which of the following is NOT a basic element of ARM specifications for an instruction?

What does Moore's Law revisited state about the relationship between CPU and memory speed?

In ARM CPUs, what does the PSR T-bit control?

How is Thumb state indicated in ARM CPUs?

How does the CPU Control Unit determine if an instruction is 16 or 32 bits long?

Which of the following values indicate a 32-bit instruction in ARM CPUs?

What does Moore's Law refer to in computer science and engineering?

In ARM CPUs, what determines whether an instruction is executed in Thumb state or ARM state?

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