Architecture of Computers 2, Chapter 4: Interruptions & I/O

A microprocessor is an integrated circuit that performs all the operations of a central processing unit (CPU).

Intel

True (A)

<p>To temporarily suspend the execution of a program and handle a specific event (C)</p> Signup and view all the answers

<p>Software and Hardware (C)</p> Signup and view all the answers

<p>NMI stands for Non-Maskable Interrupt.</p> Signup and view all the answers

<p>True (A)</p> Signup and view all the answers

<p>False (B)</p> Signup and view all the answers

<p>Increasing the number of cores and decreasing the clock speed (D)</p> Signup and view all the answers

<p>The interrupt vector table stores the addresses of interrupt handlers, allowing the CPU to quickly locate and execute the appropriate routine when an interrupt occurs.</p> Signup and view all the answers

<p>The INT N instruction generates a software interrupt, which triggers the execution of a specific interrupt handler associated with the interrupt number N.</p> Signup and view all the answers

<p>The AH register holds the function code specifying which specific service the INT 21H interrupt needs to execute.</p> Signup and view all the answers

<p>The OUT instruction is used to send data to an output port.</p> Signup and view all the answers

<p>The two major techniques for handling I/O operations are programmed I/O (polling) and interrupt-driven I/O.</p> Signup and view all the answers

<p>False (B)</p> Signup and view all the answers

<p>Diverting an interrupt involves modifying the interrupt vector table to change the interrupt handler associated with a specific interrupt number, effectively altering how the system responds to that particular event.</p> Signup and view all the answers

<p>C.I stands for 'Circuit Interface.'</p> Signup and view all the answers

<p>True (A)</p> Signup and view all the answers

<p>The main advantage of interrupt-driven I/O is that it allows the CPU to perform other tasks while waiting for peripheral devices to become ready, making it more efficient than programmed I/O where the CPU must constantly poll devices.</p> Signup and view all the answers

<p>An input port is used by the CPU to receive data from a peripheral device, while an output port is used by the CPU to send data to a peripheral device.</p> Signup and view all the answers

<p>The control port is used by the CPU to configure and manage the operation of the associated interface circuit (C.I).</p> Signup and view all the answers

<p>Using interrupt-driven I/O offers two main benefits: Firstly, it frees up the CPU to perform other tasks while waiting for I/O devices to become ready, leading to increased efficiency. Secondly, it allows peripheral devices to signal their readiness for data transfer directly to the CPU, avoiding the need for continuous polling and reducing system overhead.</p> Signup and view all the answers

<p>The status port provides the CPU with information on the current state of the associated interface circuit (C.I) and connected peripheral device.</p> Signup and view all the answers

An integrated circuit that performs all the functions of a central processing unit (CPU).

The first microprocessor, released by Intel in 1971. It was a 4-bit processor with limited capabilities but a revolutionary technology.

An event that interrupts the normal execution of a program, causing it to temporarily switch to a specific routine to handle the interruption.

A subroutine executed when an interrupt occurs. It handles the specific task related to the interrupt.

Interrupts caused by external events, typically initiated by I/O peripherals through electrical signals.

A hardware interrupt that cannot be ignored or masked.

Interrupts generated by special instructions in the instruction set or by exceptional conditions within the microprocessor.

A table in memory containing addresses of interrupt routines. Each entry in the table corresponds to a specific interrupt.

A mechanism used to change the way an interrupt is handled. It involves replacing the address of the interrupt routine in the interrupt vector table.

A group of services offered by the interrupt 21H, which is a powerful interrupt routine often called the SYSTEM INTERRUPT.

The process of exchanging data between the microprocessor and peripherals through I/O interface circuits.

An intelligent and programmable circuit that allows the microprocessor to communicate with a specific type of device.

A collection of registers within the I/O interface circuit that the processor uses to communicate with peripherals.

An I/O operation that reads data from an I/O port.

An I/O operation that writes data to an I/O port.

The process of reading data from an I/O port to the AL register.

The process of writing data from the AL register to an I/O port.

A method of transferring data between the central processing unit (CPU) and peripherals by using an external signal.

A method of transferring data between the central processing unit (CPU) and peripherals by polling the status of the peripherals at regular intervals.

A communication method involving a dedicated physical connection between the CPU and the peripheral. The CPU directly talks to the peripheral without any intermediaries.

A technique used to improve the performance of I/O operations by allowing the CPU to continue processing instructions while data is being transferred between peripherals and memory.

A method of transferring data between the central processing unit (CPU) and peripheral devices using a dedicated connection.

A method of transferring data between the central processing unit (CPU) and peripheral devices using a set of multiple parallel connections.

A method of communication where data can be transferred in both directions simultaneously.

A communication method where data can only be transferred in one direction at a time.

A method of communication where data can only be transfered in one direction.

A communication technique in which data is sent in chunks, and the sending device waits for an acknowledgement (ACK) signal from the receiving device before sending the next chunk.

A communication technique where data is sent in a continuous stream, and the receiving device knows when to expect the next chunk.