29 Questions
Dr. Muhammad Asif teaches Machine Learning, Deep Learning, and Natural Language Processing.
True
Attendance is mandatory in the Tuesday lecture from 1:30 PM to 4:30 PM.
False
Students are encouraged to work on homework to truly understand the material.
True
All students can collaborate on homework writeups.
False
The reference book mentioned is 'Computer Systems: A Programmer's Perspective, 3/E'.
True
Dr. Muhammad Asif teaches Numerical Optimization and Optical Networks.
False
The flag register has a bit called Overflow Flag (O) that indicates the overflow of a high-order bit after an arithmetic operation.
True
The Trap Flag (T) in the flag register enables the processor to execute in single-step mode.
True
If Direction Flag (D) is set to 1, the registers are automatically incremented during string instructions.
False
The Interrupt Flag (I) in the flag register enables external interrupts when set to 0.
False
The I/O Privilege Level field (IOPL) in the flag register defines the privilege level of the current process.
True
The VM flag bit in the flag register selects real mode operation in a protected mode system.
False
The VI flag in Pentium-Pentium 4 microprocessors is a copy of the virtual interrupt flag bit.
True
The VIP Flag is used to provide virtual interrupt flags and pending information to the Pentium-Pentium 4 microprocessors.
True
The ID Flag indicates that Pentium-Pentium 4 processors do not support the CPUID instruction.
False
The Memory Buffer Register (MBR) is also known as the Memory Data Register.
True
The Instruction Buffer Register (IBR) holds the opcode of the currently fetched instruction.
False
The Accumulator (AC) in CPU registers is used for arithmetic and logical operations.
True
4-address instructions need to specify 0~4 addresses in the instructions
True
2-address instructions are classified separately from 4-address instructions
True
The instruction size for 4-address instructions is 14 bytes
False
The memory accessible for 4-address instructions is 16 KB
False
If the data bus is of 1-byte, then a maximum of 1 byte of data can be fetched from memory to CPU in one clock cycle
True
Direct addressing mode requires a logical address to access data.
True
In direct addressing mode, the offset part is known as the effective address.
True
Offset in direct addressing mode is not specified directly as part of the instruction.
False
Assembler computes the offset value for memory labels declared using DB, DW, LABEL, etc.
True
Direct addressing mode is ideal for addressing complex data types like arrays.
False
In direct addressing mode, each array element can be accessed efficiently using a loop structure.
False
Explore lecture notes and course information for Advanced Computer Architecture CS-2, taught by Dr. Muhammad Asif at Bahauddin Zakariya University in Spring 2024. Topics include Machine Learning, Deep Learning, Computer Networks, Natural Language Processing, and more.
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