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Questions and Answers
In stack memory-addressing modes, which register's content is used to determine the location for the low-order 8 bits?
In stack memory-addressing modes, which register's content is used to determine the location for the low-order 8 bits?
- CS
- DS
- SP (correct)
- AX
In the instruction MOV AX, 2020H, what is the data memory addressing mode used and how many bits of information was moved?
In the instruction MOV AX, 2020H, what is the data memory addressing mode used and how many bits of information was moved?
- Direct Addressing Mode; 8 bits
- Immediate Addressing Mode; 8 bits
- Immediate Addressing Mode; 16 bits (correct)
- Direct Addressing Mode; 16 bits
The descriptor describes all of the following in the memory segment except
The descriptor describes all of the following in the memory segment except
- Location
- Size
- Boundaries (correct)
- Access Rights
The addressing mode, where you directly specify the operand value is _____
The addressing mode, where you directly specify the operand value is _____
_______ is a jump to any memory location within the entire memory system
_______ is a jump to any memory location within the entire memory system
Determine the memory location addressed by the following real mode Core2 register
combinations: Ds = 1A00H and ECX = 00002000H
Determine the memory location addressed by the following real mode Core2 register combinations: Ds = 1A00H and ECX = 00002000H
Suppose that DS = 1000H, SS = 2000H, BP = 1000H and DI = 0100H. Assuming real
mode operation, determine the memory address accessed by the instruction MOV
AL,[BP+DI]
Suppose that DS = 1000H, SS = 2000H, BP = 1000H and DI = 0100H. Assuming real mode operation, determine the memory address accessed by the instruction MOV AL,[BP+DI]
The addressing mode in which the effective address of the memory location is visibly
part of the instruction.
The addressing mode in which the effective address of the memory location is visibly part of the instruction.
This is an example of register Indirect Addressing Mode
This is an example of register Indirect Addressing Mode
. Memory Locations 00390H through 00393H contain, respectively 9A, 76, 65, and 1F.
What does AX contain after instruction? (Assume that DS = 0030H and SI = 0090H and
BP = 0002H)
a. MOV AX,[SI]
b. MOV AX,[SI+1]
c. MOV AX,[SI][BP]
. Memory Locations 00390H through 00393H contain, respectively 9A, 76, 65, and 1F. What does AX contain after instruction? (Assume that DS = 0030H and SI = 0090H and BP = 0002H) a. MOV AX,[SI] b. MOV AX,[SI+1] c. MOV AX,[SI][BP]
Which one selects the descriptor from a descriptor table?
Which one selects the descriptor from a descriptor table?
"Given CS = 2000H and IP= 1000H, Find the memory address of the next instruction
executed by the microprocessor."
"Given CS = 2000H and IP= 1000H, Find the memory address of the next instruction executed by the microprocessor."
Code a descriptor that describes a memory segment that begins at location AB208000H
and ends at location AC20AFFFH. The memory segment is a data segment that grows
upward and can be written. The instruction used is a 32-bit size. it is assumed that the
privilege level of the segment was set at 2nd highest and that the segment has not been
accessed.
Code a descriptor that describes a memory segment that begins at location AB208000H and ends at location AC20AFFFH. The memory segment is a data segment that grows upward and can be written. The instruction used is a 32-bit size. it is assumed that the privilege level of the segment was set at 2nd highest and that the segment has not been accessed.
If a descriptor has Base = 23000000H, Limit = 012FFH and G =1, the described
segment ends at
If a descriptor has Base = 23000000H, Limit = 012FFH and G =1, the described segment ends at
In Real Mode, a memory segment that begins at 10000H will end at"
In Real Mode, a memory segment that begins at 10000H will end at"
The DOS operating system requires the microprocessor to operate in ________ mode.
The DOS operating system requires the microprocessor to operate in ________ mode.
In protected mode memory, protection implemented by restricting access to memory
segments through
In protected mode memory, protection implemented by restricting access to memory segments through
TI=0 indicates that TI is __________.
TI=0 indicates that TI is __________.
It selects any location within the 64K byte memory segment.
It selects any location within the 64K byte memory segment.
32-bit microprocessors operating in protected mode could address up to ______ of
memory
32-bit microprocessors operating in protected mode could address up to ______ of memory
To form a physical memory address, appropriate segment register contents are"
To form a physical memory address, appropriate segment register contents are"
"CS contains 2001H and IP contains 007CH, which physical memory location is
accessed for the next instruction?"
"CS contains 2001H and IP contains 007CH, which physical memory location is accessed for the next instruction?"
For the 80286-Core processors, the protected mode memory exists at locations"
For the 80286-Core processors, the protected mode memory exists at locations"
"The instruction, MOV AX,[BX] is an example of
"The instruction, MOV AX,[BX] is an example of
The physical address accessed by segment:offset combination A359:B3FD
The physical address accessed by segment:offset combination A359:B3FD
Which register contains the location where the next instruction in the code segment
should be fetched?
Which register contains the location where the next instruction in the code segment should be fetched?
80286 could be operated in protected mode but with only have _____ for address bus
80286 could be operated in protected mode but with only have _____ for address bus
"If SI = 1000H, what does MOV [SI], BH do?"
"If SI = 1000H, what does MOV [SI], BH do?"
"The instruction MOV DS:[2000H], AL"
"The instruction MOV DS:[2000H], AL"
What is the starting and ending address of the segment located by the segment register
value, 1000H?"
What is the starting and ending address of the segment located by the segment register value, 1000H?"
Which of the following segments:offset combinations points to a common physical
memory address?
a) A1B2:000C,
b) A1B0:200C,
c) A1B0:002C,
d) A1B1:001C
Which of the following segments:offset combinations points to a common physical memory address? a) A1B2:000C, b) A1B0:200C, c) A1B0:002C, d) A1B1:001C
In protected mode, a selector value gives the following segment information EXCEPT
In protected mode, a selector value gives the following segment information EXCEPT
The first 1-Mbyte of memory is called the ________ memory system
The first 1-Mbyte of memory is called the ________ memory system
One must never use the segment registers as data registers to hold arbitrary values
because:
One must never use the segment registers as data registers to hold arbitrary values because:
The instruction, MOV AX, 1234H is an example of
The instruction, MOV AX, 1234H is an example of
Real mode memory exists at locations
Real mode memory exists at locations
This addressing mode uses a register to hold the actual address that identifies either the
source or the destination to be used in the data transfer.
This addressing mode uses a register to hold the actual address that identifies either the source or the destination to be used in the data transfer.
In real mode, which physical address is accessed by the segment-offset combination
0CD1:02E0
In real mode, which physical address is accessed by the segment-offset combination 0CD1:02E0
In protected mode, access to the segment is allowed if
In protected mode, access to the segment is allowed if
The instruction, MOV AX,[BX] is an example of
The instruction, MOV AX,[BX] is an example of
_____moves a byte or word between a memory location and a register.
_____moves a byte or word between a memory location and a register.
_____ moves a byte or word between a register and memory location addressed by an
index or base register plus displacement.
_____ moves a byte or word between a register and memory location addressed by an index or base register plus displacement.
____ moves a byte or word between a register and memory location addressed by a
base register (BP or BX) plus an index register (DI or SI)
____ moves a byte or word between a register and memory location addressed by a base register (BP or BX) plus an index register (DI or SI)
_____ should be added to the starting address to get the ending address.
_____ should be added to the starting address to get the ending address.
An ADD instruction stores a value 7308H at offset value 9F71H. If the computed address
is 7CB31H, what is the starting address? assume real mode
An ADD instruction stores a value 7308H at offset value 9F71H. If the computed address is 7CB31H, what is the starting address? assume real mode
Given the following: TM = 036H, EBP 106B C443H, ESI = A34C 6181H, EDI =
8BED C437H
Suppose that DS = 0044H, What will be the address/es accessed by the
instruction MOV TM[EBP][EDI+ECH], SI, assuming protected mode?
Given the following: TM = 036H, EBP 106B C443H, ESI = A34C 6181H, EDI = 8BED C437H Suppose that DS = 0044H, What will be the address/es accessed by the instruction MOV TM[EBP][EDI+ECH], SI, assuming protected mode?
Suppose that DS = B9DC, SS = F7CA, ES = AB32, AX = DC5, DI = 8E9, BX =
D98, BP = 2CE, SI = 97D, Var1=12A and Var2=D32. Determine the content of
the destination after executing the instruction MOV CX....
Suppose that DS = B9DC, SS = F7CA, ES = AB32, AX = DC5, DI = 8E9, BX = D98, BP = 2CE, SI = 97D, Var1=12A and Var2=D32. Determine the content of the destination after executing the instruction MOV CX....
Flashcards
Immediate Mode
Immediate Mode
Addressing mode where the operand value is directly specified in the instruction.
Intersegment Jump
Intersegment Jump
A jump to any memory location within the entire memory system, bypassing segment boundaries.
Direct Mode
Direct Mode
Addressing mode where the effective address of the memory location is directly part of the instruction.
Register Indirect Addressing Mode
Register Indirect Addressing Mode
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TI=0 in Descriptor Tables
TI=0 in Descriptor Tables
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Offset Address
Offset Address
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Addressable Memory
Addressable Memory
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Real Mode End Address
Real Mode End Address
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Indirect Addressing
Indirect Addressing
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Register Relative Addressing
Register Relative Addressing
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Study Notes
- In stack memory addressing modes, the low-order 8 bits are placed in the location addressed by SP.
- Immediate Mode is the addressing mode where the operand value is directly specified.
- The instruction MOV AX, 2020H uses Immediate Addressing Mode and moves 16 bits of information.
- A descriptor describes the location, size, boundaries, and access rights of a memory segment.
- An intersegment jump is a jump to any memory location within the entire memory system.
- With DS = 1A00H and ECX = 00002000H, the memory location addressed in real mode Core2 is 0001C000H.
- With DS = 1000H, SS = 2000H, BP = 1000H, and DI = 0100H, MOV AL,[BP+DI] accesses memory address 21100H in real mode.
- Direct Mode is an addressing mode where the effective address of the memory location is visibly part of the instruction.
- "MOV DX, [BX+04]" and "MOV AX, [BX]" are examples of register Indirect Addressing Mode.
- If memory locations 00390H through 00393H contain 9A, 76, 65, and 1F respectively, and DS = 0030H and SI = 0090H and BP = 0002H, then for MOV AX,[SI+1], AX contains 769AH, for MOV AX,[SI][BP] AX contains 1F65H.
- The selector selects the descriptor from a descriptor table.
- With CS = 2000H and IP = 1000H, the memory address of the next instruction executed by the microprocessor is 21000H.
- A memory segment that begins at AB208000H and ends at AC20AFFFH, is a writable 32-bit data segment growing upward with privilege level set at 2nd highest and not accessed, is coded with values 02, 10, 00, 80, 20, B2, D0, and AB.
- If a descriptor has Base = 23000000H, Limit = 012FFH, and G = 1, the described segment ends at 242FFFFFH.
- In Real Mode, a memory segment that begins at 10000H will end at 1FFFFH.
- The DOS operating system requires the microprocessor to operate in real mode.
- In protected mode memory, protection is implemented by restricting access to memory segments using privilege levels.
Descriptor Tables
- When TI=0, TI is A global descriptor table.
Memory Segments
- The offset address selects any location within the 64K byte memory segment.
- 32-bit microprocessors operating in protected mode can address up to 4GB of memory.
- To form a physical memory address, segment register contents are added to 16-bit offset address shifted left by 4 positions and operated using one of the addressing modes.
- If CS contains 2001H and IP contains 007CH, the physical memory location accessed for the next instruction is 2008CH.
- For the 80286-Core processors, the protected mode memory exists at locations 000000H-FFFFFFH.
- The instruction MOV AX,[BX] is an example of register indirect addressing mode.
- The physical address accessed by segment:offset combination A359:B3FD is AE98D.
- The IP register contains the location where the next instruction in the code segment should be fetched.
- The 80286 could be operated in protected mode but with only a 24-bit address bus.
- If SI = 1000H, then MOV [SI], BH writes a byte of data from BH into memory location 1000H.
- The instruction MOV DS:[2000H], AL is illegal and not allowed.
- If the segment register value is 1000H, the starting address of the segment is 10000H and the ending address is 1FFFFH.
- Segments offset combinations that point to A common physical memory address are a) A1B2:000C, c) A1B0:002C, and d) A1B1:001C.
- In protected mode, a selector value gives the following segment information EXCEPT the ending address.
- The first 1-Mbyte of memory is called both conventional and real mode.
- The segment registers must never be used as data registers to hold arbitrary values as they should only contain segment addresses.
- The instruction MOV AX, 1234H is an example of immediate addressing mode.
- Real mode memory exists at locations 00000H-FFFFFH.
- Indirect addressing mode uses a register to hold the actual address that identifies either the source or the destination to be used in the data transfer.
- In real mode, the physical address accessed by the segment-offset combination 0CD1:02E0 is OCFF0H.
- In protected mode, access to the segment is allowed if RPL = DPL.
- The instruction MOV AX, [BX] is an example of register indirect addressing mode.
- Register Relative moves a byte or word between a memory location and a register.
- Register Relative Addressing moves a byte or word between a register and memory location addressed by an index or base register plus displacement.
- Based Index Addressing moves a byte or word between a register and memory location addressed by a base register (BP or BX) plus an index register (DI or SI).
- To get the ending address, the offset should be added to the starting address.
- If an ADD instruction stores a value 7308H at offset value 9F71H, and the computed address is 7CB31H, assuming real mode, the starting address is 72BC0.
- If TM = 036H, EBP = 106B C443H, ESI = A34C 6181H, EDI = 8BED C437H, and DS = 0044H, then the address/es accessed by the instruction MOV TM[EBP][EDI+ECH], SI, assuming protected mode is D2D69315.
- If DS = B9DC, SS = F7CA, ES = AB32, AX = DC5, DI = 8E9, BX = D98, BP = 2CE, SI = 97D, Var1=12A and Var2=D32, after executing the instruction MOV CX, the content of the destination is 4FDCH.
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