8085 Microprocessor Architecture

8085 Microprocessor Architecture

• Developed by Intel in 1977, it is an 8-bit microprocessor capable of addressing 64KB of memory.
• Utilizes NMOS technology and operates on a single +5V power supply with a 3.2 MHz clock speed.
• Consists of an 8-bit ALU, providing arithmetic and logical operations.
• Its architecture includes units like ALU, Timing and Control unit, Interrupt Control, Serial I/O Control, registers, and the CPU as its core.

ALU

• Performs arithmetic operations like addition, subtraction, increment, decrement, and logical operations like AND, OR.
• Its word length is determined by its internal data bus, which is 8-bits in the 8085.
• Contains components like Adder, Shifter and Status register.

Timing and Control Unit

• Responsible for generating control signals for various operations like memory and I/O management.
• Provides timing, control, and status signals, orchestrating communication between the CPU, memory, and peripheral devices.

System Bus

• 8085 communicates with memory and I/O devices via the Address bus, Data bus, and Control bus.
• Data Bus: Bi-directional, carries instructions and data between microprocessor and memory. Its size denotes the type of arithmetic operation possible.
• Address Bus: Unidirectional, transmits instructions from the microprocessor to memory. Its size determines the memory capacity the 8085 can address.
• Control Bus: Includes unidirectional and bi-directional signals, responsible for synchronizing and coordinating operations between the microprocessor and peripheral devices.

Registers

• 8085 has six 8-bit general-purpose registers: B, C, D, E, H, and L. These can be paired to form 16-bit registers BC, DE, and HL for performing 16-bit operations.
• Accumulator: An 8-bit register in the ALU, stores data and the results of arithmetic and logical operations.
• Flag Register (Status Register): Consists of 5 flags (CF, PF, ZF, SF, AC), used to analyze the result of operations. The combined accumulator and flag register is called the Program Status Word (PSW).
• Stack Pointer: A 16-bit register used as a memory pointer, pointing to the memory location used for stack operations.
• Program Counter: A 16-bit register that holds the address of the next instruction to be fetched and executed.
• Instruction Register/Decoder: Temporarily stores the current instruction from memory, decodes it, and sends the decoded data to the CPU.

8085 Microprocessor Pin Diagram

• Utilizes combined Address/Data bus pins (A0-A15) for unidirectional signal transmission from the microprocessor to peripheral devices.
• ALE (Address Latch Enable) signal activates the lower 8 bits of the data bus during the initial T state of the machine cycle.
• S0 and S1 are status signals, determining the operation (read, write, halt, fetch) based on their 4 possible combinations.

8085 Addressing Modes

• Different ways to specify operands for instructions.
• Direct Addressing Mode: Directly specifies the memory location of the operand.
• Register Addressing Mode: Operands are stored in registers (like B, C, D, E, H, L, Accumulator).
• Immediate Addressing Mode: The value of the operand is directly encoded within the instruction.
• Indirect Addressing Mode: The address of the operand is stored in a register pair (BC, DE, HL).
• Implicit Addressing Mode: Operand is implied by the instruction itself, such as the Accumulator in some instructions.

Interrupts in 8085

• Signals triggered by external devices, allowing the microprocessor to deviate from its normal program execution.
• 8085 has 5 hardware interrupt signals:
  • TRAP: A non-maskable interrupt with the highest priority. Executes the ISR located at 0024H address.
  • RST 7.5: A maskable interrupt with the 2nd highest priority, executing ISR at 003CH address.
  • RST 6.5: A maskable interrupt with the 3rd highest priority, executing ISR at 0034H address.
  • RST 5.5: A maskable interrupt, executing ISR at 002CH address.
  • INTR: A maskable interrupt with the lowest priority. It is enabled during the RESET state.

8085 Applications

• Instrumentation Domain: Used in digital kiosks, security systems, function generators, credit card systems, medical devices, and control panels (like printing presses).
• Entertainment Industry: Implemented in gaming consoles, DVD players, and other electronic devices.
• Communication Systems: Used in digital phones, satellite communication, telephone exchanges, and television/computer motherboards.
• Home Appliances: Controls appliances like ovens, washing machines, and refrigerators.

Machine Cycles & Bus Timings

• 8085 uses a series of machine cycles for instruction execution, typically consisting of four types:

  • Opcode Fetch Cycle: Retrieves the instruction code from memory based on the Program Counter.
  • Memory Read Cycle: If the instruction requires data from memory, the microprocessor fetches it.
  • Memory Write Cycle: If the instruction stores data back into memory, the microprocessor writes it.
  • I/O Read/Write Cycle: Enables data transfer between the microprocessor and I/O devices.

• Bus timings determine the timing characteristics of data transfer over the system buses, involving:

  • Clock Speed: Typically 3 MHz in 8085, defining the rate of instruction processing.
  • Cycle Timing: Diagram showing the timing of address, data, and control signals within each machine cycle.
  • Control Signals: Manage data flow and operation of memory and I/O devices.
  • Memory and I/O Timings: Specifying time constraints for memory and I/O operations.