Little Computer 3b Datapath PDF

Little Computer 3b Datapath 1 Little Computer 3b Datapath (cont’d)  Single-bus datapath design  At any point only one value can be “gated” on the bus (i.e., can be driving the bus)  Advantage: Low hardware cost: one bus  Disadvantag...

Little Computer 3b Datapath 1 Little Computer 3b Datapath (cont’d)  Single-bus datapath design  At any point only one value can be “gated” on the bus (i.e., can be driving the bus)  Advantage: Low hardware cost: one bus  Disadvantage: Reduced concurrency – if instruction needs the bus twice for two different things, these need to happen in different states  Control signals (26 of them) determine what happens in the datapath in one clock cycle 2 Little Computer 3b Control Signals 3 Microprogrammed Control Structure R IR[15:11]  Three components: BEN  Microinstruction, control store, microsequencer  Microinstruction: control signals that control Microsequencer the datapath (26 of them) and help determine the next state (9 of them)  Each microinstruction is stored in a unique 6 location in the control store (a special memory structure) Control Store  Unique location: address of the state 2 6 x 35 corresponding to the microinstruction 35  Remember each state corresponds to one microinstruction Microinstruction  Microsequencer determines the address of the next microinstruction (i.e., next state) 9 26 (J, COND, IRD) 4  X teS MU UX UX E UX LS.SIZ 1M 2M Ga DR Ga AR AD UX Ga LU LD R LD DR SR X HF LD N LD G UX N M A C U C 1 E E DR DR teM teM UK TA.E C 1M teA.IR.M.M teP HF M AR.B.R.C M nd.P IO W D AD DA DR LD LD LD AL PC Co Ga Ga IR M M R. J Control Store 000000 (State 0) 000001 (State 1) 000010 (State 2) 000011 (State 3) 000100 (State 4) 000101 (State 5) 000110 (State 6) 000111 (State 7) 001000 (State 8) 001001 (State 9) 001010 (State 10) 001011 (State 11) 001100 (State 12) 001101 (State 13) 001110 (State 14) 001111 (State 15) 010000 (State 16) 010001 (State 17) 010010 (State 18) 010011 (State 19) 010100 (State 20) 010101 (State 21) 010110 (State 22) 010111 (State 23) 011000 (State 24) 011001 (State 25) 011010 (State 26) 011011 (State 27) 011100 (State 28) 011101 (State 29) 011110 (State 30) 011111 (State 31) 100000 (State 32) 100001 (State 33) 100010 (State 34) 100011 (State 35) 100100 (State 36) 100101 (State 37) 100110 (State 38) 100111 (State 39) 101000 (State 40) 101001 (State 41) 101010 (State 42) 101011 (State 43) 101100 (State 44) 101101 (State 45) 101110 (State 46) 101111 (State 47) 110000 (State 48) 110001 (State 49) 110010 (State 50) 110011 (State 51) 110100 (State 52) 110101 (State 53) 110110 (State 54) 110111 (State 55) 111000 (State 56) 111001 (State 57) 111010 (State 58) 111011 (State 59) 111100 (State 60) 111101 (State 61) 111110 (State 62) 111111 (State 63) 5 Remember: FSM 6 An Exercise in Microprogramming  State Machine for LDW 7 Remember: Little Computer 3b Control Signals & Datapath 8  An Exercise in Microprogramming (cont’d) State 18 (010010) State 33 (100001) State 35 (100011) State 32 (100000) State 6 (000110) State 25 (011001) State 27 (011011) 9  An Exercise in Microprogramming (cont’d) State 18 (010010) 10 0 00 0 1 1 00 0 0 State 33 (100001) State 35 (100011) State 32 (100000) State 6 (000110) State 25 (011001) State 27 (011011) 10  An Exercise in Microprogramming (cont’d) State 18 (010010) 10 0 00 0 1 1 00 0 0 0 0 X X XX X XX X XXXX State 33 (100001) State 35 (100011) State 32 (100000) State 6 (000110) State 25 (011001) State 27 (011011) 11  An Exercise in Microprogramming (cont’d) State 18 (010010) 10 0 00 0 1 1 00 0 0 0 0 X X XX X XX X XXXX State 33 (100001) State 35 (100011) State 32 (100000) State 6 (000110) State 25 (011001) State 27 (011011) 12