IC Fabrications PDF

International & Access Foundation Programmes - The presentation is for an Engineering Module, Semester 1, Electronic & Electrical Engineering course. - The specific part of the course is Integrated Circuits & Microprocessors. - The lecturer is Dr Nevan Bermingham. Integrated Circuits...

International & Access Foundation Programmes - The presentation is for an Engineering Module, Semester 1, Electronic & Electrical Engineering course. - The specific part of the course is Integrated Circuits & Microprocessors. - The lecturer is Dr Nevan Bermingham. Integrated Circuits - Integrated circuits (ICs) are collections of electronic components (transistors, diodes, resistors). - These components are fabricated and interconnected on a small chip of semiconductor material. - Silicon (Si) is the most widely used semiconductor material due to its properties and low cost. - Other materials, such as germanium (Ge) and gallium arsenide (GaAs), are less common. - The term \"solid-state electronics\" is used because the circuits are fabricated into a single solid piece of material. Levels of Integration in Microelectronics - This topic details the progression of integrated circuits over time, characterized by increasing complexity and the number of devices on a chip. - Data includes number of devices and approximate year for Small Scale Integration (SSI), Medium Scale Integration (MSI), Large Scale Integration (LSI), Very Large Scale Integration (VLSI), Ultra Large Scale Integration (ULSI) & Giga scale integration. Overview of IC Technology - ICs consist of hundreds, thousands, or millions of microscopic electronic devices. - These devices are fabricated and interconnected on a silicon chip. - The chip is a thin rectangular plate, typically measuring 5 to 25 mm on a side and 0.5 mm thick. - Each electronic device (e.g., transistor) is made up of layers with different electrical properties, which work together to perform the device\'s function. Packaging of ICs - ICs must be packaged outside the clean room to protect them from environmental damage. - This involves attaching the chip to leads and encapsulating it in a package. - The package protects the chip from moisture, corrosion, temperature fluctuations, vibration, and shock. - The package typically includes leads that electrically connect the IC to external circuits. Processing Sequence for Silicon-based ICs - Sand is refined into pure silicon and formed into wafers. - Fabrication involves creating, altering, and removing thin layers to form electronic devices; lithography defines the regions for processing on the wafer surface. - Packaging processes test, cut into units, and encapsulate these chips in a suitable package. Clean Rooms - ICs are fabricated in a controlled environment called a clean room to reduce contamination from foreign particles and airborne contamination. - This maintains a high level of cleanliness, crucial for maintaining feature size. - The level of cleanliness is directly related to the size of the microscopic features present on the integrated circuits, decreasing annually. - Cleanliness standards are measured in the number of particles per cubic foot of air (e.g., class 100 or class 10). Silicon Processing - Electronic grade silicon (EGS) is the material for fabricating microelectronic chips on substrates. - It constitutes over 95% of the semiconductor devices worldwide. - Purification, crystal growing, and shaping into wafers are critical steps in fabricating the substrate. Electronic Grade Silicon - Silicon is a naturally occurring abundant element primarily found as silica. - Electronic grade silicon is extremely pure polycrystalline silicon. - Impurities are measured in parts per billion (ppb) and are critical to minimizing detrimental effects on performance. Crystal Growing - The silicon substrate for microelectronic chips must be single crystal, with the unit cell oriented in a particular direction - Semiconductor device fabrication requires ultra-high purity silicon. - Wafers must be cut to achieve the desired planar orientation. - The Czochralski process is a common method used to pull a single crystal boule from a pool of molten silicon. Wafer Slicing - A thin, ring-shaped saw blade with diamond grit is used to cut wafers into individual chips from the silicon ingot, in a process called wafer slicing. - Slicing happens at the internal diameter (ID) of the blade to ensure uniformity; thickness, parallelism, and flatness are important considerations. - The accuracy of the slice is critical in reducing kerf loss. Wafer Preparation - Wafer rims are rounded to reduce chipping during handling. - Chemical etching is used to remove damage from slicing. - Polishing provides smooth surfaces to enable subsequent processing. - Chemical cleaning removes residues and organic contaminants. Lithography - ICs consist of many microscopic regions on the wafer. - Steps in planar processes involve adding, altering, or removing layers in selected areas of the wafer. - A geometric pattern representing the circuit design information is transferred to the wafer surface by lithography. Lithographic Technologies - Various techniques exist, including photolithography, electron lithography, X-ray lithography, and ion lithography. - These techniques differ in the type of radiation used to transfer the mask pattern to the wafer surface. Photolithography - Light radiation exposes a photoresist coating on the wafer to transfer the mask pattern. - Ultraviolet (UV) light is commonly used due to its short wavelength, resulting in sharper microscopic circuit imaging. - A mask containing the required geometric pattern prevents unwanted exposure. The Mask in Photolithography - The mask is a thin film of opaque substance on a transparent material (e.g., glass). - It precisely defines the circuit pattern on a wafer, with the film being much thinner than the glass substrate.. - This patterned mask is used to expose the photoresist on the wafer. Photoresist - Photoresist is an organic polymer sensitive to light in a specific wavelength range. - UV exposure impacts photoresist\'s solubility, controlled by the pattern on the mask. - Photoresists are crucial for selectively altering the wafer surface. Contact Printing - The mask is pressed against the resist during exposure. - Advantages include high resolution, but disadvantages include physical wear on the mask. Proximity Printing - The mask is separated from the resist by a small gap for exposure. - Eliminates mask wear. - Image resolution is slightly reduced compared to contact printing. Projection Printing - An advanced method using high-quality lenses or mirrors to project the mask pattern onto the wafer. - It\'s a non-contact method, improving resolution and eliminating mask wear. Processing Sequence in Photolithography - The silicon wafer\'s surface is oxidized to form SiO2. - This step prepares the wafer for subsequent photolithographic processes. - The process is then implemented by the described steps in a negative photoresist process. IC Packaging (Part III) - IC packaging is a final fabrication step. - Steps include connecting components to external circuits and protecting them from environmental damage. Design Issues in IC Packaging - Electrical connections to external circuits. - Protection from environmental factors like humidity, corrosion, and temperature. - Heat dissipation, and device performance, reliability, and lifespan. - Cost of manufacturing is a critical concern. Manufacturing Issues in IC Packaging - Separating the chips from the wafer. - Connecting each chip to a package. - Encapsulating the chip in a package. - Testing the finished ICs. Input/Output (I/O) Terminals - The challenge is to connect multiple internal circuits to external circuits through a relatively smaller number of I/O terminals. - Device size reduction and increasing numbers of devices increase the complexity of interconnect. IC Package Materials - Ceramic (alumina - Al2O3) - Provides excellent hermetic sealing and allows for complex designs. - Has disadvantages due to dimensional shrinkage during firing. - Plastic (e.g., epoxy, polyimide) - Lower cost but less robust. - Commonly used in mass-produced ICs where high reliability is not crucial. Two Basic IC Package Styles for Mounting to Printed Circuit Boards (PCBs) - Through-hole mounting (PIH): Components with leads inserted through holes and soldered to the underside of the PCB. - Surface mount technology (SMT): Components mounted directly to the surface of the PCB. Major IC Package Styles - Dual in-line package (DIP): A common style, available for through-hole and surface mount configuration. - Square package: Leads arranged around the periphery with the number of terminals on a side divisible by four (e.g., 8, 16, 20). - Pin grid array (PGA): A multi-pin arrangement with closely spaced pins. Final Testing - After packaging, each IC unit undergoes a final test to detect any damage incurred during packaging. - Tests verify proper function and performance characteristics. Yields in IC Processing - IC fabrication involves multiple sequential steps that contribute to yield variations. - Yield loss can result at any stage from defects or failures. - Achieving high yields during wafer processing is critical for profitability in the semiconductor industry. Wafer Processing is Key to Successful IC Fabrication - High yields are a major factor in IC fabrication\'s profitability. - High-quality production requires: purest starting materials; modern tools and processes; process control; well maintained clean rooms; and competent testing procedures.