Embedded Systems Exam Reviewer PDF

1.​ A method of converting a Energy-Efficiency continuous signal to a discrete set 11.​In the context of sensors, what of values (samples). does the term "resolution" refer to? Sampling The smallest detectable chang...

1.​ A method of converting a Energy-Efficiency continuous signal to a discrete set 11.​In the context of sensors, what of values (samples). does the term "resolution" refer to? Sampling The smallest detectable change in 2.​ A level of complexity in embedded the quantity being measured system development where it is 12.​In the Savage mountain zone of easy to fall for the misconception complexity management that when system complexity is effectiveness, companies benefit low, it is not crucial. from both a consciously limited Flip-flop zone system complexity and a high 3.​ A complexity where an embedded ability to cope with almost any level system is to fulfill its tasks in of complexity. possible events. Goldilocks zone Dimensions of complexity 13.​Algorithmic level measures include 4.​ Which of the following is an smart power management of example of an electromechanical various system blocks, utilization of actuator? pipelining and parallelism, design Temperature Sensor of bus structures, and voltage 5.​ Low power design level that scaling. includes the power optimization Architectural techniques which can be done only 14.​What is the primary function of on the hardware side of the Dynamic Voltage and Frequency system. Scaling (DVFS) in low-power Logic/circuit design level embedded systems? 6.​ Power management is the practical To adjust the system clock ratio of power output to the total frequency and supply voltage power input provided to a system. dynamically Power efficiency 15.​System complexity can be 7.​ Identify which among the following prevented from the start by picking is not a complexity in embedded a proper operational design systems. domain that balances complexity Growing importance of embedded with the fulfilment of customer systems requirements. 8.​ Control system uses an actuator to TRUE drive a measurand in the real world 16.​Companies in the extreme to a desired value. mountaineering zone have found TRUE the means necessary to survive in 9.​ Static power dissipation during a a high-system-complexity signal switching at the cell input situation—but at high cost. during and discharging of the TRUE capacitances in the circuit. 17.​Amplitude resolution is defined as Dynamic the smallest to largest input value 10.​Deploying low-power operation that can be measured. contributes to minimizing the Amplitude range environmental impact and overall 18.​What is the primary function of an energy consumption of the actuator in embedded systems? embedded systems which enables To control and manipulate the what? physical world 19.​Which of the following is an 29.​Time difference between one example of a sensor used in data sample and the next. acquisition? Time quantization Potentiometer 30.​Is an entity that processes a set of 20.​Which power-saving technique signals (inputs) to yield another set involves temporarily turning off the of signals (outputs) power supply to certain system System components when they are not in 31.​Data acquisition is the process of use? sampling signals that measure Power Gating real-world physical conditions and 21.​What is the primary purpose of converting the resulting samples data acquisition in embedded into digital numeric values that can systems? be manipulated by a computer. To acquire and convert analog 32.​These guides are the backbone of signals to digital success in such highly demanding 22.​A strategy for complexity endeavors. A similar trend management where it implements becomes apparent when we the process of standardization. consider embedded system Reduce and drop development. 23.​How does the use of low-power Extreme mountaineering zone modes, such as Sleep or 33.​Practical process of controlling Hibernate, contribute to power power use in a system by savings in embedded systems? hardware or software. By minimizing power to inactive Power Management components 34.​Low-power operation is a critical 24.​The ADC resolution is the smallest aspect of embedded systems distinguishable change in input. design that aims to reduce energy TRUE 35.​consumption while maintaining 25.​Common complexity in performance. organizations 36.​Why do we need low power All of the above design? 26.​A linear transducer is an Embedded systems need to be input/output function that does not energy efficient during operation to have a mathematical inverse. ensure a long battery lifetime, nonmonotonic transducer reduce utility power consumption, 27.​Key Differences Between and prevent excess heat Actuators and Sensors generation. A sensor will convert any physical attribute to a control signal, while an actuator does the opposite, changing the control signal to physical action. 28.​That is defined as the number of distinct values from which the measurement is selected. The units of precision are given in alternative or bits. Amplitude precision  MOBILE AND NETWORKED EMBEDDED cell phones, digital cameras, mp3 players, SYSTEMS and personal digital assistants. These systems are controlled by mobile operating 1. What are mobile and network embedded systems and are characterized by their systems? limited resources and memory. All mobile Mobile embedded systems are designed embedded systems are standalone to be portable and include devices such as embedded systems, but not all standalone cell phones, digital cameras, and personal embedded systems are mobile. digital assistants. These systems are controlled by mobile operating systems and 4. What are the limitations of a mobile are limited by resources like memory. embedded system? Network embedded systems are The limitations of a mobile embedded embedded systems connected to a network system include limited resources and (LAN, WAN, or the Internet) to access memory, lack of an excellent user interface resources and provide outputs to other (UI), and potential memory issues. systems. These systems can use wired or wireless connections and are commonly 5. What is the android kernel based on? implemented with BUS and Ethernet The Android kernel is based on the Linux networks. kernel. 2. Importance of mobile and network 6. What is/are the supported driver(s) by the embedded systems? Industry? android kernel? Mobile and network embedded systems The Android kernel supports the following are crucial due to their ubiquity and drivers: display driver, keyboard driver, audio connectivity, as they are integral to numerous driver, power management, Wi-Fi driver, devices and enable seamless camera driver, and other sensor drivers. communication and data exchange. They play a significant role in the Internet of Things 7. What is a network embedded system? (IoT) and Industry 4.0, facilitating the A network embedded system is an connection and interaction of smart devices embedded system connected to a network and transforming industries through (LAN, WAN, or the Internet) to access automation and data exchange. These resources and provide output to other systems enhance user experience by systems. The connection can be either wired providing intuitive interfaces and or wireless. personalized services, while also optimizing processes and reducing human intervention 8. Give me an example of a network embedded through automation. system? In the industry, mobile and network An example of a network embedded embedded systems revolutionize sectors like system is a home security system where all healthcare, transportation, and logistics by sensors are connected and run on the TCP/IP streamlining operations and enabling real- protocol. time monitoring and control. They collect and transmit valuable data in real-time, allowing 9. Give me an example of an application of a businesses and individuals to make informed network embedded system? decisions, optimize processes, and improve An example of an application of a network efficiency. These systems enable remote embedded system is a point of sale (POS) monitoring, predictive maintenance, and the system. automation and optimization of processes, creating opportunities for new business 10. Why is wireless communication important in models and services that cater to the growing embedded systems? demand for smart and connected devices. Wireless communication is important in embedded systems because it enables 3. What is a mobile embedded system? devices to transmit and receive information A mobile embedded system is designed without physical connections, ensuring to be portable and includes devices such as speed, flexibility, and network efficiency. This  facilitates applications in IoT, telecom of SDA (data line) and SCL (clock line). I2C equipment, multimedia electronics, and enables low-speed communication and automotive devices, allowing seamless supports multiple devices through unique connectivity across different environments addressing, making it suitable for scenarios and enhancing productivity and data requiring simplicity and low power exchange. Wireless technologies like Wi-Fi, consumption. Bluetooth, Zigbee, and LPWAN are widely used to support diverse requirements such 16. What is an OSI model? as range, data rate, and power efficiency The OSI model is a conceptual framework developed by the International Organization 11. Give me examples of wireless for Standardization (ISO) in 1984. It defines a communication technology? seven-layer architecture for a complete Examples of wireless communication communication system: Application Layer, technologies include Wi-Fi, Bluetooth, Presentation Layer, Session Layer, Transport Zigbee, Cellular Networks (2G, 3G, 4G LTE, Layer, Network Layer, Data Link Layer, and 5G), and Low-Power Wide Area Network Physical Layer. It provides a reference for (LPWAN). understanding the components and functions of network communication 12. What are the three layers of IoT architecture? systems. The three layers of IoT architecture are: 1. Perception Layer – Represents the 17. What are the 7 layers? sensors and actuators that collect data. 2. Network Layer – Connects devices and transmits data to back-end services. 3. Application Layer – The interface users interact with, such as dashboards or control apps. 13. What is the role of the perception layer? The perception layer represents the physical IoT devices, including sensors and actuators, that collect data from the environment. 18. Which of the 7 handles physical addressing? The Data Link Layer handles physical 14. What is UART? addressing. UART (Universal Asynchronous Receiver/Transmitter) is a communication 19. What is the characteristic of a 5G? protocol widely used for short-distance 5G offers significantly higher data rates, device communication. It requires only two lower latency, and massive device wires, RX (receive) and TX (transmit), to connectivity compared to previous transmit data asynchronously. generations. It enables real-time applications, ultra-high-definition video 15. SPI vs I2C? streaming, autonomous systems, and large- SPI (Serial Peripheral Interface) and I2C scale IoT deployments. (Inter-Integrated Circuit) are both communication protocols used in embedded 20. What is the role of edge computing in IoT? systems but differ in their features and The role of edge computing in IoT is to applications. SPI is commonly employed for enhance processing capabilities and reduce communication between microcontrollers latency by moving computation and data and peripherals, offering high-speed data processing closer to the network's edge, transmission and a master-slave architecture where the data is generated. This helps in that supports multiple devices. In contrast, real-time decision-making and alleviates I2C is widely used for communication bandwidth constraints. between microcontrollers and sensors, operating on a two-wire serial bus consisting 21. What are the challenges of mobile and continuous monitoring and early detection of network embedded systems? health issues. The challenges of mobile and network embedded systems include: 26. What are the common wireless network 1. Security Concerns: Vulnerabilities and security threats? data privacy issues due to vast amounts Common wireless network security threats of information exchanged. include: 2. Interoperability: Lack of standardized 1. Eavesdropping protocols and communication interfaces, 2. Man-in-the-Middle attack leading to integration issues. 3. IP address and MAC address spoofing 3. Power Consumption: Energy-efficient 4. Denial-of-Service (DoS) attack design is required for battery-powered devices, with high power consumption 27. How can a wireless network be secured? posing environmental concerns. A wireless network can be secured by: 4. Complexity and Development Costs: Keep Wireless Network Safe – Sophisticated design requires skilled Implementing policies and regularly professionals and resources, while reviewing them. balancing functionality with cost Discovery and Vulnerability Assessment constraints. – Using discovery tools to detect rogue access points and unauthorized 22. What is interoperability? connections. Interoperability refers to the ability of Disable SSID (Service Set Identifier) – diverse devices and systems to work together Disabling SSID to make the network seamlessly, which is challenging due to the invisible. lack of standardized protocols and Secure Network with VPN – Securing the communication interfaces. network with VPNs for encrypted connections. 23. Why is interoperability a problem? Use Personal Firewalls – Installing Interoperability is a problem due to the personal firewalls and applying security lack of standardized protocols and patches. communication interfaces, making seamless Periodic Network Reviews – Conducting integration of different embedded systems periodic network reviews for complex. vulnerabilities. 24. How does embedded system contribute to 28. How is IoT used in agriculture? Industry 4.0? IoT is used in agriculture by: Embedded systems contribute to Industry Monitoring soil temperature to plant crops 4.0 by driving the transition to optimize as early as possible. processes through automation and data Using autonomous tractors and GPS- exchange. They are fundamental in powered equipment. facilitating the connection and Conducting root cause analysis of communication of smart devices. machinery issues via mobile apps. Automatically adjusting water, 25. What are the potential applications of temperature, and humidity levels for network embedded systems in healthcare? indoor growing operations. Network embedded systems have potential applications in healthcare, 29. What are the applications of IoT in including remote healthcare monitoring manufacturing? through wearable devices, which enables Applications of IoT in manufacturing include: real-time tracking of patient health. They also Measuring change over time using short- facilitate telemedicine and remote patient range IoT sensors. care, enhancing access to medical services. Developing demand forecasts by Additionally, these systems promote monitoring production rates in real-time. preventive healthcare by providing Tracking cycle time to understand baseline efficiency.  Monitoring fluid levels, conductivity, and other data points for preventive 35. What is Ethernet for an embedded system? maintenance. Ethernet for an embedded system is a networking technology used to connect 30. Give me examples of LPWAN. embedded devices to a local area network LPWAN (Low-Power Wide Area Network) (LAN) or the internet, enabling technologies, like LoRaWAN and NB-IoT communication and data exchange between (Narrowband IoT), cater to the specific devices. requirements of IoT devices that need long- range communication with low power 36. What is the role of business layer? consumption. Examples of LPWAN The Business layer in IoT architecture is technologies include Sigfox, LoRaWAN, NB- where information is transformed into IoT, and LTE-M. business intelligence that drives decision- making. It involves stakeholders using 31. What is MQTT? insights collected at the application layer to MQTT (Message Queuing Telemetry make better business decisions. This layer Transport) is a lightweight, publish- typically relies on reports and live subscribe, machine-to-machine network dashboards for business intelligence. protocol for message queue/message queuing service. It is designed for 37. What is the main advantage of IoT? connections with remote locations that have The main advantage of IoT is cost devices with resource constraints or limited reduction. IoT devices quickly identify network bandwidth, such as in the Internet of problems, saving time and reducing the costs Things (IoT). of large repairs. 32. What is Zigbee best for? 38. What is the significant disadvantage of IoT? Zigbee is best for low-power, low-data- The significant disadvantage of IoT is rate wireless communication in IoT security. The data is traveling all over the applications, such as home automation, Internet, making it vulnerable to industrial control, and smart energy unauthorized access and cyberattacks. End- management systems. to-end encryption is essential to maintain privacy and security. 33. What is a CAN bus? A CAN bus (Controller Area Network) is a 39. What is mesh networking? vehicle bus standard designed to enable Mesh networking is a network topology efficient communication primarily between where each node relays data for the network. electronic control units (ECUs) in vehicles. All nodes cooperate in the distribution of data in the network. This type of network is 34. Zigbee vs Bluetooth decentralized, with each node dynamically Zigbee is best suited for low-power, low- self-organizing and self-configuring, which data-rate wireless communication in IoT increases the network's reliability and applications, such as home automation, resilience. industrial control, and smart energy management systems. On the other hand, 40. How will 5G transform embedded systems? Bluetooth offers a higher data transfer rate (1- 5G will transform embedded systems by 3 Mbps) and is ideal for short-range providing higher data rates, lower latency, communication, typically around 10 meters. and greater reliability. This will enable real- Bluetooth is commonly used for time data processing, support for a massive streaming audio, video, and other short- number of simultaneous connections, and range communication needs. Zigbee enhanced capabilities for applications such operates with a mesh networking topology, as autonomous vehicles, smart cities, and providing longer range (up to 100 meters) and industrial automation. is particularly useful for applications requiring extended battery life and reliable communication over larger areas.  ADVANCED TOPICS ON INPUT/OUTPUT Interrupt Requests In addition to the processor using the data bus, INPUT/OUTPUT OPERATIONS IN address bus and special I/O pin to communicate MICROPROCESSORS with external devices; the external devices use The operation of the I/O devices is usually another pin when they need the attention of the independent of that of the microprocessor, and a processor called the Interrupt Request (IRQ) Line. procedure must be adopted to synchronize Two types of interrupt lines on all processors: program execution with their operation during Maskable interrupts data transmission. Maskable in this case means that interrupts There are three basic types of input-output can be selectively enabled or disabled by the according to the method of controlling and software. synchronizing data transfer: Non-maskable interrupt Program-controlled I/O The software can never disable this kind of Interrupt-controlled I/O interrupt. It most often used to perform the Direct-memory-access I/O DRAM refresh on memory chips, which MUST The type of input-output used in a particular occur at regular intervals in order to keep application will depend on three main factors: memory contents alive. The rate at which data must be transmitted. The maximum time delay which can be accepted between the I/O device signaling its readiness to transmit or receive data and the data transfer actually taking place. The feasibility of interleaving input-output and other microprocessor operations. The Address Bus By toggling a special pin, the CPU can switch from using the address bus for accessing RAM, to using the address bus to talk to other semi- intelligent chips that are also connected to the address bus. PROGRAM-CONTROLLED I/O The Data Bus In program controlled I/O, the transfer of data Once the CPU has placed the proper address is completely under the control of the on the address bus and it asserts the special I/O microprocessor program. This means that the pin, all RAM chips are temporarily disabled, and data transfer takes place only when an Input- the external I/O chips are read or written from Output transfer techniques instructions instead. The bytes of data are actually transferred executed. In most of the cases it is necessary to on a second set of pins called the data bus. check whether the device is ready for data The data bus is nothing more than a series of transfer or not. pins on the processor that are used to get data Two basic types of information are transmitted into, or out of, the processor chip itself. between the microprocessor and the I/O device. The Control Bus These are message data and control data. The control bus is the assembly of conducting The control data is used to synchronize the wires, useful for producing timing and control operation of the device with the execution of the signals to supervise the respective peripherals. A program before transmission of the message data microprocessor uses the control bus to process takes place. The input control data is called the data and it contains control signals, which are device status word. The output control data is inclusive of signals for choosing the memory or called the device command word. I/O device from the provided address, data With program-controlled I/O, the input-output transfer direction, and integration of data transfer instructions are used to initiate and control the for slower devices. transfer of all types of data. Interrupt Controller The interrupt controller is a component that gathers all the hardware interrupt events from the SOC and platform and then presents the events to the processor.  The status word is read into the Program Controlled I/O (Status Loop) microprocessor to determine the current state of The control data is used to synchronize data the device. Each bit of the status word will transfer under program control in the following indicate a particular device condition such as way: message data ready for transmission, device a) A command word is written out to the I/O busy, device unavailable, or transmission error. device to request transfer of message data. The command word is sent out from the b) The status word is read in from the I/O device. microprocessor to control the operation of the c) The appropriate status bits are checked to test device. Each bit of the command word has a if message data transfer can take place. particular function such as stop motor, increment d) If the device is not ready, steps (ii) and (iii) are feed, or change transmission rate. repeated until the I/O device is ready for data The input-output instructions can be organized transfer. in one of the three ways: e) The message data is read (or written) from (or 1. A unique instruction is provided for each kind to) the I/O device. This operation will reset the of I/O data transfer using a single device status of the I/O device. address to define each I/O device. Typically, Program Controlled I/O (Interleaved Operation) the four instructions are: More sophisticated schemes where the status a. Read data (input message data) check operation is interleaved with other b. Write data (output message data) microprocessor operations, can use the c. Send command (output command word) processor time more efficiently. The problem is d. Accept status (input status word) particularly significant in a microprocessor 2. Two I/O instructions, one for input and one for system which communicates with several I/O output, are provided for both message and devices, since periodic status checks must be control data transfer. Two device addresses made on each of the devices. are used to differentiate between transmission This device polling operation may also of message or control data for a particular I/O introduce a considerable time delay between a device. Typically, the two instructions are: device indicating readiness for data transfer, and a. Read data (input either message data or the program sensing that readiness and the data status word) transfer actually taking place. b. Write data (output either message data or In some microprocessor, the time spent in command word) checking device status is reduced by using a 3. No separate I/O instructions are provided. The single test line. memory data transfer instructions are also Program Controlled I/O (Test Line) used to communicate with the I/O devices by The microprocessor can periodically and assigning a block of unused memory rapidly check the status of this one line and thus addresses as the device addresses. The avoid polling the individual devices until one of approach is called memory-mapped I/O and the devices has signaled that attention is is common in microprocessor systems which required. The time delay before servicing a device have a unified bus structure. Although the may still be considerable. available memory address area is made Example of Program-Controlled I/O smaller, this approach can reduce both A teletype is used as the output device for a program storage requirements and program microprocessor-based instrument. The results of execution times. The equivalent I/O data processing are first stored in a memory instructions are typically: buffer and then written out to the teleprinter a. Load data (input message data or status under program control. word) The device status word and device command b. Store data (output message data or word for the teletype are given below: command word) Memory-mapped I/O is an approach that instead of asserting the I/O pin and addressing a data port, the processor just accesses a memory address directly. The external device can have a small amount of RAM or ROM that the processor just reads or writes as needed. INTERRUPT-CONTROLLED I/O Example of Interrupt-Controlled I/O The major disadvantage of program-controlled An interactive computer system is based on a I/O arises from the necessity for periodically visual-display-terminal linked to a leaving the main data processing section of the microcomputer. The main-line program program to check whether any device is ready for communicates with the operator by writing out, data transfer. The checking procedure, which under program control, information onto the must occur whether or not any device is ready, display screen. At any time, the operator can can waste valuable processing time. The problem modify the program flow and change the is overcome in many microprocessors by information presented on the screen by entering introducing an interrupt system which allows the control character at the keyboard. An interrupt I/O devices to break into (or interrupt) the main request is generated whenever a key is program execution when, and only when, they are depressed. Data input takes place under ready for data transfer. interrupt-control. In the simplest type of interrupt system, only one I/O device is connected to a single interrupt request line. The occurrence of a signal on this line causes the microprocessor to automatically initiate the following minimal sequence of operations: a) Complete execution of the current program Real-Time Operation instruction. The synchronization is achieved by connecting b) Store the current contents of the program an external pulse generator of known and counter. constant frequency to the interrupt request line. c) Load the program counter with a predefined The program is interrupted periodically with a program memory address. known time between interrupts. The input-output d) Inhibit interrupts and resume normal program operations can be synchronized to “real-time” by execution according to the new contents of the counting the interrupt requests and controlling program counter. program flow accordingly. Used in this way, the Thus, recognition of an interrupt request signal external pulse generator, which usually consists causes a jump from the main-line program to a of a high frequency oscillator (typically about predetermined location in program memory (the 1MHz) feeding a chain of frequency dividers, is interrupt trap address). In a simple system, with called a real time clock. only one I/O device capable of generating Example of Real-Time Operation interrupts, the device service program which An online data acquisition system is based on controls the actual data transfer is loaded from a microprocessor-controlled multichannel the interrupt trap address. analog-to-digital converter. A 50Hz real-time After completing the device service program, clock is used to control the sampling rate of the the previously stored contents of the program system. In one application, the analog signals on counter provide the return address to link back channel 2 and channel 4 are sampled, digitized and continue execution of the main-line program. and stored in memory at two-second time Interrupts are automatically inhibited before the intervals. The device status words and device start of execution of the device service program to command words for the analog-to-digital prevent multiple interruption by the same converter (ADC) and red time clock (RTC) given: interrupt request signal. In some microprocessors, the instruction cawing the jump back to the main-line program also re- enables interrupts. Interrupts are inhibited by setting an interrupt mask bit within the microprocessor. In most systems the mask bit is part of the main processor status register and can also be set or reset by software. The mask bit is frequently used to prevent the interruption of certain sections of program which must be executed without a break Interrupt Servicing in a Multiple Interrupt Interrupt Priority Schemes System With several sources of interrupt there is The simple interrupt servicing procedure always the possibility of one or more interrupt described above is only appropriate in systems requests occurring during the servicing of an which have a single I/O device generating earlier interrupt request. In the simpler interrupt interrupts. Many microprocessor systems have systems, the interrupt mask bit automatically set more than one source and more than one type of when the first request is recognized. Subsequent interrupt. Three main types of interrupts may be interrupt requests join a queue. They wait until the defined as: service of the first interrupt has been completed External interrupts generated from one or before they can in turn be recognized and more I/O devices. serviced. The order in which the queued Internal interrupts generated by the interrupts are recognized is a critical factor in microprocessor system itself to indicate the determining the time delay before service. The occurrence of particular conditions or errors order or priority is dictated either by software or (e.g., power failure, system mal- function, by hardware. transmission error). Software priority Simulated interrupts generated by software After recognizing an interrupt request, the to assist in program debugging or interrupt service program polls the I/O devices in an service testing. order which determines the interrupt priority of Recognizing the Source of Interrupt each device. Thus, the highest priority devices, Some microprocessors have several interrupt which are polled first, are serviced first. request lines, each with its own unique interrupt Hardware priority trap address. The recognition problem may be The interrupt control logic of the solved by assigning only one source of interrupt to microprocessor sends out an external signal to each line. This approach is commonly used to control the interrupt request logic in each of differentiate between internal, external, and the I/O devices. The control signal, which simulated interrupts. always rejects the state of the interrupt mask In the majority of microprocessors several I/O bit, passes through each device in turn. devices must use the same interrupt request line. More sophisticated schemes for software In these systems, two methods of recognizing the control of interrupt priority are used in source of interrupt are commonly used: microprocessors which have separate interrupt 1. Device polling mask bits for each of several interrupt request The interrupt causes a jump to the interrupt lines or for each of the interrupting I/O devices. In service program via the interrupt trap address the latter case, the mask bits are often included as described earlier. The initial section of the in the interrupt logic of the I/O device itself. By service program checks the status word of setting and resetting the individual mask bits each I/O device in turn to determine which has under program control, a number of schemes are caused the interrupt. The interrupt status bit, possible in. which interrupt priorities are changed which indicates whether an I/O device has during program execution. generated an interrupt request, is checked for Many microprocessors have two interrupt each device in turn. request lines. One line has a conventional 2. Vectored interrupts software-controlled mask bit whilst the other is In the vectored interrupts microprocessor permanently enabled. This non-maskable system, the interrupt control logic within the interrupt request line has the highest interrupt processor recognizes the interrupting I/O priority and is wed in applications which require device. Each I/O device is assigned a unique immediate service at all times under all device interrupt address. On recognizing an circumstances. interrupt request, the interrupt control logic An example of this would be the orderly shut- requires the interrupting I/O device to transmit down of the microprocessor system following its device interrupt address to the detection of a power failure. The simulated microprocessor. This address is then used to interrupt also has no mask bit, but since it is generate a unique interrupt trap address for the generated by a program instruction it has the device. The trap addresses are usually located lowest interrupt priority. sequentially in program memory and form the Maintaining Program Continuity during interrupt vector. Multiple Interrupt Service  In general, the problem of maintaining program Processor halt continuity in a multiple interrupt environment is An external control line initiates an orderly halt similar to but more complex than that described in the operation of the microprocessor previously for the single interrupt case. following completion of the current In particular, where nesting of interrupts instruction. Since the memory control signals occurs, provision must be made to save (and of the microprocessor are disabled in the halt subsequently restore) the contents of all state, the DMA controller can take over and important microprocessor registers, including the initiate data transfer. return address held in the program counter, for Cycle-steal each of the different interrupt requests which are External control lines initiate a pause in currently being serviced. microprocessor operation by suspending Each level of interrupt service requires its own instruction execution within the instruction unique storage locations in which the information cycle. The processor clock is halted, and the can be saved. The save and restore operations are memory control lines of the microprocessor implemented in one of three basic ways: are disabled. The DMA controller takes over Program-controlled save and restore and “steals” several machine cycles to allow The information is transferred to a unique area data transfer to take place. of memory under program control in a non Memory-sharing interruptable section at the beginning of each The memory is only accessed by the interrupt service program before the interrupt microprocessor at specific times during the mask is reset to allow recognition of further basic machine cycle. At other times it is higher priority interrupts. available for use by other devices. Automatic Stacking DMA Transfers The interrupt control logic automatically stores The processor on the external device executes the information onto the memory stack and DMA transfers, without any assistance from the advances the stack pointer whenever an main processor. While the DMA transfer is in interrupt request is recognized. progress, the main processor is free to tend to Special-Purpose architecture other tasks but should not attempt to modify the The microprocessor is provided with several information in the buffer being transfer, until the sets of processor registers and a pointer transfer is complete. register to indicate which set up to be used 1. Once the transfer is stared, the main processor during the current program execution. The is free to tend to other tasks. pointer register is incremented on recognizing 2. The external processor will take over the an interrupt request and decremented on address and data lines periodically and completing the interrupt service. execute the DMA transfer. 3. Once the transfer is complete, the external DIRECT-MEMORY-ACCESS I/O device usually notifies the main processor of Some I/O devices require data transfer at rates this by raising an interrupt request. which are too rapid to permit any type of input- Advantages of DMA output which is under control of the The main processor does not have to transfer microprocessor itself. In these cases, the data into one of its registers, then save that to information must be transferred directly between a memory address for every byte of data. the I/O device and the memory of the While the DMA transfer is in progress, the CPU microprocessor system without microprocessor is free to work on other tasks. This leads to an intervention. The technique is called direct- apparently overall increase in speed. memory-access or DMA. Example of DMA Input-Output The data transfer is controlled by a dedicated A microcomputer is linked to a large computer high-speed logic circuit (the direct-memory- system via a high-speed communication access controller) which is capable of operating channel. Blocks of data are transferred from the at nigher speeds than the microprocessor. During memory of the microcomputer to the DMA data transfer, the microprocessor must communication channel by direct memory- relinquish control of its memory and allow the access. The main-line program, which DMA controller to take over. communicates with the DMA controller using There are several ways in which the DMA program controlled I/O, specifies the data block controller can gain control of the memory: and initiates the DMA operation.  COMPUTING PLATFORMS FOR EMBEDDED single chip platform makes the development of SYSTEMS certain types of embedded systems much easier, providing the rich software BASIC COMPUTING PLATFORMS development of a PC with the low cost of a While some embedded systems require single-chip hardware platform. sophisticated platforms, many can be built Microcontrollers around the variations of a generic computer The term microcontroller refers to a single chip system ranging from 4-bit microprocessors that includes a CPU, memory, and I/O devices. through complex systems-on-chips. The term was originally used for platforms based on small 4-bit and 8-bit processors but Platform Hardware Components can also refer to single-chip systems using It was familiarized that the CPU and memory large processors as well. Application Example: as an idealized computer system. A practical System Organization of the PIC16F882 Figure 2 computer needs additional components. As is the block diagram of the PIC16F882 (as well shown in Figure 1, a typical computing platform as the 883 and 886) microcontroller. includes several major hardware components: The CPU provides basic computational facilities. RAM is used for program and data storage. ROM holds the boot program and some permanent data. A DMA controller provides direct memory access capabilities. Timers are used by the operating system for a Platform Software Components variety of purposes. Hardware and software are inseparable – each A high-speed bus, connected to the CPU bus needs the other to perform its function. Much of through a bridge, allows fast devices to the software in an embedded system will come communicate efficiently with the rest of the from outside sources. Some software system. components may come from third parties. A low-speed bus provides an inexpensive way Hardware vendors generally provide a basic set of to connect simpler devices and may be software platform components to encourage use necessary for backward compatibility as well. of their hardware. These components range across many layers of abstraction. Layer diagrams are often used to describe the relationships between different software components in a system. Figure 3 shows a layer diagram for an embedded system. The hardware abstraction layer (HAL) provides a basic level of abstraction from the hardware. A wide range of buses are used in computer systems. The Universal Serial Bus (USB), for example, is a bus that uses a small bundle of serial connections. For a serial bus, USB provides high performance. Access patterns Data transfers may occur between many pairs of components: CPU to/from memory, CPU to/from I/O device, memory to memory, or I/O to I/O device. Because the bus connects all these components (possibly through a bridge), it can mediate all types of transfers. Single-chip platforms Designers can also put all the components for a basic computing platform on a single chip. A  o Input and output devices: If we use a DESIGNING WITH COMPUTING PLATFORMS platform built out of many low-level components on a printed circuit board, we Example Platforms may have a great deal of freedom in the I/O The design complexity of the hardware devices connected to the system. platform can vary greatly, from a totally off-the- Software - In thinking about software shelf solution to a highly customized design. A components of the platform, it generally platform may consist of anywhere from one to thought about both the run time components dozens of chips. and the support components. Run-time Open-Source Platforms components become part of the final system: The BeagleBoard is the result of an open- the operating system, code libraries, and so source project to develop a low-cost platform on. Support components include the code for embedded system projects. The processor development environment, debugging tools, is an ARM Cortex_-A8, which also comes with and so on. several built-in I/O devices. Evaluation Boards Intellectual Property Chip vendors often provide their own Intellectual property (IP) is something that evaluation boards or evaluation modules for someone can own but not touch: software, their chips. The evaluation board may be a netlists, and so on. Just as need to acquire complete solution or provide what you need hardware components to build a system, it also with only slight modifications. needs to acquire intellectual property to make that hardware useful. Here are some examples of Choosing a Platform the wide range of IP that can be used in This topic is not designing the platform for embedded system design: embedded system from scratch. It may assemble run-time software libraries; hardware and software components from several software development environments; sources; may also acquire a complete schematics, netlists, and other hardware hardware/software platform package. A number design information. of factors will contribute to decision to use a particular platform. Development Environments Hardware - The hardware architecture of the Although designer may use an evaluation platform is the more obvious manifestation of board, much of the software development for an the architecture because you can touch it and embedded system is done on a PC or workstation feel it. The various components may all play a known as a host. The hardware on which the code factor in the suitability of the platform. will finally run is known as the target. The host and o CPU: An embedded computing system target are frequently connected by a USB link, but clearly contains a microprocessor. But a higher-speed link such as Ethernet can also be which one? There are many different used. architectures, and even within an A cross-compiler is a compiler that runs on architecture we can select between models one type of machine but generates code for that vary in clock speed, bus data width, another. After compilation, the executable code integrated peripherals, and so on. is typically downloaded to the embedded system o Bus: The choice of a bus is closely tied to by USB. Designers often create a testbench that of a CPU, because the bus is an integral program that can be built to help debug part of the microprocessor. But in embedded code. The testbench generates inputs applications that make intensive use of the to stimulate a piece of code and compares the bus due to I/O or other data traffic, the bus outputs against expected values, providing may be more of a limiting factor than CPU. valuable early debugging help. o Memory: Once again, the question is not The watchdog is a useful technique for whether the system will have memory but monitoring the system during operation. the characteristics of that memory. The Watchdogs, when used properly, can help to most obvious characteristic is total size, improve the system’s safety and security. The which depends on both the required data most basic form of a watchdog is the watchdog volume and the size of the program timer. This technique uses a timer to monitor the instructions. correct operation of software. Debugging Techniques Debugging Challenges A good deal of software debugging can be done Logical errors in software can be hard to track by compiling and executing the code on a PC or down, but errors in real-time code can create workstation. But at some point, it inevitably problems that are even harder to diagnose. Real- becomes necessary to run code on the time programs are required to finish their work embedded hardware platform. Embedded within a certain amount of time; if they run too systems are usually less friendly programming long, they can create very unexpected behavior. environments than PCs. Example: A Timing Error in Real-Time Code Another very important debugging tool is the breakpoint. The simplest form of a breakpoint is for the user to specify an address at which the program’s execution is to break. When the PC reaches that address, control is returned to the monitor program. From the monitor program, the CONSUMER ELECTRONICS ARCHITECTURE user can examine and/or modify CPU registers, In this part, consumer electronics devices are after which execution can be continued. considered as an example of complex embedded Implementing breakpoints does not require using systems and the platforms that support them. exceptions or external devices. Consumer electronics use cases and LEDs as debugging devices requirements Never underestimate the importance of LEDs Although some predict the complete (light-emitting diodes) in debugging. As with convergence of all consumer electronic serial ports, it is often a good idea to design in functions into a single device, much as has a few to indicate the system state even if they happened to the personal computer, there still will not normally be seen in use. have a variety of devices with different In-circuit emulation functions. However, consumer electronics When software tools are insufficient to debug devices have converged over the past decade the system, hardware aids can be deployed to around a set of common features that are give a clearer view of what is happening when supported by common architectural features. the system is running. The microprocessor in- 1. Functional requirements - Consumer circuit emulator (ICE) is a specialized electronics devices provide several types of hardware tool that can help debug software in services in different combinations: a working embedded system. a. Multimedia: The media may be audio, Logic analyzers still images, or video (which includes The logic analyzer is the other major piece of both motion pictures and audio). These instrumentation in the embedded system multimedia objects are generally stored designer’s arsenal. Think of a logic analyzer as in compressed form and must be an array of inexpensive oscilloscopes–the uncompressed to be played (audio analyzer can sample many different signals playback, video viewing, etc.). simultaneously (tens to hundreds) but can b. Data storage and management: display only 0, 1, or changing values for each. Because people want to select what A typical logic analyzer can acquire data in multimedia objects they save or play, either of two modes that are typically called data storage goes hand-in-hand with state and timing modes. To understand why multimedia capture and display. two modes are useful and the difference c. Communications: Communications between them, it is important to remember may be relatively simple, such as a USB that an oscilloscope trade reduced resolution interface to a host computer. on the signals for the longer time window. 2. Nonfunctional requirements - Consumer electronics devices must meet several types of strict nonfunctional requirements as well. Many devices are battery-operated, which means that they must operate under strict energy budgets. A typical battery for a portable device provides only about 75mW, which must support not only the processors and digital electronics but also the display.  3. Use cases - Consider some basic use cases PLATFORM-LEVEL PERFORMANCE ANALYSIS of some basic operations. Selecting an Bus-based systems add another layer of object makes use of both the user interface complication to performance analysis. Platform- and the file system. Playing also makes use level performance involves much more than the of the file system as well as the decoding CPU. Designers often focus on the CPU because subsystem and I/O subsystem. it processes instructions, but any part of the 4. Hardware architectures - The storage system can affect total system performance. system provides bulk, permanent storage. Bandwidth as Performance The network interface may provide a simple The most basic measure of performance we USB connection or a full-blown Internet are interested in is bandwidth–the rate at connection. which we can move data. Ultimately, if we are 5. Operating systems - The operating system interested in real-time performance, we are that runs on the CPU must maintain interested in real-time performance measured processes and the file system. Processes in seconds. are necessary to provide concurrency – for Bus Bandwidth example, the user wants to be able to push Bandwidth questions often come up when we a button while the device is playing back are transferring large blocks of data. For audio. simplicity, let us start by considering the File systems bandwidth provided by only one system 1. DOS file systems - DOS file allocation table component, the bus. Consider an image of (FAT) file systems refer to the file system 1920×1080 pixels with each pixel composed of developed by Microsoft for early versions of 3 bytes of data. This gives a grand total of 6.2 the DOS operating system. FAT can be MB of data. If these images are video frames, implemented on flash storage devices as we want to check if we can push one frame well as magnetic disks; wear-leveling through the system within the 0.033 s that we algorithms for flash memory can be have to process a frame before the next one. implemented without disturbing the basic Bus Bandwidth Characteristics operation of the file system. How do we know how long it takes to transfer 2. Flash memory - Many consumer one unit of data? To determine that, we have to electronics devices use flash memory for look at the data sheet for the bus. A bus mass storage. Flash memory is a type of transfer generally takes more than one clock semiconductor memory that, unlike DRAM cycle. Burst transfers, which move blocks of or SRAM, provides permanent storage. data to contiguous locations, may be more Values are stored in the flash memory cell efficient per byte. as an electric charge using a specialized Component bandwidth capacitor that can store the charge for Bandwidth questions also come up in years. situations that we do not normally think of as 3. Flash file systems - Flash memory has one communications. Transferring data into and important limitation that must be taken into out of components also raises questions of account. Writing a flash memory cell bandwidth. The simplest illustration of this causes mechanical stress that eventually problem is memory. wears out the cell. Today’s flash memories Memory aspect ratio can reliably be written a million times but at A single memory chip is not solely specified by some point, will fail. A wear-leveling flash the number of bits it can hold. Memories of the file system manages the use of flash same size can have different aspect ratios. memory locations to equalize wear while Memory chips do not come in extremely wide maintaining compatibility with existing file aspect ratios, but we can build wider systems. A simple model of a standard file memories by using several memories in system has two layers: the bottom layer parallel. handles physical reads and writes on the Memory access times and bandwidth storage device; the top layer provides a We also have to consider the time required to logical view of the file system. A flash file read or write a memory. Once again, we refer to system imposes an intermediate layer that the component data sheets to find these allows the logical-to-physical mapping of values. Access times depend quite a bit on the files to be changed. type of memory chip used. PLATFORM LEVEL POWER MANAGEMENT Specification The Advanced Configuration and Power The basic function of the clock is simple, but Interface (ACPI) is an open industry standard for we do need to create some classes and power management services. Initially targeted to associated behaviors to clarify exactly how the PCs, it is designed to be compatible with a wide user interface works. Borrowing a term from variety of operating systems. The role of ACPI in mechanical watches, we call the class that the system. ACPI provides some basic power handles the basic clock operation the management facilities and abstracts the Mechanism class. hardware layer, the operating system has its own power management module that determines the policy, and the operating system then uses ACPI to send the required controls to the hardware and to observe the hardware’s state as input to the We have three classes that represent physical power manager. ACPI supports several basic elements: Lights* for all the digits and lights, global power states: Buttons* for all the buttons, and Speaker* for G3, the mechanical off state, in which the the sound output. The Buttons* class can system consumes no power. easily be used directly by Mechanism. As G2, the soft off state, which requires a full discussed below, the physical display must be operating system reboot to restore the scanned to generate the digits output, so we machine to working condition. introduce the Display class to abstract the G1, the sleeping state, in which the system physical lights. appears to be off and the time required to The Buzzer* class allows the buzzer to be return to working condition is inversely turned on or off; we will use analog electronics proportional to power consumption. to generate the buzz tone for the speaker. The G0, the working state, in which the system is Buttons* class provides read-only access to fully usable. the current state of the buttons. The Lights* S4 is a nonvolatile sleep in which the system class allows us to drive the lights. However, to state is written to nonvolatile memory for later save pins on the display, Lights* provides restoration. signals for only one digit, along with a set of The legacy state, in which the system does not signals to indicate which digit is currently being comply with ACPI. addressed. We generate the display by scanning the digits periodically. DESIGN EXAMPLE The Mechanism class keeps track of the Design Example 1: Alarm Clock current time, the current alarm time, whether The first system design example will be an the alarm has been turned on, and whether it alarm clock. It used a microprocessor to read the is currently buzzing. The clock shows the time clock’s buttons and update the time display. only to the minute, but it keeps internal time to Because of understanding I/O, we work through the second. The time is kept as discrete digits the steps of the methodology to go from a rather than a single integer to simplify concept to a completed and tested system. transferring the time to the display. The class Requirements provides two behaviors, both of which run The basic functions of an alarm clock are well continuously. First, scan-keyboard is understood and easy to enumerate. The time is responsible for looking at the inputs and shown as four digits in 12-hour format; we use updating the alarm and other functions as a light to distinguish between AM and PM. We requested by the user. Second, update-time use several buttons to set the clock time and keeps the current time accurate. alarm time. When we press the hour and minute buttons, we advance the hour and minute, respectively, by one. When setting the time, we must hold down the set time button while we hit the hour and minute buttons; the set alarm button works in a similar fashion. We turn the alarm on and off with the alarm on and alarm off buttons. When the alarm is activated, the alarm ready light is on.  The state diagram for scan-keyboard is shown The loop first reads the buttons using in Figure 20. This function is called periodically, read_buttons(). In addition to reading the current frequently enough so that all the user’s button button values from the input device, this routine presses are caught by the system. Because the must preprocess the button values so that the keyboard will be scanned several times per user interface code will respond properly. The second, we do not want to register the same buttons will remain depressed for many sample button press several times. If, for example, we periods because the sample rate is much faster advanced the minutes count on every than any person can push and release buttons. keyboard scan when the set-time and minutes As shown in Figure 21, this can be done by buttons were pressed, the time would be performing a simple edge detection on the button advanced much too fast. input the button event value is 1 for one sample System Architecture period when the button is depressed and then The software and hardware architectures of a goes back to 0 and does not return to 1 until the system are always hard to completely button is depressed and then released. This can separate, but consider the software be accomplished by a simple two-state machine. architecture and then its implications on the hardware. The system has both periodic and aperiodic components–the current time must obviously be updated periodically, and the button commands occur occasionally. It seems reasonable to have the following two major software components: o An interrupt-driven routine can update the current time - The current time will be The process_command() function is responsible kept in a variable in memory. A timer can be for responding to button events. The used to interrupt periodically and update check_alarm() function checks the current time the time. As seen in the subsequent against the alarm time and decides when to turn discussion of the hardware architecture, the on the buzzer. This routine is kept separate from display must be sent the new value when the command processing code because the the minute value changes. This routine can alarm must go on when the proper time is also maintain the PM indicator. reached, independent of the button inputs. o A foreground program can poll the Component Design and Testing buttons and execute their commands - The two major software components, the Because buttons are changed at a relatively interrupt handler and the foreground code, can slow rate, it makes no sense to add the be implemented relatively straightforwardly. hardware required to connect the buttons to Because most of the functionality of the interrupts. Instead, the foreground program interrupt handler is in the interruption process will read the button values and then use itself, that code is best tested on the simple conditional tests to implement the microprocessor platform. The foreground code commands, including setting the current can be more easily tested on the PC or time, setting the alarm, and turning off the workstation used for code development. We alarm. can create a testbench for this code that An important question for the interrupt-driven generates button depressions to exercise the current time handler is how often the timer state machine. We will also need to simulate interrupts occur. A 1-min interval would be very the advancement of the system clock. convenient for the software, but a 1-min timer System Integration and Testing would require a large number of counter bits. It is Because this system has a small number of more realistic to use a 1-s timer and to use a components, system integration is relatively program variable to count the seconds in a easy. The software must be checked to ensure minute. The foreground code will be implemented that debugging code has been turned off. Three as a while loop: types of tests can be performed. First, the clock’s accuracy can be checked against a reference clock. Second, the commands can be exercised from the buttons. Finally, the buzzer’s functionality should be verified.