ECEN 90 Communications 2 Lecture Notes PDF

ECEN 90 - Communications 2 Lemuel G. Tatad College of Engineering and Information Technology Name  Learning Objectives After the completion of the chapter, students will be able to: 1. Co...

ECEN 90 - Communications 2 Lemuel G. Tatad College of Engineering and Information Technology Name  Learning Objectives After the completion of the chapter, students will be able to: 1. Comprehend the need for synchronization. 2. Explain the fundamentals of PLL. College of Engineering and Information Technology  Synchronization Synchronization refers to the coordination of events to occur at the same time, which is crucial in digital communication systems to ensure that data is transmitted and received accurately. In digital communications, synchronization is essential for: o Ensuring that the receiver can correctly interpret the transmitted data. o Minimizing errors caused by timing mismatches. o Maintaining the integrity of the communication link, especially in high-speed data transmission. College of Engineering and Information Technology  Synchronization Types of Synchronization: 1. Frame Synchronization - This process aligns the receiver to the start of data frames. It is crucial for segmenting the incoming bit stream into manageable blocks. - Can use framing bits (specific bits added to indicate the start of a frame) or specific patterns (known sequences) to identify boundaries. - (e.g., voice samples, codewords for error correction, or time slots in a time-shared channel). College of Engineering and Information Technology  Synchronization Types of Synchronization: 1. Frame Synchronization Example: CollegeSource: of Engineering and Frame Synchronization Unit. (n.d.). Information Technology https://www.southampton.ac.uk/~bim/notes/cga/c99/faw.html  Synchronization Types of Synchronization: 2. Network Synchronization - Ensures that multiple transmitters are synchronized to a common clock. This is vital in systems where multiple signals are transmitted simultaneously. - Cellular networks where base stations must coordinate their transmissions to avoid interference. - Examples include transmitting base stations to a mobile receiver crossing the cell boundaries in a mobile cellular system or satellite dishes up linking signals toward a single satellite receiver. College of Engineering and Information Technology  Synchronization Types of Synchronization: 2. Network Synchronization Example: College of Engineering and Source: Overview of Network Synchronization Technology Standardization in ITU-T | NTT Technical Review. (n.d.). Information Technology https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr201602gls.html  Synchronization Types of Synchronization: 3. Carrier Synchronization - Involves generating a reference carrier signal that closely matches the frequency and phase of the transmitted signal. This is necessary for coherent demodulation. - Allows the receiver to accurately recover the original signal from the modulated data. - Example: Radar system College of Engineering and Information Technology  Synchronization Types of Synchronization: 4. Symbol Synchronization- Aligns the receiver's sampling instants with the transmitted symbols(each representing a certain number of bits) to ensure accurate demodulation. - Critical for minimizing symbol errors and ensuring that the receiver samples the signal at the correct times. - Example: Satellite communication College of Engineering and Information Technology  Synchronization Classification of Synchronization: 1. Data-Directed Synchronization- a preamble or specific synchronization bits are transmitted along with the actual information bits. This preamble is designed to provide synchronization information to the receiver. - The synchronization information is sent in a time-multiplexed format on a regular (periodic) basis. The preamble bits help the receiver to quickly and accurately synchronize with the incoming data stream. - Reduced efficiency and Increased power consumption. College of Engineering and Information Technology  Synchronization Classification of Synchronization: 2. Non-Data-Directed Synchronization- synchronization is achieved by processing the received signal itself to extract relevant timing information without the need for additional synchronization bits. - The receiver analyzes the degraded signal to derive synchronization information, relying on the characteristics of the received data rather than explicit synchronization signals. - Longer synchronization time and Increased complexity of the system College of Engineering and Information Technology  Scrambling Scrambling is used to achieve DC balance (equal numbers of 1s and 0s) and to prevent long sequences of identical bits, which can lead to synchronization issues. Helps maintain synchronization and reduces the likelihood of errors during transmission. College of Engineering and Effect of DC Balancing Information Technology  Scrambling Uses of Scrambling 1. DC Balance - Scrambling helps to ensure that the transmitted signal has a balanced number of ones and zeros, which is important for maintaining a zero average DC level. 2. Avoiding Long Sequences - Long sequences of identical bits (e.g., a long run of 1s or 0s) can cause problems in synchronization and can lead to errors in bit detection. 3. Spectral Efficiency- By randomizing the data, scrambling can help to eliminate periodic patterns that may create discrete spectral lines. 4. Improving Error Detection - Scrambled data can improve the performance of error detection and correction algorithms. 5. Enhancing Security - Scrambling can provide a basic level of security by College of Engineering and obscuring the original data pattern. Information Technology  Scrambling Types of Scramblers 1. Pseudorandom Scramblers Utilize a maximum-length shift register to generate a pseudorandom sequence that modifies the input data stream. Ensures a balanced distribution of bits, which helps in maintaining synchronization. College of Engineering and Information Technology  Scrambling Types of Scramblers 2. Self-Synchronizing Scramblers Automatically adjust to the incoming data stream, allowing the receiver to maintain synchronization without additional overhead. Does not require a seed(a starting value or initial input). Commonly used in systems where bandwidth is limited. Examples are ITU-T V.34 modem and IEEE 802.3cg. College of Engineering and Information Technology  Scrambling Advantages and Disadvantages of scrambling Advantages: Improved throughput and power efficiency, as scrambling does not require additional bandwidth. Disadvantages: Increased complexity in the receiver design, as it must be able to decode the scrambled data. College of Engineering and Information Technology  Phase-Locked Loop (PLL) A PLL is a control system that generates a signal with a fixed relation to the phase of a reference signal. It is widely used for carrier recovery and synchronization in communication systems. Basic components of a phase-locked loop. College of Engineering and Information Technology  Phase-Locked Loop (PLL) Components of a PLL: 1. Phase Detector Compares the phase of the input signal with the output of the VCO and produces an error signal based on the phase difference. College of Engineering and Information Technology  Phase-Locked Loop (PLL) Components of a PLL: 2. Loop Filter Smooths the output of the phase detector to control the VCO, filtering out high-frequency noise and ensuring stable operation. College of Engineering and Information Technology  Phase-Locked Loop (PLL) Components of a PLL: 3. Voltage-Controlled Oscillator (VCO) Generates a signal whose frequency is controlled by the input voltage from the loop filter, allowing it to adjust to the incoming signal. College of Engineering and Information Technology  Phase-Locked Loop (PLL) Uses of PLL Frequency Synthesis - PLLs are widely used in frequency synthesizers to generate stable frequencies from a reference frequency. This is essential in applications like radio transmitters and receivers. Clock Recovery - In digital communication systems, PLLs are used to recover the clock signal from the data stream. Demodulation - PLLs can demodulate frequency-modulated (FM) signals. They track the frequency and phase of the incoming signal, allowing for accurate recovery of the original message. College of Engineering and Information Technology  Phase-Locked Loop (PLL) Uses of PLL Data Synchronization - In systems like digital communication, PLLs help synchronize the transmitter and receiver, ensuring that data is sent and received at the correct times. Carrier Recovery- In modulated signals, PLLs can recover the carrier signal, which is crucial for coherent detection in systems like MPSK (M-ary Phase Shift Keying Signal Conditioning - PLLs can filter out noise from signals, improving the quality of the received signal by locking onto the desired frequency and phase. College of Engineering and Information Technology  Phase-Locked Loop (PLL) Uses of PLL Television and Radio Broadcasting - In television and radio transmitters, PLLs are used to stabilize the frequency of the transmitted signal, ensuring clear reception. Phase Alignment - In systems where multiple signals need to be phase-aligned (like in phased array antennas), PLLs help maintain the correct phase relationship between signals. Integrated Circuits - Many modern integrated circuits (ICs) include PLLs for clock generation and synchronization, making them essential in microcontrollers and digital signal processors. College of Engineering and Information Technology  Carrier Recovery Importance of Carrier Recovery Carrier recovery is necessary for coherent demodulation in suppressed-carrier modulation schemes, allowing the receiver to accurately reconstruct the original signal. College of Engineering and Information Technology  Carrier Recovery Methods of Carrier Recovery: 1. Costas Loop A type of PLL specifically designed for QPSK (Quadrature Phase Shift Keying) signals. It provides robust performance against Costas loop for carrier recovery for QPSK. phase noise and is widely used in digital College of Engineering and communication Information Technology systems.  Carrier Recovery Methods of Carrier Recovery: 2. Mth-Power Loop Utilizes the Mth power of the incoming signal to recover the carrier. This method converts the modulated signal into a linear combination of sinusoidal functions, aiding in carrier recovery. Mth power loop for carrier recovery for MPSK. College of Engineering and Information Technology  Carrier Recovery Challenges: Phase Ambiguity: The receiver may not be able to determine the exact phase of the incoming signal, leading to potential errors. Noise: External noise can affect the performance of carrier recovery systems, necessitating robust design and filtering techniques. Differential Encoding: This technique can mitigate phase ambiguity by encoding information in a way that reduces the impact of phase errors. College of Engineering and Information Technology  Symbol Synchronization Symbol synchronization is the process of aligning the receiver's sampling instants with the transmitted symbols to ensure accurate demodulation. Ensures optimum demodulation and minimizes symbol errors, which can significantly impact the quality of the received signal. College of Engineering and Information Technology  Symbol Synchronization Methods of Symbol Synchronization: 1. Master Clock Synchronization - Both the transmitter and receiver are synchronized to a master clock, providing high precision but at a higher cost. - Common in large, high-speed radio communication systems. College of Engineering and Information Technology  Symbol Synchronization Methods of Symbol Synchronization: 2. Clock Pilot Transmission A clock signal is sent alongside the data, allowing the receiver to synchronize its sampling with the transmitted symbols. Simple and reliable but can waste transmit power. College of Engineering and Information Technology  Symbol Synchronization Methods of Symbol Synchronization: 3. Self-Synchronization The receiver derives the clock signal from the received data itself, making it an efficient approach. Various symbol timing recovery circuits can be employed to achieve this. College of Engineering and Information Technology  Symbol Synchronization Techniques: Early-Late Gate Method: A common technique where the receiver samples the signal slightly before and after the expected symbol time to determine the optimal sampling point. Early-late gate symbol synchronizer: (a) matched-filter input and College of Engineering and output and (b) block diagram. Information Technology  Symbol Synchronization Techniques: Nonlinear Filter Synchronization: Uses nonlinear filtering techniques to improve synchronization accuracy by analyzing the received signal's characteristics. College of Engineering and Nonlinear filter symbol synchronizer: (a) even-law-based, (b) correlation-based, and (c) Information Technology differentiation-based.  Summary Synchronization is crucial for reliable digital communication, ensuring that data is transmitted and received accurately. Various levels of synchronization address different aspects of data transmission, from frame synchronization to symbol synchronization. Scrambling enhances performance by ensuring signal integrity and preventing long sequences of identical bits. PLLs and carrier recovery techniques are essential for coherent demodulation, allowing for accurate signal reconstruction. Effective symbol synchronization is vital for minimizing errors and ensuring the quality of the received signal. College of Engineering and Information Technology  References: Frame Synchronization Unit. (n.d.). https://www.southampton.ac.uk/~bim/notes/cga/c99/faw.html Overview of Network Synchronization Technology Standardization in ITU-T | NTT Technical Review. (n.d.). https://www.ntt- review.jp/archive/ntttechnical.php?contents=ntr201602gls.html Kumar, Ashok & Mehta, Sanjeev. (2014). Design of 12B/14B: A Novel SERDES Encoding Technique. International Journal of Information Technology and Computer Science. 6. 32-38. 10.5815/ijitcs.2014.09.04. https://www.geeksforgeeks.org/pseudo-random-number-generator- prng/ College of Engineering and Information Technology  References: Jong, GJ., Chen, YC., Huang, CS. et al. The Implementation of an Amplitude-Locked Loop for Digital Communication Chip Design. Wireless Pers Commun 72, 2773–2801 (2013). https://doi.org/10.1007/s11277-013-1180-2 https://wirelesspi.com/early-late-bit-synchronizer-in-digital- communication/ https://people.ece.ubc.ca/~edc/4340.fall2014/lectures/lec12.pdf https://www.ieee802.org/3/cg/public/adhoc/beruto_3cg_scrambler.pdf College of Engineering and Information Technology  End of Presentation College of Engineering and Information Technology